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authorCaleb Connolly <caleb.connolly@linaro.org>2024-04-15 16:03:39 +0100
committerCaleb Connolly <caleb.connolly@linaro.org>2024-04-23 13:29:15 +0200
commit99e791746f318e308646b4831a0a9fc3ad9228c4 (patch)
treed10264e1235732320b79e71958e14163e4ae4535 /drivers/fpga/fpga-uclass.c
parent8a4e0433056abd07531e59b5fc5c2a8846bfc3b8 (diff)
clk/qcom: ipq4019: return valid rate when setting UART clock
clk_set_rate() should return the clock rate that was set. The IPQ4019 clock driver doesn't set any rates yet but it should still return the expected value so that drivers can work properly. For a baud rate of 115200 with an expected bit clock divisor of 16, the clock rate should be 1843200 so return that frequency. Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Diffstat (limited to 'drivers/fpga/fpga-uclass.c')
0 files changed, 0 insertions, 0 deletions