diff options
| author | Tom Rini <trini@konsulko.com> | 2023-02-07 20:36:16 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2023-02-07 20:36:16 -0500 |
| commit | 94fe4ed9455d559ccca45865c195fe4ecdaffb51 (patch) | |
| tree | b56e39c0847ac222c122e8feda40c27af21a0a30 /drivers | |
| parent | b69026c91f2e98b247120e217a986f5056724baf (diff) | |
| parent | d727ace9abf13eb72e7ac29113f52fa3fd3357bb (diff) | |
Merge branch '2023-02-07-Kconfig-cleanup-dead-code-removal'
To quote the author:
This series adds source scanning to moveconfig.py so that it can look
for Kconfig options mentioned in the source which do not appear in
Kconfig, and vice versa.
This tool is then used to clean up the unused or obsolete options
mentioned in Makefiles, along with any attached source code.
Diffstat (limited to 'drivers')
62 files changed, 16 insertions, 8813 deletions
diff --git a/drivers/Makefile b/drivers/Makefile index 83b14ef1fd3..15d19d0c8a3 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -59,7 +59,6 @@ obj-$(CONFIG_SPL_USB_GADGET) += usb/common/ obj-$(CONFIG_SPL_USB_GADGET) += usb/gadget/udc/ obj-$(CONFIG_SPL_WATCHDOG) += watchdog/ obj-$(CONFIG_SPL_USB_HOST) += usb/host/ -obj-$(CONFIG_OMAP_USB_PHY) += usb/phy/ obj-$(CONFIG_SPL_SATA) += ata/ scsi/ obj-$(CONFIG_SPL_LEGACY_BLOCK) += block/ obj-$(CONFIG_SPL_THERMAL) += thermal/ diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index 4113de230cd..61490d6d8de 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -21,6 +21,12 @@ config FPGA_SOCFPGA This provides common functionality for Gen5 and Arria10 devices. +config FPGA_STRATIX_II + bool "Enable Stratix II FPGA drivers" + depends on FPGA_ALTERA + help + Say Y here to enable the Altera Stratix II FPGA-specific driver. + config FPGA_STRATIX_V bool "Enable Stratix V FPGA drivers" depends on FPGA_ALTERA @@ -54,6 +60,12 @@ config FPGA_INTEL_SDM_MAILBOX Enable FPGA driver for writing full bitstream into Intel FPGA devices through SDM (Secure Device Manager) Mailbox. +config FPGA_LATTICE + bool "Enable Lattice FPGA driver" + help + This is used for the lattice FPGAs. Please check the source code as + there is no documentation for this at present. + config FPGA_XILINX bool "Enable Xilinx FPGA drivers" select FPGA diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 7235714fcc0..fcd136367ac 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -23,13 +23,11 @@ obj-$(CONFIG_INTEL_ICH6_GPIO) += intel_ich6_gpio.o obj-$(CONFIG_INTEL_BROADWELL_GPIO) += intel_broadwell_gpio.o obj-$(CONFIG_IPROC_GPIO) += iproc_gpio.o obj-$(CONFIG_KIRKWOOD_GPIO) += kw_gpio.o -obj-$(CONFIG_KONA_GPIO) += kona_gpio.o obj-$(CONFIG_MCP230XX_GPIO) += mcp230xx_gpio.o obj-$(CONFIG_MXC_GPIO) += mxc_gpio.o obj-$(CONFIG_MXS_GPIO) += mxs_gpio.o obj-$(CONFIG_NPCM_GPIO) += npcm_gpio.o obj-$(CONFIG_PCA953X) += pca953x.o -obj-$(CONFIG_PCA9698) += pca9698.o obj-$(CONFIG_ROCKCHIP_GPIO) += rk_gpio.o obj-$(CONFIG_RCAR_GPIO) += gpio-rcar.o obj-$(CONFIG_RZA1_GPIO) += gpio-rza1.o @@ -38,16 +36,13 @@ obj-$(CONFIG_SANDBOX_GPIO) += sandbox.o sandbox_test.o obj-$(CONFIG_TEGRA_GPIO) += tegra_gpio.o obj-$(CONFIG_TEGRA186_GPIO) += tegra186_gpio.o obj-$(CONFIG_DA8XX_GPIO) += da8xx_gpio.o -obj-$(CONFIG_DM644X_GPIO) += da8xx_gpio.o obj-$(CONFIG_ALTERA_PIO) += altera_pio.o -obj-$(CONFIG_MPC83XX_GPIO) += mpc83xx_gpio.o obj-$(CONFIG_MPC8XXX_GPIO) += mpc8xxx_gpio.o obj-$(CONFIG_MPC83XX_SPISEL_BOOT) += mpc83xx_spisel_boot.o obj-$(CONFIG_SH_GPIO_PFC) += sh_pfc.o obj-$(CONFIG_OMAP_GPIO) += omap_gpio.o obj-$(CONFIG_BCM2835_GPIO) += bcm2835_gpio.o obj-$(CONFIG_XILINX_GPIO) += xilinx_gpio.o -obj-$(CONFIG_ADI_GPIO2) += adi_gpio2.o obj-$(CONFIG_TCA642X) += tca642x.o obj-$(CONFIG_SUNXI_GPIO) += sunxi_gpio.o obj-$(CONFIG_LPC32XX_GPIO) += lpc32xx_gpio.o diff --git a/drivers/gpio/adi_gpio2.c b/drivers/gpio/adi_gpio2.c deleted file mode 100644 index d0849c85c3b..00000000000 --- a/drivers/gpio/adi_gpio2.c +++ /dev/null @@ -1,425 +0,0 @@ -/* - * ADI GPIO2 Abstraction Layer - * Support BF54x, BF60x and future processors. - * - * Copyright 2008-2013 Analog Devices Inc. - * - * Licensed under the GPL-2 or later - */ - -#include <common.h> -#include <malloc.h> -#include <linux/bug.h> -#include <linux/errno.h> -#include <asm/gpio.h> - -#define RESOURCE_LABEL_SIZE 16 - -static struct str_ident { - char name[RESOURCE_LABEL_SIZE]; -} str_ident[MAX_RESOURCES]; - -static void gpio_error(unsigned gpio) -{ - printf("adi_gpio2: GPIO %d wasn't requested!\n", gpio); -} - -static void set_label(unsigned short ident, const char *label) -{ - if (label) { - strncpy(str_ident[ident].name, label, - RESOURCE_LABEL_SIZE); - str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0; - } -} - -static char *get_label(unsigned short ident) -{ - return *str_ident[ident].name ? str_ident[ident].name : "UNKNOWN"; -} - -static int cmp_label(unsigned short ident, const char *label) -{ - if (label == NULL) - printf("adi_gpio2: please provide none-null label\n"); - - if (label) - return strcmp(str_ident[ident].name, label); - else - return -EINVAL; -} - -#define map_entry(m, i) reserved_##m##_map[gpio_bank(i)] -#define is_reserved(m, i, e) (map_entry(m, i) & gpio_bit(i)) -#define reserve(m, i) (map_entry(m, i) |= gpio_bit(i)) -#define unreserve(m, i) (map_entry(m, i) &= ~gpio_bit(i)) -#define DECLARE_RESERVED_MAP(m, c) unsigned short reserved_##m##_map[c] - -static DECLARE_RESERVED_MAP(gpio, GPIO_BANK_NUM); -static DECLARE_RESERVED_MAP(peri, gpio_bank(MAX_RESOURCES)); - -inline int check_gpio(unsigned gpio) -{ -#if defined(CONFIG_BF54x) - if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15 || - gpio == GPIO_PH14 || gpio == GPIO_PH15 || - gpio == GPIO_PJ14 || gpio == GPIO_PJ15) - return -EINVAL; -#endif - if (gpio >= MAX_GPIOS) - return -EINVAL; - return 0; -} - -static void port_setup(unsigned gpio, unsigned short usage) -{ -#if defined(CONFIG_BF54x) - if (usage == GPIO_USAGE) - gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio); - else - gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio); -#else - if (usage == GPIO_USAGE) - gpio_array[gpio_bank(gpio)]->port_fer_clear = gpio_bit(gpio); - else - gpio_array[gpio_bank(gpio)]->port_fer_set = gpio_bit(gpio); -#endif -} - -inline void portmux_setup(unsigned short per) -{ - u32 pmux; - u16 ident = P_IDENT(per); - u16 function = P_FUNCT2MUX(per); - - pmux = gpio_array[gpio_bank(ident)]->port_mux; - - pmux &= ~(0x3 << (2 * gpio_sub_n(ident))); - pmux |= (function & 0x3) << (2 * gpio_sub_n(ident)); - - gpio_array[gpio_bank(ident)]->port_mux = pmux; -} - -inline u16 get_portmux(unsigned short per) -{ - u32 pmux; - u16 ident = P_IDENT(per); - - pmux = gpio_array[gpio_bank(ident)]->port_mux; - - return pmux >> (2 * gpio_sub_n(ident)) & 0x3; -} - -unsigned short get_gpio_dir(unsigned gpio) -{ - return 0x01 & - (gpio_array[gpio_bank(gpio)]->dir_clear >> gpio_sub_n(gpio)); -} - -/*********************************************************** -* -* FUNCTIONS: Peripheral Resource Allocation -* and PortMux Setup -* -* INPUTS/OUTPUTS: -* per Peripheral Identifier -* label String -* -* DESCRIPTION: Peripheral Resource Allocation and Setup API -**************************************************************/ - -int peripheral_request(unsigned short per, const char *label) -{ - unsigned short ident = P_IDENT(per); - - /* - * Don't cares are pins with only one dedicated function - */ - - if (per & P_DONTCARE) - return 0; - - if (!(per & P_DEFINED)) - return -EINVAL; - - BUG_ON(ident >= MAX_RESOURCES); - - /* If a pin can be muxed as either GPIO or peripheral, make - * sure it is not already a GPIO pin when we request it. - */ - if (unlikely(!check_gpio(ident) && is_reserved(gpio, ident, 1))) { - printf("%s: Peripheral %d is already reserved as GPIO by %s!\n", - __func__, ident, get_label(ident)); - return -EBUSY; - } - - if (unlikely(is_reserved(peri, ident, 1))) { - /* - * Pin functions like AMC address strobes my - * be requested and used by several drivers - */ - - if (!((per & P_MAYSHARE) && - get_portmux(per) == P_FUNCT2MUX(per))) { - /* - * Allow that the identical pin function can - * be requested from the same driver twice - */ - - if (cmp_label(ident, label) == 0) - goto anyway; - - printf("%s: Peripheral %d function %d is already " - "reserved by %s!\n", __func__, ident, - P_FUNCT2MUX(per), get_label(ident)); - return -EBUSY; - } - } - - anyway: - reserve(peri, ident); - - portmux_setup(per); - port_setup(ident, PERIPHERAL_USAGE); - - set_label(ident, label); - - return 0; -} - -int peripheral_request_list(const unsigned short per[], const char *label) -{ - u16 cnt; - int ret; - - for (cnt = 0; per[cnt] != 0; cnt++) { - ret = peripheral_request(per[cnt], label); - - if (ret < 0) { - for (; cnt > 0; cnt--) - peripheral_free(per[cnt - 1]); - - return ret; - } - } - - return 0; -} - -void peripheral_free(unsigned short per) -{ - unsigned short ident = P_IDENT(per); - - if (per & P_DONTCARE) - return; - - if (!(per & P_DEFINED)) - return; - - if (unlikely(!is_reserved(peri, ident, 0))) - return; - - if (!(per & P_MAYSHARE)) - port_setup(ident, GPIO_USAGE); - - unreserve(peri, ident); - - set_label(ident, "free"); -} - -void peripheral_free_list(const unsigned short per[]) -{ - u16 cnt; - for (cnt = 0; per[cnt] != 0; cnt++) - peripheral_free(per[cnt]); -} - -/*********************************************************** -* -* FUNCTIONS: GPIO Driver -* -* INPUTS/OUTPUTS: -* gpio PIO Number between 0 and MAX_GPIOS -* label String -* -* DESCRIPTION: GPIO Driver API -**************************************************************/ - -int gpio_request(unsigned gpio, const char *label) -{ - if (check_gpio(gpio) < 0) - return -EINVAL; - - /* - * Allow that the identical GPIO can - * be requested from the same driver twice - * Do nothing and return - - */ - - if (cmp_label(gpio, label) == 0) - return 0; - - if (unlikely(is_reserved(gpio, gpio, 1))) { - printf("adi_gpio2: GPIO %d is already reserved by %s!\n", - gpio, get_label(gpio)); - return -EBUSY; - } - if (unlikely(is_reserved(peri, gpio, 1))) { - printf("adi_gpio2: GPIO %d is already reserved as Peripheral " - "by %s!\n", gpio, get_label(gpio)); - return -EBUSY; - } - - reserve(gpio, gpio); - set_label(gpio, label); - - port_setup(gpio, GPIO_USAGE); - - return 0; -} - -int gpio_free(unsigned gpio) -{ - if (check_gpio(gpio) < 0) - return -1; - - if (unlikely(!is_reserved(gpio, gpio, 0))) { - gpio_error(gpio); - return -1; - } - - unreserve(gpio, gpio); - - set_label(gpio, "free"); - - return 0; -} - -#ifdef ADI_SPECIAL_GPIO_BANKS -static DECLARE_RESERVED_MAP(special_gpio, gpio_bank(MAX_RESOURCES)); - -int special_gpio_request(unsigned gpio, const char *label) -{ - /* - * Allow that the identical GPIO can - * be requested from the same driver twice - * Do nothing and return - - */ - - if (cmp_label(gpio, label) == 0) - return 0; - - if (unlikely(is_reserved(special_gpio, gpio, 1))) { - printf("adi_gpio2: GPIO %d is already reserved by %s!\n", - gpio, get_label(gpio)); - return -EBUSY; - } - if (unlikely(is_reserved(peri, gpio, 1))) { - printf("adi_gpio2: GPIO %d is already reserved as Peripheral " - "by %s!\n", gpio, get_label(gpio)); - - return -EBUSY; - } - - reserve(special_gpio, gpio); - reserve(peri, gpio); - - set_label(gpio, label); - port_setup(gpio, GPIO_USAGE); - - return 0; -} - -void special_gpio_free(unsigned gpio) -{ - if (unlikely(!is_reserved(special_gpio, gpio, 0))) { - gpio_error(gpio); - return; - } - - unreserve(special_gpio, gpio); - unreserve(peri, gpio); - set_label(gpio, "free"); -} -#endif - -static inline void __gpio_direction_input(unsigned gpio) -{ - gpio_array[gpio_bank(gpio)]->dir_clear = gpio_bit(gpio); -#if defined(CONFIG_BF54x) - gpio_array[gpio_bank(gpio)]->inen |= gpio_bit(gpio); -#else - gpio_array[gpio_bank(gpio)]->inen_set = gpio_bit(gpio); -#endif -} - -int gpio_direction_input(unsigned gpio) -{ - unsigned long flags; - - if (!is_reserved(gpio, gpio, 0)) { - gpio_error(gpio); - return -EINVAL; - } - - local_irq_save(flags); - __gpio_direction_input(gpio); - local_irq_restore(flags); - - return 0; -} - -int gpio_set_value(unsigned gpio, int arg) -{ - if (arg) - gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio); - else - gpio_array[gpio_bank(gpio)]->data_clear = gpio_bit(gpio); - - return 0; -} - -int gpio_direction_output(unsigned gpio, int value) -{ - unsigned long flags; - - if (!is_reserved(gpio, gpio, 0)) { - gpio_error(gpio); - return -EINVAL; - } - - local_irq_save(flags); - -#if defined(CONFIG_BF54x) - gpio_array[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio); -#else - gpio_array[gpio_bank(gpio)]->inen_clear = gpio_bit(gpio); -#endif - gpio_set_value(gpio, value); - gpio_array[gpio_bank(gpio)]->dir_set = gpio_bit(gpio); - - local_irq_restore(flags); - - return 0; -} - -int gpio_get_value(unsigned gpio) -{ - return 1 & (gpio_array[gpio_bank(gpio)]->data >> gpio_sub_n(gpio)); -} - -void gpio_labels(void) -{ - int c, gpio; - - for (c = 0; c < MAX_RESOURCES; c++) { - gpio = is_reserved(gpio, c, 1); - if (!check_gpio(c) && gpio) - printf("GPIO_%d:\t%s\tGPIO %s\n", c, get_label(c), - get_gpio_dir(c) ? "OUTPUT" : "INPUT"); - else if (is_reserved(peri, c, 1)) - printf("GPIO_%d:\t%s\tPeripheral\n", c, get_label(c)); - else - continue; - } -} diff --git a/drivers/gpio/kona_gpio.c b/drivers/gpio/kona_gpio.c deleted file mode 100644 index 29791882a34..00000000000 --- a/drivers/gpio/kona_gpio.c +++ /dev/null @@ -1,141 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2013 Broadcom Corporation. - */ - -#include <common.h> -#include <malloc.h> -#include <asm/io.h> -#include <asm/arch/sysmap.h> - -#define GPIO_BASE (void *)GPIO2_BASE_ADDR - -#define GPIO_PASSWD 0x00a5a501 -#define GPIO_PER_BANK 32 -#define GPIO_MAX_BANK_NUM 8 - -#define GPIO_BANK(gpio) ((gpio) >> 5) -#define GPIO_BITMASK(gpio) \ - (1UL << ((gpio) & (GPIO_PER_BANK - 1))) - -#define GPIO_OUT_STATUS(bank) (0x00000000 + ((bank) << 2)) -#define GPIO_IN_STATUS(bank) (0x00000020 + ((bank) << 2)) -#define GPIO_OUT_SET(bank) (0x00000040 + ((bank) << 2)) -#define GPIO_OUT_CLEAR(bank) (0x00000060 + ((bank) << 2)) -#define GPIO_INT_STATUS(bank) (0x00000080 + ((bank) << 2)) -#define GPIO_INT_MASK(bank) (0x000000a0 + ((bank) << 2)) -#define GPIO_INT_MSKCLR(bank) (0x000000c0 + ((bank) << 2)) -#define GPIO_CONTROL(bank) (0x00000100 + ((bank) << 2)) -#define GPIO_PWD_STATUS(bank) (0x00000500 + ((bank) << 2)) - -#define GPIO_GPPWR_OFFSET 0x00000520 - -#define GPIO_GPCTR0_DBR_SHIFT 5 -#define GPIO_GPCTR0_DBR_MASK 0x000001e0 - -#define GPIO_GPCTR0_ITR_SHIFT 3 -#define GPIO_GPCTR0_ITR_MASK 0x00000018 -#define GPIO_GPCTR0_ITR_CMD_RISING_EDGE 0x00000001 -#define GPIO_GPCTR0_ITR_CMD_FALLING_EDGE 0x00000002 -#define GPIO_GPCTR0_ITR_CMD_BOTH_EDGE 0x00000003 - -#define GPIO_GPCTR0_IOTR_MASK 0x00000001 -#define GPIO_GPCTR0_IOTR_CMD_0UTPUT 0x00000000 -#define GPIO_GPCTR0_IOTR_CMD_INPUT 0x00000001 - -int gpio_request(unsigned gpio, const char *label) -{ - unsigned int value, off; - - writel(GPIO_PASSWD, GPIO_BASE + GPIO_GPPWR_OFFSET); - off = GPIO_PWD_STATUS(GPIO_BANK(gpio)); - value = readl(GPIO_BASE + off) & ~GPIO_BITMASK(gpio); - writel(value, GPIO_BASE + off); - - return 0; -} - -int gpio_free(unsigned gpio) -{ - unsigned int value, off; - - writel(GPIO_PASSWD, GPIO_BASE + GPIO_GPPWR_OFFSET); - off = GPIO_PWD_STATUS(GPIO_BANK(gpio)); - value = readl(GPIO_BASE + off) | GPIO_BITMASK(gpio); - writel(value, GPIO_BASE + off); - - return 0; -} - -int gpio_direction_input(unsigned gpio) -{ - u32 val; - - val = readl(GPIO_BASE + GPIO_CONTROL(gpio)); - val &= ~GPIO_GPCTR0_IOTR_MASK; - val |= GPIO_GPCTR0_IOTR_CMD_INPUT; - writel(val, GPIO_BASE + GPIO_CONTROL(gpio)); - - return 0; -} - -int gpio_direction_output(unsigned gpio, int value) -{ - int bank_id = GPIO_BANK(gpio); - int bitmask = GPIO_BITMASK(gpio); - u32 val, off; - - val = readl(GPIO_BASE + GPIO_CONTROL(gpio)); - val &= ~GPIO_GPCTR0_IOTR_MASK; - val |= GPIO_GPCTR0_IOTR_CMD_0UTPUT; - writel(val, GPIO_BASE + GPIO_CONTROL(gpio)); - off = value ? GPIO_OUT_SET(bank_id) : GPIO_OUT_CLEAR(bank_id); - - val = readl(GPIO_BASE + off); - val |= bitmask; - writel(val, GPIO_BASE + off); - - return 0; -} - -int gpio_get_value(unsigned gpio) -{ - int bank_id = GPIO_BANK(gpio); - int bitmask = GPIO_BITMASK(gpio); - u32 val, off; - - /* determine the GPIO pin direction */ - val = readl(GPIO_BASE + GPIO_CONTROL(gpio)); - val &= GPIO_GPCTR0_IOTR_MASK; - - /* read the GPIO bank status */ - off = (GPIO_GPCTR0_IOTR_CMD_INPUT == val) ? - GPIO_IN_STATUS(bank_id) : GPIO_OUT_STATUS(bank_id); - val = readl(GPIO_BASE + off); - - /* return the specified bit status */ - return !!(val & bitmask); -} - -void gpio_set_value(unsigned gpio, int value) -{ - int bank_id = GPIO_BANK(gpio); - int bitmask = GPIO_BITMASK(gpio); - u32 val, off; - - /* determine the GPIO pin direction */ - val = readl(GPIO_BASE + GPIO_CONTROL(gpio)); - val &= GPIO_GPCTR0_IOTR_MASK; - - /* this function only applies to output pin */ - if (GPIO_GPCTR0_IOTR_CMD_INPUT == val) { - printf("%s: Cannot set an input pin %d\n", __func__, gpio); - return; - } - - off = value ? GPIO_OUT_SET(bank_id) : GPIO_OUT_CLEAR(bank_id); - - val = readl(GPIO_BASE + off); - val |= bitmask; - writel(val, GPIO_BASE + off); -} diff --git a/drivers/gpio/mpc83xx_gpio.c b/drivers/gpio/mpc83xx_gpio.c deleted file mode 100644 index bf693c8d457..00000000000 --- a/drivers/gpio/mpc83xx_gpio.c +++ /dev/null @@ -1,183 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Freescale MPC83xx GPIO handling. - */ - -#include <common.h> -#include <malloc.h> -#include <mpc83xx.h> -#include <asm/gpio.h> -#include <asm/io.h> - -#ifndef CFG_MPC83XX_GPIO_0_INIT_DIRECTION -#define CFG_MPC83XX_GPIO_0_INIT_DIRECTION 0 -#endif -#ifndef CFG_MPC83XX_GPIO_1_INIT_DIRECTION -#define CFG_MPC83XX_GPIO_1_INIT_DIRECTION 0 -#endif -#ifndef CFG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN -#define CFG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN 0 -#endif -#ifndef CFG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN -#define CFG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN 0 -#endif -#ifndef CFG_MPC83XX_GPIO_0_INIT_VALUE -#define CFG_MPC83XX_GPIO_0_INIT_VALUE 0 -#endif -#ifndef CFG_MPC83XX_GPIO_1_INIT_VALUE -#define CFG_MPC83XX_GPIO_1_INIT_VALUE 0 -#endif - -static unsigned int gpio_output_value[MPC83XX_GPIO_CTRLRS]; - -/* - * Generic_GPIO primitives. - */ - -int gpio_request(unsigned gpio, const char *label) -{ - if (gpio >= MAX_NUM_GPIOS) - return -1; - - return 0; -} - -int gpio_free(unsigned gpio) -{ - /* Do not set to input */ - return 0; -} - -/* set GPIO pin 'gpio' as an input */ -int gpio_direction_input(unsigned gpio) -{ - immap_t *im = (immap_t *)CONFIG_SYS_IMMR; - unsigned int ctrlr; - unsigned int line; - unsigned int line_mask; - - /* 32-bits per controller */ - ctrlr = gpio >> 5; - line = gpio & (0x1F); - - /* Big endian */ - line_mask = 1 << (31 - line); - - clrbits_be32(&im->gpio[ctrlr].dir, line_mask); - - return 0; -} - -/* set GPIO pin 'gpio' as an output, with polarity 'value' */ -int gpio_direction_output(unsigned gpio, int value) -{ - immap_t *im = (immap_t *)CONFIG_SYS_IMMR; - unsigned int ctrlr; - unsigned int line; - unsigned int line_mask; - - if (value != 0 && value != 1) { - printf("Error: Value parameter must be 0 or 1.\n"); - return -1; - } - - gpio_set_value(gpio, value); - - /* 32-bits per controller */ - ctrlr = gpio >> 5; - line = gpio & (0x1F); - - /* Big endian */ - line_mask = 1 << (31 - line); - - /* Make the line output */ - setbits_be32(&im->gpio[ctrlr].dir, line_mask); - - return 0; -} - -/* read GPIO IN value of pin 'gpio' */ -int gpio_get_value(unsigned gpio) -{ - immap_t *im = (immap_t *)CONFIG_SYS_IMMR; - unsigned int ctrlr; - unsigned int line; - unsigned int line_mask; - - /* 32-bits per controller */ - ctrlr = gpio >> 5; - line = gpio & (0x1F); - - /* Big endian */ - line_mask = 1 << (31 - line); - - /* Read the value and mask off the bit */ - return (in_be32(&im->gpio[ctrlr].dat) & line_mask) != 0; -} - -/* write GPIO OUT value to pin 'gpio' */ -int gpio_set_value(unsigned gpio, int value) -{ - immap_t *im = (immap_t *)CONFIG_SYS_IMMR; - unsigned int ctrlr; - unsigned int line; - unsigned int line_mask; - - if (value != 0 && value != 1) { - printf("Error: Value parameter must be 0 or 1.\n"); - return -1; - } - - /* 32-bits per controller */ - ctrlr = gpio >> 5; - line = gpio & (0x1F); - - /* Big endian */ - line_mask = 1 << (31 - line); - - /* Update the local output buffer soft copy */ - gpio_output_value[ctrlr] = - (gpio_output_value[ctrlr] & ~line_mask) | \ - (value ? line_mask : 0); - - /* Write the output */ - out_be32(&im->gpio[ctrlr].dat, gpio_output_value[ctrlr]); - - return 0; -} - -/* Configure GPIO registers early */ -void mpc83xx_gpio_init_f(void) -{ - immap_t *im = (immap_t *)CONFIG_SYS_IMMR; - -#if MPC83XX_GPIO_CTRLRS >= 1 - out_be32(&im->gpio[0].dir, CFG_MPC83XX_GPIO_0_INIT_DIRECTION); - out_be32(&im->gpio[0].odr, CFG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN); - out_be32(&im->gpio[0].dat, CFG_MPC83XX_GPIO_0_INIT_VALUE); - out_be32(&im->gpio[0].ier, 0xFFFFFFFF); /* Clear all events */ - out_be32(&im->gpio[0].imr, 0); - out_be32(&im->gpio[0].icr, 0); -#endif - -#if MPC83XX_GPIO_CTRLRS >= 2 - out_be32(&im->gpio[1].dir, CFG_MPC83XX_GPIO_1_INIT_DIRECTION); - out_be32(&im->gpio[1].odr, CFG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN); - out_be32(&im->gpio[1].dat, CFG_MPC83XX_GPIO_1_INIT_VALUE); - out_be32(&im->gpio[1].ier, 0xFFFFFFFF); /* Clear all events */ - out_be32(&im->gpio[1].imr, 0); - out_be32(&im->gpio[1].icr, 0); -#endif -} - -/* Initialize GPIO soft-copies */ -void mpc83xx_gpio_init_r(void) -{ -#if MPC83XX_GPIO_CTRLRS >= 1 - gpio_output_value[0] = CFG_MPC83XX_GPIO_0_INIT_VALUE; -#endif - -#if MPC83XX_GPIO_CTRLRS >= 2 - gpio_output_value[1] = CFG_MPC83XX_GPIO_1_INIT_VALUE; -#endif -} diff --git a/drivers/gpio/pca9698.c b/drivers/gpio/pca9698.c deleted file mode 100644 index 11274c78101..00000000000 --- a/drivers/gpio/pca9698.c +++ /dev/null @@ -1,127 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2011 - * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc - */ - -/* - * Driver for NXP's pca9698 40 bit I2C gpio expander - */ - -#include <common.h> -#include <i2c.h> -#include <malloc.h> -#include <linux/errno.h> -#include <pca9698.h> - -/* - * The pca9698 registers - */ - -#define PCA9698_REG_INPUT 0x00 -#define PCA9698_REG_OUTPUT 0x08 -#define PCA9698_REG_POLARITY 0x10 -#define PCA9698_REG_CONFIG 0x18 - -#define PCA9698_BUFFER_SIZE 5 -#define PCA9698_GPIO_COUNT 40 - -static int pca9698_read40(u8 addr, u8 offset, u8 *buffer) -{ - u8 command = offset | 0x80; /* autoincrement */ - - return i2c_read(addr, command, 1, buffer, PCA9698_BUFFER_SIZE); -} - -static int pca9698_write40(u8 addr, u8 offset, u8 *buffer) -{ - u8 command = offset | 0x80; /* autoincrement */ - - return i2c_write(addr, command, 1, buffer, PCA9698_BUFFER_SIZE); -} - -static void pca9698_set_bit(unsigned gpio, u8 *buffer, unsigned value) -{ - unsigned byte = gpio / 8; - unsigned bit = gpio % 8; - - if (value) - buffer[byte] |= (1 << bit); - else - buffer[byte] &= ~(1 << bit); -} - -int pca9698_request(unsigned gpio, const char *label) -{ - if (gpio >= PCA9698_GPIO_COUNT) - return -EINVAL; - - return 0; -} - -void pca9698_free(unsigned gpio) -{ -} - -int pca9698_direction_input(u8 addr, unsigned gpio) -{ - u8 data[PCA9698_BUFFER_SIZE]; - int res; - - res = pca9698_read40(addr, PCA9698_REG_CONFIG, data); - if (res) - return res; - - pca9698_set_bit(gpio, data, 1); - - return pca9698_write40(addr, PCA9698_REG_CONFIG, data); -} - -int pca9698_direction_output(u8 addr, unsigned gpio, int value) -{ - u8 data[PCA9698_BUFFER_SIZE]; - int res; - - res = pca9698_set_value(addr, gpio, value); - if (res) - return res; - - res = pca9698_read40(addr, PCA9698_REG_CONFIG, data); - if (res) - return res; - - pca9698_set_bit(gpio, data, 0); - - return pca9698_write40(addr, PCA9698_REG_CONFIG, data); -} - -int pca9698_get_value(u8 addr, unsigned gpio) -{ - unsigned config_byte = gpio / 8; - unsigned config_bit = gpio % 8; - unsigned value; - u8 data[PCA9698_BUFFER_SIZE]; - int res; - - res = pca9698_read40(addr, PCA9698_REG_INPUT, data); - if (res) - return -1; - - value = data[config_byte] & (1 << config_bit); - - return !!value; -} - -int pca9698_set_value(u8 addr, unsigned gpio, int value) -{ - u8 data[PCA9698_BUFFER_SIZE]; - int res; - - res = pca9698_read40(addr, PCA9698_REG_OUTPUT, data); - if (res) - return res; - - pca9698_set_bit(gpio, data, value); - - return pca9698_write40(addr, PCA9698_REG_OUTPUT, data); -} diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile index 920aafb91c5..cde0597290c 100644 --- a/drivers/i2c/Makefile +++ b/drivers/i2c/Makefile @@ -25,7 +25,6 @@ obj-$(CONFIG_SYS_I2C_IHS) += ihs_i2c.o obj-$(CONFIG_SYS_I2C_INTEL) += intel_i2c.o obj-$(CONFIG_SYS_I2C_IMX_LPI2C) += imx_lpi2c.o obj-$(CONFIG_SYS_I2C_IPROC) += iproc_i2c.o -obj-$(CONFIG_SYS_I2C_KONA) += kona_i2c.o obj-$(CONFIG_SYS_I2C_LPC32XX) += lpc32xx_i2c.o obj-$(CONFIG_SYS_I2C_MESON) += meson_i2c.o obj-$(CONFIG_SYS_I2C_MICROCHIP) += i2c-microchip.o diff --git a/drivers/i2c/kona_i2c.c b/drivers/i2c/kona_i2c.c deleted file mode 100644 index b9b0ff1c39e..00000000000 --- a/drivers/i2c/kona_i2c.c +++ /dev/null @@ -1,728 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2013 Broadcom Corporation. - * - * NOTE: This driver should be converted to driver model before June 2017. - * Please see doc/driver-model/i2c-howto.rst for instructions. - */ - -#include <common.h> -#include <log.h> -#include <asm/io.h> -#include <linux/delay.h> -#include <linux/errno.h> -#include <asm/arch/sysmap.h> -#include <asm/kona-common/clk.h> -#include <i2c.h> - -/* Hardware register offsets and field defintions */ -#define CS_OFFSET 0x00000020 -#define CS_ACK_SHIFT 3 -#define CS_ACK_MASK 0x00000008 -#define CS_ACK_CMD_GEN_START 0x00000000 -#define CS_ACK_CMD_GEN_RESTART 0x00000001 -#define CS_CMD_SHIFT 1 -#define CS_CMD_CMD_NO_ACTION 0x00000000 -#define CS_CMD_CMD_START_RESTART 0x00000001 -#define CS_CMD_CMD_STOP 0x00000002 -#define CS_EN_SHIFT 0 -#define CS_EN_CMD_ENABLE_BSC 0x00000001 - -#define TIM_OFFSET 0x00000024 -#define TIM_PRESCALE_SHIFT 6 -#define TIM_P_SHIFT 3 -#define TIM_NO_DIV_SHIFT 2 -#define TIM_DIV_SHIFT 0 - -#define DAT_OFFSET 0x00000028 - -#define TOUT_OFFSET 0x0000002c - -#define TXFCR_OFFSET 0x0000003c -#define TXFCR_FIFO_FLUSH_MASK 0x00000080 -#define TXFCR_FIFO_EN_MASK 0x00000040 - -#define IER_OFFSET 0x00000044 -#define IER_READ_COMPLETE_INT_MASK 0x00000010 -#define IER_I2C_INT_EN_MASK 0x00000008 -#define IER_FIFO_INT_EN_MASK 0x00000002 -#define IER_NOACK_EN_MASK 0x00000001 - -#define ISR_OFFSET 0x00000048 -#define ISR_RESERVED_MASK 0xffffff60 -#define ISR_CMDBUSY_MASK 0x00000080 -#define ISR_READ_COMPLETE_MASK 0x00000010 -#define ISR_SES_DONE_MASK 0x00000008 -#define ISR_ERR_MASK 0x00000004 -#define ISR_TXFIFOEMPTY_MASK 0x00000002 -#define ISR_NOACK_MASK 0x00000001 - -#define CLKEN_OFFSET 0x0000004c -#define CLKEN_AUTOSENSE_OFF_MASK 0x00000080 -#define CLKEN_M_SHIFT 4 -#define CLKEN_N_SHIFT 1 -#define CLKEN_CLKEN_MASK 0x00000001 - -#define FIFO_STATUS_OFFSET 0x00000054 -#define FIFO_STATUS_RXFIFO_EMPTY_MASK 0x00000004 -#define FIFO_STATUS_TXFIFO_EMPTY_MASK 0x00000010 - -#define HSTIM_OFFSET 0x00000058 -#define HSTIM_HS_MODE_MASK 0x00008000 -#define HSTIM_HS_HOLD_SHIFT 10 -#define HSTIM_HS_HIGH_PHASE_SHIFT 5 -#define HSTIM_HS_SETUP_SHIFT 0 - -#define PADCTL_OFFSET 0x0000005c -#define PADCTL_PAD_OUT_EN_MASK 0x00000004 - -#define RXFCR_OFFSET 0x00000068 -#define RXFCR_NACK_EN_SHIFT 7 -#define RXFCR_READ_COUNT_SHIFT 0 -#define RXFIFORDOUT_OFFSET 0x0000006c - -/* Locally used constants */ -#define MAX_RX_FIFO_SIZE 64U /* bytes */ -#define MAX_TX_FIFO_SIZE 64U /* bytes */ - -#define I2C_TIMEOUT 100000 /* usecs */ - -#define WAIT_INT_CHK 100 /* usecs */ -#if I2C_TIMEOUT % WAIT_INT_CHK -#error I2C_TIMEOUT must be a multiple of WAIT_INT_CHK -#endif - -/* Operations that can be commanded to the controller */ -enum bcm_kona_cmd_t { - BCM_CMD_NOACTION = 0, - BCM_CMD_START, - BCM_CMD_RESTART, - BCM_CMD_STOP, -}; - -/* Internal divider settings for standard mode, fast mode and fast mode plus */ -struct bus_speed_cfg { - uint8_t time_m; /* Number of cycles for setup time */ - uint8_t time_n; /* Number of cycles for hold time */ - uint8_t prescale; /* Prescale divider */ - uint8_t time_p; /* Timing coefficient */ - uint8_t no_div; /* Disable clock divider */ - uint8_t time_div; /* Post-prescale divider */ -}; - -static const struct bus_speed_cfg std_cfg_table[] = { - [IC_SPEED_MODE_STANDARD] = {0x01, 0x01, 0x03, 0x06, 0x00, 0x02}, - [IC_SPEED_MODE_FAST] = {0x05, 0x01, 0x03, 0x05, 0x01, 0x02}, - [IC_SPEED_MODE_FAST_PLUS] = {0x01, 0x01, 0x03, 0x01, 0x01, 0x03}, -}; - -struct bcm_kona_i2c_dev { - void *base; - uint speed; - const struct bus_speed_cfg *std_cfg; -}; - -/* Keep these two defines in sync */ -#define DEF_SPD I2C_SPEED_STANDARD_RATE -#define DEF_SPD_ENUM IC_SPEED_MODE_STANDARD - -#define DEF_DEVICE(num) \ -{(void *)CONFIG_SYS_I2C_BASE##num, DEF_SPD, &std_cfg_table[DEF_SPD_ENUM]} - -static struct bcm_kona_i2c_dev g_i2c_devs[CFG_SYS_MAX_I2C_BUS] = { -#ifdef CONFIG_SYS_I2C_BASE0 - DEF_DEVICE(0), -#endif -#ifdef CONFIG_SYS_I2C_BASE1 - DEF_DEVICE(1), -#endif -#ifdef CONFIG_SYS_I2C_BASE2 - DEF_DEVICE(2), -#endif -#ifdef CONFIG_SYS_I2C_BASE3 - DEF_DEVICE(3), -#endif -#ifdef CONFIG_SYS_I2C_BASE4 - DEF_DEVICE(4), -#endif -#ifdef CONFIG_SYS_I2C_BASE5 - DEF_DEVICE(5), -#endif -}; - -#define I2C_M_TEN 0x0010 /* ten bit address */ -#define I2C_M_RD 0x0001 /* read data */ -#define I2C_M_NOSTART 0x4000 /* no restart between msgs */ - -struct kona_i2c_msg { - uint16_t addr; - uint16_t flags; - uint16_t len; - uint8_t *buf; -}; - -static void bcm_kona_i2c_send_cmd_to_ctrl(struct bcm_kona_i2c_dev *dev, - enum bcm_kona_cmd_t cmd) -{ - debug("%s, %d\n", __func__, cmd); - - switch (cmd) { - case BCM_CMD_NOACTION: - writel((CS_CMD_CMD_NO_ACTION << CS_CMD_SHIFT) | - (CS_EN_CMD_ENABLE_BSC << CS_EN_SHIFT), - dev->base + CS_OFFSET); - break; - - case BCM_CMD_START: - writel((CS_ACK_CMD_GEN_START << CS_ACK_SHIFT) | - (CS_CMD_CMD_START_RESTART << CS_CMD_SHIFT) | - (CS_EN_CMD_ENABLE_BSC << CS_EN_SHIFT), - dev->base + CS_OFFSET); - break; - - case BCM_CMD_RESTART: - writel((CS_ACK_CMD_GEN_RESTART << CS_ACK_SHIFT) | - (CS_CMD_CMD_START_RESTART << CS_CMD_SHIFT) | - (CS_EN_CMD_ENABLE_BSC << CS_EN_SHIFT), - dev->base + CS_OFFSET); - break; - - case BCM_CMD_STOP: - writel((CS_CMD_CMD_STOP << CS_CMD_SHIFT) | - (CS_EN_CMD_ENABLE_BSC << CS_EN_SHIFT), - dev->base + CS_OFFSET); - break; - - default: - printf("Unknown command %d\n", cmd); - } -} - -static void bcm_kona_i2c_enable_clock(struct bcm_kona_i2c_dev *dev) -{ - writel(readl(dev->base + CLKEN_OFFSET) | CLKEN_CLKEN_MASK, - dev->base + CLKEN_OFFSET); -} - -static void bcm_kona_i2c_disable_clock(struct bcm_kona_i2c_dev *dev) -{ - writel(readl(dev->base + CLKEN_OFFSET) & ~CLKEN_CLKEN_MASK, - dev->base + CLKEN_OFFSET); -} - -/* Wait until at least one of the mask bit(s) are set */ -static unsigned long wait_for_int_timeout(struct bcm_kona_i2c_dev *dev, - unsigned long time_left, - uint32_t mask) -{ - uint32_t status; - - while (time_left) { - status = readl(dev->base + ISR_OFFSET); - - if ((status & ~ISR_RESERVED_MASK) == 0) { - debug("Bogus I2C interrupt 0x%x\n", status); - continue; - } - - /* Must flush the TX FIFO when NAK detected */ - if (status & ISR_NOACK_MASK) - writel(TXFCR_FIFO_FLUSH_MASK | TXFCR_FIFO_EN_MASK, - dev->base + TXFCR_OFFSET); - - writel(status & ~ISR_RESERVED_MASK, dev->base + ISR_OFFSET); - - if (status & mask) { - /* We are done since one of the mask bits are set */ - return time_left; - } - udelay(WAIT_INT_CHK); - time_left -= WAIT_INT_CHK; - } - return 0; -} - -/* Send command to I2C bus */ -static int bcm_kona_send_i2c_cmd(struct bcm_kona_i2c_dev *dev, - enum bcm_kona_cmd_t cmd) -{ - int rc = 0; - unsigned long time_left = I2C_TIMEOUT; - - /* Send the command */ - bcm_kona_i2c_send_cmd_to_ctrl(dev, cmd); - - /* Wait for transaction to finish or timeout */ - time_left = wait_for_int_timeout(dev, time_left, IER_I2C_INT_EN_MASK); - - if (!time_left) { - printf("controller timed out\n"); - rc = -ETIMEDOUT; - } - - /* Clear command */ - bcm_kona_i2c_send_cmd_to_ctrl(dev, BCM_CMD_NOACTION); - - return rc; -} - -/* Read a single RX FIFO worth of data from the i2c bus */ -static int bcm_kona_i2c_read_fifo_single(struct bcm_kona_i2c_dev *dev, - uint8_t *buf, unsigned int len, - unsigned int last_byte_nak) -{ - unsigned long time_left = I2C_TIMEOUT; - - /* Start the RX FIFO */ - writel((last_byte_nak << RXFCR_NACK_EN_SHIFT) | - (len << RXFCR_READ_COUNT_SHIFT), dev->base + RXFCR_OFFSET); - - /* Wait for FIFO read to complete */ - time_left = - wait_for_int_timeout(dev, time_left, IER_READ_COMPLETE_INT_MASK); - - if (!time_left) { - printf("RX FIFO time out\n"); - return -EREMOTEIO; - } - - /* Read data from FIFO */ - for (; len > 0; len--, buf++) - *buf = readl(dev->base + RXFIFORDOUT_OFFSET); - - return 0; -} - -/* Read any amount of data using the RX FIFO from the i2c bus */ -static int bcm_kona_i2c_read_fifo(struct bcm_kona_i2c_dev *dev, - struct kona_i2c_msg *msg) -{ - unsigned int bytes_to_read = MAX_RX_FIFO_SIZE; - unsigned int last_byte_nak = 0; - unsigned int bytes_read = 0; - int rc; - - uint8_t *tmp_buf = msg->buf; - - while (bytes_read < msg->len) { - if (msg->len - bytes_read <= MAX_RX_FIFO_SIZE) { - last_byte_nak = 1; /* NAK last byte of transfer */ - bytes_to_read = msg->len - bytes_read; - } - - rc = bcm_kona_i2c_read_fifo_single(dev, tmp_buf, bytes_to_read, - last_byte_nak); - if (rc < 0) - return -EREMOTEIO; - - bytes_read += bytes_to_read; - tmp_buf += bytes_to_read; - } - - return 0; -} - -/* Write a single byte of data to the i2c bus */ -static int bcm_kona_i2c_write_byte(struct bcm_kona_i2c_dev *dev, uint8_t data, - unsigned int nak_expected) -{ - unsigned long time_left = I2C_TIMEOUT; - unsigned int nak_received; - - /* Clear pending session done interrupt */ - writel(ISR_SES_DONE_MASK, dev->base + ISR_OFFSET); - - /* Send one byte of data */ - writel(data, dev->base + DAT_OFFSET); - - time_left = wait_for_int_timeout(dev, time_left, IER_I2C_INT_EN_MASK); - - if (!time_left) { - debug("controller timed out\n"); - return -ETIMEDOUT; - } - - nak_received = readl(dev->base + CS_OFFSET) & CS_ACK_MASK ? 1 : 0; - - if (nak_received ^ nak_expected) { - debug("unexpected NAK/ACK\n"); - return -EREMOTEIO; - } - - return 0; -} - -/* Write a single TX FIFO worth of data to the i2c bus */ -static int bcm_kona_i2c_write_fifo_single(struct bcm_kona_i2c_dev *dev, - uint8_t *buf, unsigned int len) -{ - int k; - unsigned long time_left = I2C_TIMEOUT; - unsigned int fifo_status; - - /* Write data into FIFO */ - for (k = 0; k < len; k++) - writel(buf[k], (dev->base + DAT_OFFSET)); - - /* Wait for FIFO to empty */ - do { - time_left = - wait_for_int_timeout(dev, time_left, - (IER_FIFO_INT_EN_MASK | - IER_NOACK_EN_MASK)); - fifo_status = readl(dev->base + FIFO_STATUS_OFFSET); - } while (time_left && !(fifo_status & FIFO_STATUS_TXFIFO_EMPTY_MASK)); - - /* Check if there was a NAK */ - if (readl(dev->base + CS_OFFSET) & CS_ACK_MASK) { - printf("unexpected NAK\n"); - return -EREMOTEIO; - } - - /* Check if a timeout occurred */ - if (!time_left) { - printf("completion timed out\n"); - return -EREMOTEIO; - } - - return 0; -} - -/* Write any amount of data using TX FIFO to the i2c bus */ -static int bcm_kona_i2c_write_fifo(struct bcm_kona_i2c_dev *dev, - struct kona_i2c_msg *msg) -{ - unsigned int bytes_to_write = MAX_TX_FIFO_SIZE; - unsigned int bytes_written = 0; - int rc; - - uint8_t *tmp_buf = msg->buf; - - while (bytes_written < msg->len) { - if (msg->len - bytes_written <= MAX_TX_FIFO_SIZE) - bytes_to_write = msg->len - bytes_written; - - rc = bcm_kona_i2c_write_fifo_single(dev, tmp_buf, - bytes_to_write); - if (rc < 0) - return -EREMOTEIO; - - bytes_written += bytes_to_write; - tmp_buf += bytes_to_write; - } - - return 0; -} - -/* Send i2c address */ -static int bcm_kona_i2c_do_addr(struct bcm_kona_i2c_dev *dev, - struct kona_i2c_msg *msg) -{ - unsigned char addr; - - if (msg->flags & I2C_M_TEN) { - /* First byte is 11110XX0 where XX is upper 2 bits */ - addr = 0xf0 | ((msg->addr & 0x300) >> 7); - if (bcm_kona_i2c_write_byte(dev, addr, 0) < 0) - return -EREMOTEIO; - - /* Second byte is the remaining 8 bits */ - addr = msg->addr & 0xff; - if (bcm_kona_i2c_write_byte(dev, addr, 0) < 0) - return -EREMOTEIO; - - if (msg->flags & I2C_M_RD) { - /* For read, send restart command */ - if (bcm_kona_send_i2c_cmd(dev, BCM_CMD_RESTART) < 0) - return -EREMOTEIO; - - /* Then re-send the first byte with the read bit set */ - addr = 0xf0 | ((msg->addr & 0x300) >> 7) | 0x01; - if (bcm_kona_i2c_write_byte(dev, addr, 0) < 0) - return -EREMOTEIO; - } - } else { - addr = msg->addr << 1; - - if (msg->flags & I2C_M_RD) - addr |= 1; - - if (bcm_kona_i2c_write_byte(dev, addr, 0) < 0) - return -EREMOTEIO; - } - - return 0; -} - -static void bcm_kona_i2c_enable_autosense(struct bcm_kona_i2c_dev *dev) -{ - writel(readl(dev->base + CLKEN_OFFSET) & ~CLKEN_AUTOSENSE_OFF_MASK, - dev->base + CLKEN_OFFSET); -} - -static void bcm_kona_i2c_config_timing(struct bcm_kona_i2c_dev *dev) -{ - writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK, - dev->base + HSTIM_OFFSET); - - writel((dev->std_cfg->prescale << TIM_PRESCALE_SHIFT) | - (dev->std_cfg->time_p << TIM_P_SHIFT) | - (dev->std_cfg->no_div << TIM_NO_DIV_SHIFT) | - (dev->std_cfg->time_div << TIM_DIV_SHIFT), - dev->base + TIM_OFFSET); - - writel((dev->std_cfg->time_m << CLKEN_M_SHIFT) | - (dev->std_cfg->time_n << CLKEN_N_SHIFT) | - CLKEN_CLKEN_MASK, dev->base + CLKEN_OFFSET); -} - -/* Master transfer function */ -static int bcm_kona_i2c_xfer(struct bcm_kona_i2c_dev *dev, - struct kona_i2c_msg msgs[], int num) -{ - struct kona_i2c_msg *pmsg; - int rc = 0; - int i; - - /* Enable pad output */ - writel(0, dev->base + PADCTL_OFFSET); - - /* Enable internal clocks */ - bcm_kona_i2c_enable_clock(dev); - - /* Send start command */ - rc = bcm_kona_send_i2c_cmd(dev, BCM_CMD_START); - if (rc < 0) { - printf("Start command failed rc = %d\n", rc); - goto xfer_disable_pad; - } - - /* Loop through all messages */ - for (i = 0; i < num; i++) { - pmsg = &msgs[i]; - - /* Send restart for subsequent messages */ - if ((i != 0) && ((pmsg->flags & I2C_M_NOSTART) == 0)) { - rc = bcm_kona_send_i2c_cmd(dev, BCM_CMD_RESTART); - if (rc < 0) { - printf("restart cmd failed rc = %d\n", rc); - goto xfer_send_stop; - } - } - - /* Send slave address */ - if (!(pmsg->flags & I2C_M_NOSTART)) { - rc = bcm_kona_i2c_do_addr(dev, pmsg); - if (rc < 0) { - debug("NAK from addr %2.2x msg#%d rc = %d\n", - pmsg->addr, i, rc); - goto xfer_send_stop; - } - } - - /* Perform data transfer */ - if (pmsg->flags & I2C_M_RD) { - rc = bcm_kona_i2c_read_fifo(dev, pmsg); - if (rc < 0) { - printf("read failure\n"); - goto xfer_send_stop; - } - } else { - rc = bcm_kona_i2c_write_fifo(dev, pmsg); - if (rc < 0) { - printf("write failure"); - goto xfer_send_stop; - } - } - } - - rc = num; - -xfer_send_stop: - /* Send a STOP command */ - bcm_kona_send_i2c_cmd(dev, BCM_CMD_STOP); - -xfer_disable_pad: - /* Disable pad output */ - writel(PADCTL_PAD_OUT_EN_MASK, dev->base + PADCTL_OFFSET); - - /* Stop internal clock */ - bcm_kona_i2c_disable_clock(dev); - - return rc; -} - -static uint bcm_kona_i2c_assign_bus_speed(struct bcm_kona_i2c_dev *dev, - uint speed) -{ - switch (speed) { - case I2C_SPEED_STANDARD_RATE: - dev->std_cfg = &std_cfg_table[IC_SPEED_MODE_STANDARD]; - break; - case I2C_SPEED_FAST_RATE: - dev->std_cfg = &std_cfg_table[IC_SPEED_MODE_FAST]; - break; - case I2C_SPEED_FAST_PLUS_RATE: - dev->std_cfg = &std_cfg_table[IC_SPEED_MODE_FAST_PLUS]; - break; - default: - printf("%d hz bus speed not supported\n", speed); - return -EINVAL; - } - dev->speed = speed; - return 0; -} - -static void bcm_kona_i2c_init(struct bcm_kona_i2c_dev *dev) -{ - /* Parse bus speed */ - bcm_kona_i2c_assign_bus_speed(dev, dev->speed); - - /* Enable internal clocks */ - bcm_kona_i2c_enable_clock(dev); - - /* Configure internal dividers */ - bcm_kona_i2c_config_timing(dev); - - /* Disable timeout */ - writel(0, dev->base + TOUT_OFFSET); - - /* Enable autosense */ - bcm_kona_i2c_enable_autosense(dev); - - /* Enable TX FIFO */ - writel(TXFCR_FIFO_FLUSH_MASK | TXFCR_FIFO_EN_MASK, - dev->base + TXFCR_OFFSET); - - /* Mask all interrupts */ - writel(0, dev->base + IER_OFFSET); - - /* Clear all pending interrupts */ - writel(ISR_CMDBUSY_MASK | - ISR_READ_COMPLETE_MASK | - ISR_SES_DONE_MASK | - ISR_ERR_MASK | - ISR_TXFIFOEMPTY_MASK | ISR_NOACK_MASK, dev->base + ISR_OFFSET); - - /* Enable the controller but leave it idle */ - bcm_kona_i2c_send_cmd_to_ctrl(dev, BCM_CMD_NOACTION); - - /* Disable pad output */ - writel(PADCTL_PAD_OUT_EN_MASK, dev->base + PADCTL_OFFSET); -} - -/* - * uboot layer - */ -struct bcm_kona_i2c_dev *kona_get_dev(struct i2c_adapter *adap) -{ - return &g_i2c_devs[adap->hwadapnr]; -} - -static void kona_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr) -{ - struct bcm_kona_i2c_dev *dev = kona_get_dev(adap); - - if (clk_bsc_enable(dev->base)) - return; - - bcm_kona_i2c_init(dev); -} - -static int kona_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr, - int alen, uchar *buffer, int len) -{ - /* msg[0] writes the addr, msg[1] reads the data */ - struct kona_i2c_msg msg[2]; - unsigned char msgbuf0[64]; - struct bcm_kona_i2c_dev *dev = kona_get_dev(adap); - - msg[0].addr = chip; - msg[0].flags = 0; - msg[0].len = 1; - msg[0].buf = msgbuf0; /* msgbuf0 contains incrementing reg addr */ - - msg[1].addr = chip; - msg[1].flags = I2C_M_RD; - /* msg[1].buf dest ptr increments each read */ - - msgbuf0[0] = (unsigned char)addr; - msg[1].buf = buffer; - msg[1].len = len; - if (bcm_kona_i2c_xfer(dev, msg, 2) < 0) { - /* Sending 2 i2c messages */ - kona_i2c_init(adap, adap->speed, adap->slaveaddr); - debug("I2C read: I/O error\n"); - return -EIO; - } - return 0; -} - -static int kona_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr, - int alen, uchar *buffer, int len) -{ - struct kona_i2c_msg msg[1]; - unsigned char msgbuf0[64]; - unsigned int i; - struct bcm_kona_i2c_dev *dev = kona_get_dev(adap); - - msg[0].addr = chip; - msg[0].flags = 0; - msg[0].len = 2; /* addr byte plus data */ - msg[0].buf = msgbuf0; - - for (i = 0; i < len; i++) { - msgbuf0[0] = addr++; - msgbuf0[1] = buffer[i]; - if (bcm_kona_i2c_xfer(dev, msg, 1) < 0) { - kona_i2c_init(adap, adap->speed, adap->slaveaddr); - debug("I2C write: I/O error\n"); - return -EIO; - } - } - return 0; -} - -static int kona_i2c_probe(struct i2c_adapter *adap, uchar chip) -{ - uchar tmp; - - /* - * read addr 0x0 of the given chip. - */ - return kona_i2c_read(adap, chip, 0x0, 1, &tmp, 1); -} - -static uint kona_i2c_set_bus_speed(struct i2c_adapter *adap, uint speed) -{ - struct bcm_kona_i2c_dev *dev = kona_get_dev(adap); - return bcm_kona_i2c_assign_bus_speed(dev, speed); -} - -/* - * Register kona i2c adapters. Keep the order below so - * that the bus number matches the adapter number. - */ -#define DEF_ADAPTER(num) \ -U_BOOT_I2C_ADAP_COMPLETE(kona##num, kona_i2c_init, kona_i2c_probe, \ - kona_i2c_read, kona_i2c_write, \ - kona_i2c_set_bus_speed, DEF_SPD, 0x00, num) - -#ifdef CONFIG_SYS_I2C_BASE0 - DEF_ADAPTER(0) -#endif -#ifdef CONFIG_SYS_I2C_BASE1 - DEF_ADAPTER(1) -#endif -#ifdef CONFIG_SYS_I2C_BASE2 - DEF_ADAPTER(2) -#endif -#ifdef CONFIG_SYS_I2C_BASE3 - DEF_ADAPTER(3) -#endif -#ifdef CONFIG_SYS_I2C_BASE4 - DEF_ADAPTER(4) -#endif -#ifdef CONFIG_SYS_I2C_BASE5 - DEF_ADAPTER(5) -#endif diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c index 6cecec41450..3335d9482a2 100644 --- a/drivers/i2c/sh_i2c.c +++ b/drivers/i2c/sh_i2c.c @@ -172,14 +172,9 @@ static int sh_i2c_raw_read(struct sh_i2c *dev, u8 chip, u8 addr) { int ret = -1; -#if defined(CONFIG_SH73A0) - if (sh_i2c_set_addr(dev, chip, addr, 0) != 0) - goto exit0; -#else if (sh_i2c_set_addr(dev, chip, addr, 1) != 0) goto exit0; udelay(100); -#endif writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RTS|SH_I2C_ICCR_BUSY), &dev->iccr); sh_irq_dte(dev); diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index d494639cd95..3b792f2a14c 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -29,7 +29,6 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_SANDBOX) += spltest_sandbox.o endif endif -obj-$(CONFIG_ALI152X) += ali512x.o obj-$(CONFIG_ALTERA_SYSID) += altera_sysid.o obj-$(CONFIG_ATSHA204A) += atsha204a-i2c.o obj-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o @@ -37,7 +36,6 @@ obj-$(CONFIG_DS4510) += ds4510.o obj-$(CONFIG_FSL_DEVICE_DISABLE) += fsl_devdis.o obj-$(CONFIG_FSL_IFC) += fsl_ifc.o obj-$(CONFIG_FSL_IIM) += fsl_iim.o -obj-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o obj-$(CONFIG_FSL_SEC_MON) += fsl_sec_mon.o obj-$(CONFIG_$(SPL_)FS_LOADER) += fs_loader.o obj-$(CONFIG_GATEWORKS_SC) += gsc.o diff --git a/drivers/misc/ali512x.c b/drivers/misc/ali512x.c deleted file mode 100644 index e714e28bdc3..00000000000 --- a/drivers/misc/ali512x.c +++ /dev/null @@ -1,401 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2002 - * Daniel Engström, Omicron Ceti AB <daniel@omicron.se>. - */ - -/* - * Based on sc520cdp.c from rolo 1.6: - *---------------------------------------------------------------------- - * (C) Copyright 2000 - * Sysgo Real-Time Solutions GmbH - * Klein-Winternheim, Germany - *---------------------------------------------------------------------- - */ - -#include <config.h> - -#include <common.h> -#include <asm/io.h> -#include <ali512x.h> - - -/* ALI M5123 Logical device numbers: - * 0 FDC - * 1 unused? - * 2 unused? - * 3 lpt - * 4 UART1 - * 5 UART2 - * 6 RTC - * 7 mouse/kbd - * 8 CIO - */ - -/* - ************************************************************ - * Some access primitives for the ALi chip: * - ************************************************************ - */ - -static void ali_write(u8 index, u8 value) -{ - /* write an arbirary register */ - outb(index, ALI_INDEX); - outb(value, ALI_DATA); -} - -#if 0 -static int ali_read(u8 index) -{ - outb(index, ALI_INDEX); - return inb(ALI_DATA); -} -#endif - -#define ALI_OPEN() \ - outb(0x51, ALI_INDEX); \ - outb(0x23, ALI_INDEX) - - -#define ALI_CLOSE() \ - outb(0xbb, ALI_INDEX) - -/* Select a logical device */ -#define ALI_SELDEV(dev) \ - ali_write(0x07, dev) - - -void ali512x_init(void) -{ - ALI_OPEN(); - - ali_write(0x02, 0x01); /* soft reset */ - ali_write(0x03, 0x03); /* disable access to CIOs */ - ali_write(0x22, 0x00); /* disable direct powerdown */ - ali_write(0x23, 0x00); /* disable auto powerdown */ - ali_write(0x24, 0x00); /* IR 8 is active hi, pin26 is PDIR */ - - ALI_CLOSE(); -} - -void ali512x_set_fdc(int enabled, u16 io, u8 irq, u8 dma_channel) -{ - ALI_OPEN(); - ALI_SELDEV(0); - - ali_write(0x30, enabled?1:0); - if (enabled) { - ali_write(0x60, io >> 8); - ali_write(0x61, io & 0xff); - ali_write(0x70, irq); - ali_write(0x74, dma_channel); - - /* AT mode, no drive swap */ - ali_write(0xf0, 0x08); - ali_write(0xf1, 0x00); - ali_write(0xf2, 0xff); - ali_write(0xf4, 0x00); - } - ALI_CLOSE(); -} - - -void ali512x_set_pp(int enabled, u16 io, u8 irq, u8 dma_channel) -{ - ALI_OPEN(); - ALI_SELDEV(3); - - ali_write(0x30, enabled?1:0); - if (enabled) { - ali_write(0x60, io >> 8); - ali_write(0x61, io & 0xff); - ali_write(0x70, irq); - ali_write(0x74, dma_channel); - - /* mode: EPP 1.9, ECP FIFO threshold = 7, IRQ active low */ - ali_write(0xf0, 0xbc); - /* 12 MHz, Burst DMA in ECP */ - ali_write(0xf1, 0x05); - } - ALI_CLOSE(); - -} - -void ali512x_set_uart(int enabled, int index, u16 io, u8 irq) -{ - ALI_OPEN(); - ALI_SELDEV(index?5:4); - - ali_write(0x30, enabled?1:0); - if (enabled) { - ali_write(0x60, io >> 8); - ali_write(0x61, io & 0xff); - ali_write(0x70, irq); - - ali_write(0xf0, 0x00); - ali_write(0xf1, 0x00); - - /* huh? write 0xf2 twice - a typo in rolo - * or some secret ali errata? Who knows? - */ - if (index) { - ali_write(0xf2, 0x00); - } - ali_write(0xf2, 0x0c); - } - ALI_CLOSE(); - -} - -void ali512x_set_uart2_irda(int enabled) -{ - ALI_OPEN(); - ALI_SELDEV(5); - - ali_write(0xf1, enabled?0x48:0x00); /* fullduplex IrDa */ - ALI_CLOSE(); - -} - -void ali512x_set_rtc(int enabled, u16 io, u8 irq) -{ - ALI_OPEN(); - ALI_SELDEV(6); - - ali_write(0x30, enabled?1:0); - if (enabled) { - ali_write(0x60, io >> 8); - ali_write(0x61, io & 0xff); - ali_write(0x70, irq); - - ali_write(0xf0, 0x00); - } - ALI_CLOSE(); -} - -void ali512x_set_kbc(int enabled, u8 kbc_irq, u8 mouse_irq) -{ - ALI_OPEN(); - ALI_SELDEV(7); - - ali_write(0x30, enabled?1:0); - if (enabled) { - ali_write(0x70, kbc_irq); - ali_write(0x72, mouse_irq); - - ali_write(0xf0, 0x00); - } - ALI_CLOSE(); -} - - -/* Common I/O - * - * (This descripotsion is base on several incompete sources - * since I have not been able to obtain any datasheet for the device - * there may be some mis-understandings burried in here. - * -- Daniel daniel@omicron.se) - * - * There are 22 CIO pins numbered - * 10-17 - * 20-25 - * 30-37 - * - * 20-24 are dedicated CIO pins, the other 17 are muliplexed with - * other functions. - * - * Secondary - * CIO Pin Function Decription - * ======================================================= - * CIO10 IRQIN1 Interrupt input 1? - * CIO11 IRQIN2 Interrupt input 2? - * CIO12 IRRX IrDa Receive - * CIO13 IRTX IrDa Transmit - * CIO14 P21 KBC P21 fucntion - * CIO15 P20 KBC P21 fucntion - * CIO16 I2C_CLK I2C Clock - * CIO17 I2C_DAT I2C Data - * - * CIO20 - - * CIO21 - - * CIO22 - - * CIO23 - - * CIO24 - - * CIO25 LOCK Keylock - * - * CIO30 KBC_CLK Keybaord Clock - * CIO31 CS0J General Chip Select decoder CS0J - * CIO32 CS1J General Chip Select decoder CS1J - * CIO33 ALT_KCLK Alternative Keyboard Clock - * CIO34 ALT_KDAT Alternative Keyboard Data - * CIO35 ALT_MCLK Alternative Mouse Clock - * CIO36 ALT_MDAT Alternative Mouse Data - * CIO37 ALT_KBC Alternative KBC select - * - * The CIO use an indirect address scheme. - * - * Reigster 3 in the SIO is used to select the index and data - * port addresses where the CIO I/O registers show up. - * The function selection registers are accessible under - * function SIO 8. - * - * SIO reigster 3 (CIO Address Selection) bit definitions: - * bit 7 CIO index and data registers enabled - * bit 1-0 CIO indirect registers port address select - * 0 index = 0xE0 data = 0xE1 - * 1 index = 0xE2 data = 0xE3 - * 2 index = 0xE4 data = 0xE5 - * 3 index = 0xEA data = 0xEB - * - * There are three CIO I/O register accessed via CIO index port and CIO data port - * 0x01 CIO 10-17 data - * 0x02 CIO 20-25 data (bits 7-6 unused) - * 0x03 CIO 30-37 data - * - * - * The pin function is accessed through normal - * SIO registers, each register have the same format: - * - * Bit Function Value - * 0 Input/output 1=input - * 1 Polarity of signal 1=inverted - * 2 Unused ?? - * 3 Function (normal or special) 1=special - * 7-4 Unused - * - * SIO REG - * 0xe0 CIO 10 Config - * 0xe1 CIO 11 Config - * 0xe2 CIO 12 Config - * 0xe3 CIO 13 Config - * 0xe4 CIO 14 Config - * 0xe5 CIO 15 Config - * 0xe6 CIO 16 Config - * 0xe7 CIO 16 Config - * - * 0xe8 CIO 20 Config - * 0xe9 CIO 21 Config - * 0xea CIO 22 Config - * 0xeb CIO 23 Config - * 0xec CIO 24 Config - * 0xed CIO 25 Config - * - * 0xf5 CIO 30 Config - * 0xf6 CIO 31 Config - * 0xf7 CIO 32 Config - * 0xf8 CIO 33 Config - * 0xf9 CIO 34 Config - * 0xfa CIO 35 Config - * 0xfb CIO 36 Config - * 0xfc CIO 37 Config - * - */ - -#define ALI_CIO_PORT_SEL 0x83 -#define ALI_CIO_INDEX 0xea -#define ALI_CIO_DATA 0xeb - -void ali512x_set_cio(int enabled) -{ - int i; - - ALI_OPEN(); - - if (enabled) { - ali_write(0x3, ALI_CIO_PORT_SEL); /* Enable CIO data register */ - } else { - ali_write(0x3, ALI_CIO_PORT_SEL & ~0x80); - } - - ALI_SELDEV(8); - - ali_write(0x30, enabled?1:0); - - /* set all pins to input to start with */ - for (i=0xe0;i<0xee;i++) { - ali_write(i, 1); - } - - for (i=0xf5;i<0xfe;i++) { - ali_write(i, 1); - } - - ALI_CLOSE(); -} - - -void ali512x_cio_function(int pin, int special, int inv, int input) -{ - u8 data; - u8 addr; - - /* valid pins are 10-17, 20-25 and 30-37 */ - if (pin >= 10 && pin <= 17) { - addr = 0xe0+(pin&7); - } else if (pin >= 20 && pin <= 25) { - addr = 0xe8+(pin&7); - } else if (pin >= 30 && pin <= 37) { - addr = 0xf5+(pin&7); - } else { - return; - } - - ALI_OPEN(); - - ALI_SELDEV(8); - - - data=0xf4; - if (special) { - data |= 0x08; - } else { - if (inv) { - data |= 0x02; - } - if (input) { - data |= 0x01; - } - } - - ali_write(addr, data); - - ALI_CLOSE(); -} - -void ali512x_cio_out(int pin, int value) -{ - u8 reg; - u8 data; - u8 bit; - - reg = pin/10; - bit = 1 << (pin%10); - - - outb(reg, ALI_CIO_INDEX); /* select I/O register */ - data = inb(ALI_CIO_DATA); - if (value) { - data |= bit; - } else { - data &= ~bit; - } - outb(data, ALI_CIO_DATA); -} - -int ali512x_cio_in(int pin) -{ - u8 reg; - u8 data; - u8 bit; - - /* valid pins are 10-17, 20-25 and 30-37 */ - reg = pin/10; - bit = 1 << (pin%10); - - - outb(reg, ALI_CIO_INDEX); /* select I/O register */ - data = inb(ALI_CIO_DATA); - - return data & bit; -} diff --git a/drivers/misc/mc9sdz60.c b/drivers/misc/mc9sdz60.c deleted file mode 100644 index e68a056a559..00000000000 --- a/drivers/misc/mc9sdz60.c +++ /dev/null @@ -1,34 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2010 Stefano Babic <sbabic@denx.de> - */ - - -#include <config.h> -#include <common.h> -#include <linux/errno.h> -#include <linux/types.h> -#include <i2c.h> -#include <mc9sdz60.h> - -#ifndef CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR -#error "You have to configure I2C address for MC9SDZ60" -#endif - - -u8 mc9sdz60_reg_read(enum mc9sdz60_reg reg) -{ - u8 val; - - if (i2c_read(CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR, reg, 1, &val, 1)) { - puts("Error reading MC9SDZ60 register\n"); - return -1; - } - - return val; -} - -void mc9sdz60_reg_write(enum mc9sdz60_reg reg, u8 val) -{ - i2c_write(CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR, reg, 1, &val, 1); -} diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile index 7320d581e2f..666323e2219 100644 --- a/drivers/mtd/nand/raw/Makefile +++ b/drivers/mtd/nand/raw/Makefile @@ -56,8 +56,6 @@ obj-$(CONFIG_NAND_DENALI) += denali.o obj-$(CONFIG_NAND_DENALI_DT) += denali_dt.o obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_nand.o -obj-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o -obj-$(CONFIG_NAND_FSMC) += fsmc_nand.o obj-$(CONFIG_NAND_KB9202) += kb9202_nand.o obj-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o obj-$(CONFIG_NAND_KMETER1) += kmeter1_nand.o @@ -70,11 +68,9 @@ obj-$(CONFIG_NAND_MXS_DT) += mxs_nand_dt.o obj-$(CONFIG_NAND_OCTEONTX) += octeontx_nand.o obj-$(CONFIG_NAND_OCTEONTX_HW_ECC) += octeontx_bch.o obj-$(CONFIG_NAND_PXA3XX) += pxa3xx_nand.o -obj-$(CONFIG_NAND_SPEAR) += spr_nand.o obj-$(CONFIG_TEGRA_NAND) += tegra_nand.o obj-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o obj-$(CONFIG_NAND_OMAP_ELM) += omap_elm.o -obj-$(CONFIG_NAND_PLAT) += nand_plat.o obj-$(CONFIG_NAND_SUNXI) += sunxi_nand.o obj-$(CONFIG_NAND_MXIC) += mxic_nand.o obj-$(CONFIG_NAND_ZYNQ) += zynq_nand.o diff --git a/drivers/mtd/nand/raw/fsl_upm.c b/drivers/mtd/nand/raw/fsl_upm.c deleted file mode 100644 index 91cc1339537..00000000000 --- a/drivers/mtd/nand/raw/fsl_upm.c +++ /dev/null @@ -1,187 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * FSL UPM NAND driver - * - * Copyright (C) 2007 MontaVista Software, Inc. - * Anton Vorontsov <avorontsov@ru.mvista.com> - */ - -#include <config.h> -#include <common.h> -#include <log.h> -#include <asm/io.h> -#include <linux/delay.h> -#include <linux/errno.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/rawnand.h> -#include <linux/mtd/fsl_upm.h> -#include <nand.h> - -static void fsl_upm_start_pattern(struct fsl_upm *upm, u32 pat_offset) -{ - clrsetbits_be32(upm->mxmr, MxMR_MAD_MSK, MxMR_OP_RUNP | pat_offset); - (void)in_be32(upm->mxmr); -} - -static void fsl_upm_end_pattern(struct fsl_upm *upm) -{ - clrbits_be32(upm->mxmr, MxMR_OP_RUNP); - - while (in_be32(upm->mxmr) & MxMR_OP_RUNP) - eieio(); -} - -static void fsl_upm_run_pattern(struct fsl_upm *upm, int width, - void __iomem *io_addr, u32 mar) -{ - out_be32(upm->mar, mar); - (void)in_be32(upm->mar); - switch (width) { - case 8: - out_8(io_addr, 0x0); - break; - case 16: - out_be16(io_addr, 0x0); - break; - case 32: - out_be32(io_addr, 0x0); - break; - } -} - -static void fun_wait(struct fsl_upm_nand *fun) -{ - if (fun->dev_ready) { - while (!fun->dev_ready(fun->chip_nr)) - debug("unexpected busy state\n"); - } else { - /* - * If the R/B pin is not connected, - * a short delay is necessary. - */ - udelay(1); - } -} - -#if CONFIG_SYS_NAND_MAX_CHIPS > 1 -static void fun_select_chip(struct mtd_info *mtd, int chip_nr) -{ - struct nand_chip *chip = mtd_to_nand(mtd); - struct fsl_upm_nand *fun = nand_get_controller_data(chip); - - if (chip_nr >= 0) { - fun->chip_nr = chip_nr; - chip->IO_ADDR_R = chip->IO_ADDR_W = - fun->upm.io_addr + fun->chip_offset * chip_nr; - } else if (chip_nr == -1) { - chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE); - } -} -#endif - -static void fun_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) -{ - struct nand_chip *chip = mtd_to_nand(mtd); - struct fsl_upm_nand *fun = nand_get_controller_data(chip); - void __iomem *io_addr; - u32 mar; - - if (!(ctrl & fun->last_ctrl)) { - fsl_upm_end_pattern(&fun->upm); - - if (cmd == NAND_CMD_NONE) - return; - - fun->last_ctrl = ctrl & (NAND_ALE | NAND_CLE); - } - - if (ctrl & NAND_CTRL_CHANGE) { - if (ctrl & NAND_ALE) - fsl_upm_start_pattern(&fun->upm, fun->upm_addr_offset); - else if (ctrl & NAND_CLE) - fsl_upm_start_pattern(&fun->upm, fun->upm_cmd_offset); - } - - mar = cmd << (32 - fun->width); - io_addr = fun->upm.io_addr; -#if CONFIG_SYS_NAND_MAX_CHIPS > 1 - if (fun->chip_nr > 0) { - io_addr += fun->chip_offset * fun->chip_nr; - if (fun->upm_mar_chip_offset) - mar |= fun->upm_mar_chip_offset * fun->chip_nr; - } -#endif - fsl_upm_run_pattern(&fun->upm, fun->width, io_addr, mar); - - /* - * Some boards/chips needs this. At least the MPC8360E-RDK - * needs it. Probably weird chip, because I don't see any - * need for this on MPC8555E + Samsung K9F1G08U0A. Usually - * here are 0-2 unexpected busy states per block read. - */ - if (fun->wait_flags & FSL_UPM_WAIT_RUN_PATTERN) - fun_wait(fun); -} - -static u8 upm_nand_read_byte(struct mtd_info *mtd) -{ - struct nand_chip *chip = mtd_to_nand(mtd); - - return in_8(chip->IO_ADDR_R); -} - -static void upm_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len) -{ - int i; - struct nand_chip *chip = mtd_to_nand(mtd); - struct fsl_upm_nand *fun = nand_get_controller_data(chip); - - for (i = 0; i < len; i++) { - out_8(chip->IO_ADDR_W, buf[i]); - if (fun->wait_flags & FSL_UPM_WAIT_WRITE_BYTE) - fun_wait(fun); - } - - if (fun->wait_flags & FSL_UPM_WAIT_WRITE_BUFFER) - fun_wait(fun); -} - -static void upm_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len) -{ - int i; - struct nand_chip *chip = mtd_to_nand(mtd); - - for (i = 0; i < len; i++) - buf[i] = in_8(chip->IO_ADDR_R); -} - -static int nand_dev_ready(struct mtd_info *mtd) -{ - struct nand_chip *chip = mtd_to_nand(mtd); - struct fsl_upm_nand *fun = nand_get_controller_data(chip); - - return fun->dev_ready(fun->chip_nr); -} - -int fsl_upm_nand_init(struct nand_chip *chip, struct fsl_upm_nand *fun) -{ - if (fun->width != 8 && fun->width != 16 && fun->width != 32) - return -ENOSYS; - - fun->last_ctrl = NAND_CLE; - - nand_set_controller_data(chip, fun); - chip->chip_delay = fun->chip_delay; - chip->ecc.mode = NAND_ECC_SOFT; - chip->cmd_ctrl = fun_cmd_ctrl; -#if CONFIG_SYS_NAND_MAX_CHIPS > 1 - chip->select_chip = fun_select_chip; -#endif - chip->read_byte = upm_nand_read_byte; - chip->read_buf = upm_nand_read_buf; - chip->write_buf = upm_nand_write_buf; - if (fun->dev_ready) - chip->dev_ready = nand_dev_ready; - - return 0; -} diff --git a/drivers/mtd/nand/raw/fsmc_nand.c b/drivers/mtd/nand/raw/fsmc_nand.c deleted file mode 100644 index d795864949c..00000000000 --- a/drivers/mtd/nand/raw/fsmc_nand.c +++ /dev/null @@ -1,470 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2010 - * Vipin Kumar, STMicroelectronics, vipin.kumar@st.com. - * - * (C) Copyright 2012 - * Amit Virdi, STMicroelectronics, amit.virdi@st.com. - */ - -#include <common.h> -#include <nand.h> -#include <asm/io.h> -#include <linux/bitops.h> -#include <linux/err.h> -#include <linux/mtd/nand_ecc.h> -#include <linux/mtd/rawnand.h> -#include <linux/mtd/fsmc_nand.h> -#include <asm/arch/hardware.h> - -static u32 fsmc_version; -static struct fsmc_regs *const fsmc_regs_p = (struct fsmc_regs *) - CONFIG_SYS_FSMC_BASE; - -/* - * ECC4 and ECC1 have 13 bytes and 3 bytes of ecc respectively for 512 bytes of - * data. ECC4 can correct up to 8 bits in 512 bytes of data while ECC1 can - * correct 1 bit in 512 bytes - */ - -static struct nand_ecclayout fsmc_ecc4_lp_layout = { - .eccbytes = 104, - .eccpos = { 2, 3, 4, 5, 6, 7, 8, - 9, 10, 11, 12, 13, 14, - 18, 19, 20, 21, 22, 23, 24, - 25, 26, 27, 28, 29, 30, - 34, 35, 36, 37, 38, 39, 40, - 41, 42, 43, 44, 45, 46, - 50, 51, 52, 53, 54, 55, 56, - 57, 58, 59, 60, 61, 62, - 66, 67, 68, 69, 70, 71, 72, - 73, 74, 75, 76, 77, 78, - 82, 83, 84, 85, 86, 87, 88, - 89, 90, 91, 92, 93, 94, - 98, 99, 100, 101, 102, 103, 104, - 105, 106, 107, 108, 109, 110, - 114, 115, 116, 117, 118, 119, 120, - 121, 122, 123, 124, 125, 126 - }, - .oobfree = { - {.offset = 15, .length = 3}, - {.offset = 31, .length = 3}, - {.offset = 47, .length = 3}, - {.offset = 63, .length = 3}, - {.offset = 79, .length = 3}, - {.offset = 95, .length = 3}, - {.offset = 111, .length = 3}, - {.offset = 127, .length = 1} - } -}; - -/* - * ECC4 layout for NAND of pagesize 4096 bytes & OOBsize 224 bytes. 13*8 bytes - * of OOB size is reserved for ECC, Byte no. 0 & 1 reserved for bad block & 118 - * bytes are free for use. - */ -static struct nand_ecclayout fsmc_ecc4_224_layout = { - .eccbytes = 104, - .eccpos = { 2, 3, 4, 5, 6, 7, 8, - 9, 10, 11, 12, 13, 14, - 18, 19, 20, 21, 22, 23, 24, - 25, 26, 27, 28, 29, 30, - 34, 35, 36, 37, 38, 39, 40, - 41, 42, 43, 44, 45, 46, - 50, 51, 52, 53, 54, 55, 56, - 57, 58, 59, 60, 61, 62, - 66, 67, 68, 69, 70, 71, 72, - 73, 74, 75, 76, 77, 78, - 82, 83, 84, 85, 86, 87, 88, - 89, 90, 91, 92, 93, 94, - 98, 99, 100, 101, 102, 103, 104, - 105, 106, 107, 108, 109, 110, - 114, 115, 116, 117, 118, 119, 120, - 121, 122, 123, 124, 125, 126 - }, - .oobfree = { - {.offset = 15, .length = 3}, - {.offset = 31, .length = 3}, - {.offset = 47, .length = 3}, - {.offset = 63, .length = 3}, - {.offset = 79, .length = 3}, - {.offset = 95, .length = 3}, - {.offset = 111, .length = 3}, - {.offset = 127, .length = 97} - } -}; - -/* - * ECC placement definitions in oobfree type format - * There are 13 bytes of ecc for every 512 byte block and it has to be read - * consecutively and immediately after the 512 byte data block for hardware to - * generate the error bit offsets in 512 byte data - * Managing the ecc bytes in the following way makes it easier for software to - * read ecc bytes consecutive to data bytes. This way is similar to - * oobfree structure maintained already in u-boot nand driver - */ -static struct fsmc_eccplace fsmc_eccpl_lp = { - .eccplace = { - {.offset = 2, .length = 13}, - {.offset = 18, .length = 13}, - {.offset = 34, .length = 13}, - {.offset = 50, .length = 13}, - {.offset = 66, .length = 13}, - {.offset = 82, .length = 13}, - {.offset = 98, .length = 13}, - {.offset = 114, .length = 13} - } -}; - -static struct nand_ecclayout fsmc_ecc4_sp_layout = { - .eccbytes = 13, - .eccpos = { 0, 1, 2, 3, 6, 7, 8, - 9, 10, 11, 12, 13, 14 - }, - .oobfree = { - {.offset = 15, .length = 1}, - } -}; - -static struct fsmc_eccplace fsmc_eccpl_sp = { - .eccplace = { - {.offset = 0, .length = 4}, - {.offset = 6, .length = 9} - } -}; - -static struct nand_ecclayout fsmc_ecc1_layout = { - .eccbytes = 24, - .eccpos = {2, 3, 4, 18, 19, 20, 34, 35, 36, 50, 51, 52, - 66, 67, 68, 82, 83, 84, 98, 99, 100, 114, 115, 116}, - .oobfree = { - {.offset = 8, .length = 8}, - {.offset = 24, .length = 8}, - {.offset = 40, .length = 8}, - {.offset = 56, .length = 8}, - {.offset = 72, .length = 8}, - {.offset = 88, .length = 8}, - {.offset = 104, .length = 8}, - {.offset = 120, .length = 8} - } -}; - -/* Count the number of 0's in buff upto a max of max_bits */ -static int count_written_bits(uint8_t *buff, int size, int max_bits) -{ - int k, written_bits = 0; - - for (k = 0; k < size; k++) { - written_bits += hweight8(~buff[k]); - if (written_bits > max_bits) - break; - } - - return written_bits; -} - -static void fsmc_nand_hwcontrol(struct mtd_info *mtd, int cmd, uint ctrl) -{ - struct nand_chip *this = mtd_to_nand(mtd); - ulong IO_ADDR_W; - - if (ctrl & NAND_CTRL_CHANGE) { - IO_ADDR_W = (ulong)this->IO_ADDR_W; - - IO_ADDR_W &= ~(CONFIG_SYS_NAND_CLE | CONFIG_SYS_NAND_ALE); - if (ctrl & NAND_CLE) - IO_ADDR_W |= CONFIG_SYS_NAND_CLE; - if (ctrl & NAND_ALE) - IO_ADDR_W |= CONFIG_SYS_NAND_ALE; - - if (ctrl & NAND_NCE) { - writel(readl(&fsmc_regs_p->pc) | - FSMC_ENABLE, &fsmc_regs_p->pc); - } else { - writel(readl(&fsmc_regs_p->pc) & - ~FSMC_ENABLE, &fsmc_regs_p->pc); - } - this->IO_ADDR_W = (void *)IO_ADDR_W; - } - - if (cmd != NAND_CMD_NONE) - writeb(cmd, this->IO_ADDR_W); -} - -static int fsmc_bch8_correct_data(struct mtd_info *mtd, u_char *dat, - u_char *read_ecc, u_char *calc_ecc) -{ - /* The calculated ecc is actually the correction index in data */ - u32 err_idx[8]; - u32 num_err, i; - u32 ecc1, ecc2, ecc3, ecc4; - - num_err = (readl(&fsmc_regs_p->sts) >> 10) & 0xF; - - if (likely(num_err == 0)) - return 0; - - if (unlikely(num_err > 8)) { - /* - * This is a temporary erase check. A newly erased page read - * would result in an ecc error because the oob data is also - * erased to FF and the calculated ecc for an FF data is not - * FF..FF. - * This is a workaround to skip performing correction in case - * data is FF..FF - * - * Logic: - * For every page, each bit written as 0 is counted until these - * number of bits are greater than 8 (the maximum correction - * capability of FSMC for each 512 + 13 bytes) - */ - - int bits_ecc = count_written_bits(read_ecc, 13, 8); - int bits_data = count_written_bits(dat, 512, 8); - - if ((bits_ecc + bits_data) <= 8) { - if (bits_data) - memset(dat, 0xff, 512); - return bits_data + bits_ecc; - } - - return -EBADMSG; - } - - ecc1 = readl(&fsmc_regs_p->ecc1); - ecc2 = readl(&fsmc_regs_p->ecc2); - ecc3 = readl(&fsmc_regs_p->ecc3); - ecc4 = readl(&fsmc_regs_p->sts); - - err_idx[0] = (ecc1 >> 0) & 0x1FFF; - err_idx[1] = (ecc1 >> 13) & 0x1FFF; - err_idx[2] = (((ecc2 >> 0) & 0x7F) << 6) | ((ecc1 >> 26) & 0x3F); - err_idx[3] = (ecc2 >> 7) & 0x1FFF; - err_idx[4] = (((ecc3 >> 0) & 0x1) << 12) | ((ecc2 >> 20) & 0xFFF); - err_idx[5] = (ecc3 >> 1) & 0x1FFF; - err_idx[6] = (ecc3 >> 14) & 0x1FFF; - err_idx[7] = (((ecc4 >> 16) & 0xFF) << 5) | ((ecc3 >> 27) & 0x1F); - - i = 0; - while (i < num_err) { - err_idx[i] ^= 3; - - if (err_idx[i] < 512 * 8) - __change_bit(err_idx[i], dat); - - i++; - } - - return num_err; -} - -static int fsmc_read_hwecc(struct mtd_info *mtd, - const u_char *data, u_char *ecc) -{ - u_int ecc_tmp; - int timeout = CONFIG_SYS_HZ; - ulong start; - - switch (fsmc_version) { - case FSMC_VER8: - start = get_timer(0); - while (get_timer(start) < timeout) { - /* - * Busy waiting for ecc computation - * to finish for 512 bytes - */ - if (readl(&fsmc_regs_p->sts) & FSMC_CODE_RDY) - break; - } - - ecc_tmp = readl(&fsmc_regs_p->ecc1); - ecc[0] = (u_char) (ecc_tmp >> 0); - ecc[1] = (u_char) (ecc_tmp >> 8); - ecc[2] = (u_char) (ecc_tmp >> 16); - ecc[3] = (u_char) (ecc_tmp >> 24); - - ecc_tmp = readl(&fsmc_regs_p->ecc2); - ecc[4] = (u_char) (ecc_tmp >> 0); - ecc[5] = (u_char) (ecc_tmp >> 8); - ecc[6] = (u_char) (ecc_tmp >> 16); - ecc[7] = (u_char) (ecc_tmp >> 24); - - ecc_tmp = readl(&fsmc_regs_p->ecc3); - ecc[8] = (u_char) (ecc_tmp >> 0); - ecc[9] = (u_char) (ecc_tmp >> 8); - ecc[10] = (u_char) (ecc_tmp >> 16); - ecc[11] = (u_char) (ecc_tmp >> 24); - - ecc_tmp = readl(&fsmc_regs_p->sts); - ecc[12] = (u_char) (ecc_tmp >> 16); - break; - - default: - ecc_tmp = readl(&fsmc_regs_p->ecc1); - ecc[0] = (u_char) (ecc_tmp >> 0); - ecc[1] = (u_char) (ecc_tmp >> 8); - ecc[2] = (u_char) (ecc_tmp >> 16); - break; - } - - return 0; -} - -void fsmc_enable_hwecc(struct mtd_info *mtd, int mode) -{ - writel(readl(&fsmc_regs_p->pc) & ~FSMC_ECCPLEN_256, - &fsmc_regs_p->pc); - writel(readl(&fsmc_regs_p->pc) & ~FSMC_ECCEN, - &fsmc_regs_p->pc); - writel(readl(&fsmc_regs_p->pc) | FSMC_ECCEN, - &fsmc_regs_p->pc); -} - -/* - * fsmc_read_page_hwecc - * @mtd: mtd info structure - * @chip: nand chip info structure - * @buf: buffer to store read data - * @oob_required: caller expects OOB data read to chip->oob_poi - * @page: page number to read - * - * This routine is needed for fsmc verison 8 as reading from NAND chip has to be - * performed in a strict sequence as follows: - * data(512 byte) -> ecc(13 byte) - * After this read, fsmc hardware generates and reports error data bits(upto a - * max of 8 bits) - */ -static int fsmc_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, - uint8_t *buf, int oob_required, int page) -{ - struct fsmc_eccplace *fsmc_eccpl; - int i, j, s, stat, eccsize = chip->ecc.size; - int eccbytes = chip->ecc.bytes; - int eccsteps = chip->ecc.steps; - uint8_t *p = buf; - uint8_t *ecc_calc = chip->buffers->ecccalc; - uint8_t *ecc_code = chip->buffers->ecccode; - int off, len, group = 0; - uint8_t oob[13] __attribute__ ((aligned (2))); - - /* Differentiate between small and large page ecc place definitions */ - if (mtd->writesize == 512) - fsmc_eccpl = &fsmc_eccpl_sp; - else - fsmc_eccpl = &fsmc_eccpl_lp; - - for (i = 0, s = 0; s < eccsteps; s++, i += eccbytes, p += eccsize) { - - chip->cmdfunc(mtd, NAND_CMD_READ0, s * eccsize, page); - chip->ecc.hwctl(mtd, NAND_ECC_READ); - chip->read_buf(mtd, p, eccsize); - - for (j = 0; j < eccbytes;) { - off = fsmc_eccpl->eccplace[group].offset; - len = fsmc_eccpl->eccplace[group].length; - group++; - - /* - * length is intentionally kept a higher multiple of 2 - * to read at least 13 bytes even in case of 16 bit NAND - * devices - */ - if (chip->options & NAND_BUSWIDTH_16) - len = roundup(len, 2); - chip->cmdfunc(mtd, NAND_CMD_READOOB, off, page); - chip->read_buf(mtd, oob + j, len); - j += len; - } - - memcpy(&ecc_code[i], oob, 13); - chip->ecc.calculate(mtd, p, &ecc_calc[i]); - - stat = chip->ecc.correct(mtd, p, &ecc_code[i], - &ecc_calc[i]); - if (stat < 0) - mtd->ecc_stats.failed++; - else - mtd->ecc_stats.corrected += stat; - } - - return 0; -} - -int fsmc_nand_init(struct nand_chip *nand) -{ - static int chip_nr; - struct mtd_info *mtd; - u32 peripid2 = readl(&fsmc_regs_p->peripid2); - - fsmc_version = (peripid2 >> FSMC_REVISION_SHFT) & - FSMC_REVISION_MSK; - - writel(readl(&fsmc_regs_p->ctrl) | FSMC_WP, &fsmc_regs_p->ctrl); - -#if defined(CONFIG_SYS_FSMC_NAND_16BIT) - writel(FSMC_DEVWID_16 | FSMC_DEVTYPE_NAND | FSMC_ENABLE | FSMC_WAITON, - &fsmc_regs_p->pc); -#elif defined(CONFIG_SYS_FSMC_NAND_8BIT) - writel(FSMC_DEVWID_8 | FSMC_DEVTYPE_NAND | FSMC_ENABLE | FSMC_WAITON, - &fsmc_regs_p->pc); -#else -#error Please define CONFIG_SYS_FSMC_NAND_16BIT or CONFIG_SYS_FSMC_NAND_8BIT -#endif - writel(readl(&fsmc_regs_p->pc) | FSMC_TCLR_1 | FSMC_TAR_1, - &fsmc_regs_p->pc); - writel(FSMC_THIZ_1 | FSMC_THOLD_4 | FSMC_TWAIT_6 | FSMC_TSET_0, - &fsmc_regs_p->comm); - writel(FSMC_THIZ_1 | FSMC_THOLD_4 | FSMC_TWAIT_6 | FSMC_TSET_0, - &fsmc_regs_p->attrib); - - nand->options = 0; -#if defined(CONFIG_SYS_FSMC_NAND_16BIT) - nand->options |= NAND_BUSWIDTH_16; -#endif - nand->ecc.mode = NAND_ECC_HW; - nand->ecc.size = 512; - nand->ecc.calculate = fsmc_read_hwecc; - nand->ecc.hwctl = fsmc_enable_hwecc; - nand->cmd_ctrl = fsmc_nand_hwcontrol; - nand->IO_ADDR_R = nand->IO_ADDR_W = - (void __iomem *)CFG_SYS_NAND_BASE; - nand->badblockbits = 7; - - mtd = nand_to_mtd(nand); - - switch (fsmc_version) { - case FSMC_VER8: - nand->ecc.bytes = 13; - nand->ecc.strength = 8; - nand->ecc.correct = fsmc_bch8_correct_data; - nand->ecc.read_page = fsmc_read_page_hwecc; - if (mtd->writesize == 512) - nand->ecc.layout = &fsmc_ecc4_sp_layout; - else { - if (mtd->oobsize == 224) - nand->ecc.layout = &fsmc_ecc4_224_layout; - else - nand->ecc.layout = &fsmc_ecc4_lp_layout; - } - - break; - default: - nand->ecc.bytes = 3; - nand->ecc.strength = 1; - nand->ecc.layout = &fsmc_ecc1_layout; - nand->ecc.correct = nand_correct_data; - break; - } - - /* Detect NAND chips */ - if (nand_scan_ident(mtd, CONFIG_SYS_MAX_NAND_DEVICE, NULL)) - return -ENXIO; - - if (nand_scan_tail(mtd)) - return -ENXIO; - - if (nand_register(chip_nr++, mtd)) - return -ENXIO; - - return 0; -} diff --git a/drivers/mtd/nand/raw/nand_plat.c b/drivers/mtd/nand/raw/nand_plat.c deleted file mode 100644 index 81e7aa218d5..00000000000 --- a/drivers/mtd/nand/raw/nand_plat.c +++ /dev/null @@ -1,65 +0,0 @@ -/* - * Genericish driver for memory mapped NAND devices - * - * Copyright (c) 2006-2009 Analog Devices Inc. - * Licensed under the GPL-2 or later. - */ - -/* Your board must implement the following macros: - * NAND_PLAT_WRITE_CMD(chip, cmd) - * NAND_PLAT_WRITE_ADR(chip, cmd) - * NAND_PLAT_INIT() - * - * It may also implement the following: - * NAND_PLAT_DEV_READY(chip) - */ - -#include <common.h> -#include <linux/mtd/rawnand.h> -#include <asm/io.h> -#ifdef NAND_PLAT_GPIO_DEV_READY -# include <asm/gpio.h> -# define NAND_PLAT_DEV_READY(chip) gpio_get_value(NAND_PLAT_GPIO_DEV_READY) -#endif - -#include <nand.h> - -static void plat_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) -{ - struct nand_chip *this = mtd_to_nand(mtd); - - if (cmd == NAND_CMD_NONE) - return; - - if (ctrl & NAND_CLE) - NAND_PLAT_WRITE_CMD(this, cmd); - else - NAND_PLAT_WRITE_ADR(this, cmd); -} - -#ifdef NAND_PLAT_DEV_READY -static int plat_dev_ready(struct mtd_info *mtd) -{ - return NAND_PLAT_DEV_READY((struct nand_chip *)mtd_to_nand(mtd)); -} -#else -# define plat_dev_ready NULL -#endif - -int board_nand_init(struct nand_chip *nand) -{ -#ifdef NAND_PLAT_GPIO_DEV_READY - gpio_request(NAND_PLAT_GPIO_DEV_READY, "nand-plat"); - gpio_direction_input(NAND_PLAT_GPIO_DEV_READY); -#endif - -#ifdef NAND_PLAT_INIT - NAND_PLAT_INIT(); -#endif - - nand->cmd_ctrl = plat_cmd_ctrl; - nand->dev_ready = plat_dev_ready; - nand->ecc.mode = NAND_ECC_SOFT; - - return 0; -} diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile index d393f1ba031..49506e7ba59 100644 --- a/drivers/pci/Makefile +++ b/drivers/pci/Makefile @@ -22,7 +22,6 @@ obj-$(CONFIG_PCI_MVEBU) += pci_mvebu.o obj-$(CONFIG_PCI_RCAR_GEN2) += pci-rcar-gen2.o obj-$(CONFIG_PCI_RCAR_GEN3) += pci-rcar-gen3.o obj-$(CONFIG_SH7751_PCI) +=pci_sh7751.o -obj-$(CONFIG_SH7780_PCI) +=pci_sh7780.o obj-$(CONFIG_PCI_TEGRA) += pci_tegra.o obj-$(CONFIG_PCIE_IPROC) += pcie_iproc.o obj-$(CONFIG_PCI_AARDVARK) += pci-aardvark.o diff --git a/drivers/pci/pci_sh7780.c b/drivers/pci/pci_sh7780.c deleted file mode 100644 index 7533286c015..00000000000 --- a/drivers/pci/pci_sh7780.c +++ /dev/null @@ -1,92 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * SH7780 PCI Controller (PCIC) for U-Boot. - * (C) Dustin McIntire (dustin@sensoria.com) - * (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> - * (C) 2008 Yusuke Goda <goda.yusuke@renesas.com> - */ - -#include <common.h> -#include <linux/delay.h> - -#include <pci.h> -#include <asm/processor.h> -#include <asm/pci.h> -#include <asm/io.h> - -#define SH7780_VENDOR_ID 0x1912 -#define SH7780_DEVICE_ID 0x0002 -#define SH7780_PCICR_PREFIX 0xA5000000 -#define SH7780_PCICR_PFCS 0x00000800 -#define SH7780_PCICR_FTO 0x00000400 -#define SH7780_PCICR_PFE 0x00000200 -#define SH7780_PCICR_TBS 0x00000100 -#define SH7780_PCICR_ARBM 0x00000040 -#define SH7780_PCICR_IOCS 0x00000004 -#define SH7780_PCICR_PRST 0x00000002 -#define SH7780_PCICR_CFIN 0x00000001 - -#define p4_in(addr) (*(vu_long *)addr) -#define p4_out(data, addr) (*(vu_long *)addr) = (data) -#define p4_inw(addr) (*(vu_short *)addr) -#define p4_outw(data, addr) (*(vu_short *)addr) = (data) - -int pci_sh4_read_config_dword(struct pci_controller *hose, - pci_dev_t dev, int offset, u32 *value) -{ - u32 par_data = PCI_CONF1_ADDRESS(PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev), offset); - - p4_out(par_data, SH7780_PCIPAR); - *value = p4_in(SH7780_PCIPDR); - - return 0; -} - -int pci_sh4_write_config_dword(struct pci_controller *hose, - pci_dev_t dev, int offset, u32 value) -{ - u32 par_data = PCI_CONF1_ADDRESS(PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev), offset); - - p4_out(par_data, SH7780_PCIPAR); - p4_out(value, SH7780_PCIPDR); - return 0; -} - -int pci_sh7780_init(struct pci_controller *hose) -{ - p4_out(0x01, SH7780_PCIECR); - - if (p4_inw(SH7780_PCIVID) != SH7780_VENDOR_ID - && p4_inw(SH7780_PCIDID) != SH7780_DEVICE_ID) { - printf("PCI: Unknown PCI host bridge.\n"); - return -1; - } - printf("PCI: SH7780 PCI host bridge found.\n"); - - /* Toggle PCI reset pin */ - p4_out((SH7780_PCICR_PREFIX | SH7780_PCICR_PRST), SH7780_PCICR); - udelay(100000); - p4_out(SH7780_PCICR_PREFIX, SH7780_PCICR); - p4_outw(0x0047, SH7780_PCICMD); - - p4_out(CONFIG_SH7780_PCI_LSR, SH7780_PCILSR0); - p4_out(CONFIG_SH7780_PCI_LAR, SH7780_PCILAR0); - p4_out(0x00000000, SH7780_PCILSR1); - p4_out(0, SH7780_PCILAR1); - p4_out(CONFIG_SH7780_PCI_BAR, SH7780_PCIMBAR0); - p4_out(0x00000000, SH7780_PCIMBAR1); - - p4_out(0xFD000000, SH7780_PCIMBR0); - p4_out(0x00FC0000, SH7780_PCIMBMR0); - - /* if use Operand Cache then enable PCICSCR Soonp bits. */ - p4_out(0x08000000, SH7780_PCICSAR0); - p4_out(0x0000001B, SH7780_PCICSCR0); /* Snoop bit :On */ - - p4_out((SH7780_PCICR_PREFIX | SH7780_PCICR_CFIN | SH7780_PCICR_ARBM - | SH7780_PCICR_FTO | SH7780_PCICR_PFCS | SH7780_PCICR_PFE), - SH7780_PCICR); - - pci_sh4_init(hose); - return 0; -} diff --git a/drivers/power/Makefile b/drivers/power/Makefile index f805027784d..ba64b2c5938 100644 --- a/drivers/power/Makefile +++ b/drivers/power/Makefile @@ -4,10 +4,7 @@ # Tom Rix <Tom.Rix at windriver.com> obj-$(CONFIG_$(SPL_TPL_)ACPI_PMC) += acpi_pmc/ -obj-y += battery/ obj-$(CONFIG_$(SPL_TPL_)POWER_DOMAIN) += domain/ -obj-y += fuel_gauge/ -obj-y += mfd/ obj-y += pmic/ obj-y += regulator/ @@ -18,7 +15,6 @@ obj-$(CONFIG_AXP305_POWER) += axp305.o obj-$(CONFIG_AXP809_POWER) += axp809.o obj-$(CONFIG_AXP818_POWER) += axp818.o obj-$(CONFIG_EXYNOS_TMU) += exynos-tmu.o -obj-$(CONFIG_FTPMU010_POWER) += ftpmu010.o obj-$(CONFIG_SY8106A_POWER) += sy8106a.o obj-$(CONFIG_TPS6586X_POWER) += tps6586x.o obj-$(CONFIG_TWL4030_POWER) += twl4030.o diff --git a/drivers/power/battery/Makefile b/drivers/power/battery/Makefile deleted file mode 100644 index 370923a6ed9..00000000000 --- a/drivers/power/battery/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2012 Samsung Electronics -# Lukasz Majewski <l.majewski@samsung.com> - -obj-$(CONFIG_POWER_BATTERY_TRATS) += bat_trats.o -obj-$(CONFIG_POWER_BATTERY_TRATS2) += bat_trats2.o diff --git a/drivers/power/battery/bat_trats.c b/drivers/power/battery/bat_trats.c deleted file mode 100644 index 54b2bf91e5c..00000000000 --- a/drivers/power/battery/bat_trats.c +++ /dev/null @@ -1,91 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2012 Samsung Electronics - * Lukasz Majewski <l.majewski@samsung.com> - */ - -#include <common.h> -#include <console.h> -#include <log.h> -#include <linux/delay.h> -#include <power/pmic.h> -#include <power/battery.h> -#include <power/max8997_pmic.h> -#include <errno.h> - -static struct battery battery_trats; - -static int power_battery_charge(struct pmic *bat) -{ - struct power_battery *p_bat = bat->pbat; - struct battery *battery = p_bat->bat; - int k; - - if (bat->chrg->chrg_state(p_bat->chrg, PMIC_CHARGER_ENABLE, 450)) - return -1; - - for (k = 0; bat->chrg->chrg_bat_present(p_bat->chrg) && - bat->chrg->chrg_type(p_bat->muic) && - battery->state_of_chrg < 100; k++) { - udelay(2000000); - if (!(k % 5)) - puts("."); - bat->fg->fg_battery_update(p_bat->fg, bat); - - if (k == 200) { - debug(" %d [V]", battery->voltage_uV); - puts("\n"); - k = 0; - } - - if (ctrlc()) { - printf("\nCharging disabled on request.\n"); - goto exit; - } - } - exit: - bat->chrg->chrg_state(p_bat->chrg, PMIC_CHARGER_DISABLE, 0); - - return 0; -} - -static int power_battery_init_trats(struct pmic *bat_, - struct pmic *fg_, - struct pmic *chrg_, - struct pmic *muic_) -{ - bat_->pbat->fg = fg_; - bat_->pbat->chrg = chrg_; - bat_->pbat->muic = muic_; - - bat_->fg = fg_->fg; - bat_->chrg = chrg_->chrg; - bat_->chrg->chrg_type = muic_->chrg->chrg_type; - return 0; -} - -static struct power_battery power_bat_trats = { - .bat = &battery_trats, - .battery_init = power_battery_init_trats, - .battery_charge = power_battery_charge, -}; - -int power_bat_init(unsigned char bus) -{ - static const char name[] = "BAT_TRATS"; - struct pmic *p = pmic_alloc(); - - if (!p) { - printf("%s: POWER allocation error!\n", __func__); - return -ENOMEM; - } - - debug("Board BAT init\n"); - - p->interface = PMIC_NONE; - p->name = name; - p->bus = bus; - - p->pbat = &power_bat_trats; - return 0; -} diff --git a/drivers/power/battery/bat_trats2.c b/drivers/power/battery/bat_trats2.c deleted file mode 100644 index 1172970d1e0..00000000000 --- a/drivers/power/battery/bat_trats2.c +++ /dev/null @@ -1,65 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2013 Samsung Electronics - * Piotr Wilczek <p.wilczek@samsung.com> - */ - -#include <common.h> -#include <log.h> -#include <power/pmic.h> -#include <power/battery.h> -#include <power/max77693_pmic.h> -#include <errno.h> - -static struct battery battery_trats; - -static int power_battery_charge(struct pmic *bat) -{ - struct power_battery *p_bat = bat->pbat; - - if (bat->chrg->chrg_state(p_bat->chrg, PMIC_CHARGER_ENABLE, 450)) - return -EINVAL; - - return 0; -} - -static int power_battery_init_trats2(struct pmic *bat_, - struct pmic *fg_, - struct pmic *chrg_, - struct pmic *muic_) -{ - bat_->pbat->fg = fg_; - bat_->pbat->chrg = chrg_; - bat_->pbat->muic = muic_; - - bat_->fg = fg_->fg; - bat_->chrg = chrg_->chrg; - bat_->chrg->chrg_type = muic_->chrg->chrg_type; - return 0; -} - -static struct power_battery power_bat_trats2 = { - .bat = &battery_trats, - .battery_init = power_battery_init_trats2, - .battery_charge = power_battery_charge, -}; - -int power_bat_init(unsigned char bus) -{ - static const char name[] = "BAT_TRATS2"; - struct pmic *p = pmic_alloc(); - - if (!p) { - printf("%s: POWER allocation error!\n", __func__); - return -ENOMEM; - } - - debug("Board BAT init\n"); - - p->interface = PMIC_NONE; - p->name = name; - p->bus = bus; - - p->pbat = &power_bat_trats2; - return 0; -} diff --git a/drivers/power/ftpmu010.c b/drivers/power/ftpmu010.c deleted file mode 100644 index 9a48b36554d..00000000000 --- a/drivers/power/ftpmu010.c +++ /dev/null @@ -1,87 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2009 Faraday Technology - * Po-Yu Chuang <ratbert@faraday-tech.com> - * - * Copyright (C) 2010 Andes Technology Corporation - * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com> - * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com> - */ - -#include <common.h> -#include <asm/io.h> -#include <faraday/ftpmu010.h> - -/* OSCC: OSC Control Register */ -void ftpmu010_32768osc_enable(void) -{ - static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; - unsigned int oscc; - - /* enable the 32768Hz oscillator */ - oscc = readl(&pmu->OSCC); - oscc &= ~(FTPMU010_OSCC_OSCL_OFF | FTPMU010_OSCC_OSCL_TRI); - writel(oscc, &pmu->OSCC); - - /* wait until ready */ - while (!(readl(&pmu->OSCC) & FTPMU010_OSCC_OSCL_STABLE)) - ; - - /* select 32768Hz oscillator */ - oscc = readl(&pmu->OSCC); - oscc |= FTPMU010_OSCC_OSCL_RTCLSEL; - writel(oscc, &pmu->OSCC); -} - -/* MFPSR: Multi-Function Port Setting Register */ -void ftpmu010_mfpsr_select_dev(unsigned int dev) -{ - static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; - unsigned int mfpsr; - - mfpsr = readl(&pmu->MFPSR); - mfpsr |= dev; - writel(mfpsr, &pmu->MFPSR); -} - -void ftpmu010_mfpsr_diselect_dev(unsigned int dev) -{ - static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; - unsigned int mfpsr; - - mfpsr = readl(&pmu->MFPSR); - mfpsr &= ~dev; - writel(mfpsr, &pmu->MFPSR); -} - -/* PDLLCR0: PLL/DLL Control Register 0 */ -void ftpmu010_dlldis_disable(void) -{ - static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; - unsigned int pdllcr0; - - pdllcr0 = readl(&pmu->PDLLCR0); - pdllcr0 |= FTPMU010_PDLLCR0_DLLDIS; - writel(pdllcr0, &pmu->PDLLCR0); -} - -void ftpmu010_sdram_clk_disable(unsigned int cr0) -{ - static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; - unsigned int pdllcr0; - - pdllcr0 = readl(&pmu->PDLLCR0); - pdllcr0 |= FTPMU010_PDLLCR0_HCLKOUTDIS(cr0); - writel(pdllcr0, &pmu->PDLLCR0); -} - -/* SDRAMHTC: SDRAM Signal Hold Time Control */ -void ftpmu010_sdramhtc_set(unsigned int val) -{ - static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; - unsigned int sdramhtc; - - sdramhtc = readl(&pmu->SDRAMHTC); - sdramhtc |= val; - writel(sdramhtc, &pmu->SDRAMHTC); -} diff --git a/drivers/power/fuel_gauge/Makefile b/drivers/power/fuel_gauge/Makefile deleted file mode 100644 index ca2df947585..00000000000 --- a/drivers/power/fuel_gauge/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2012 Samsung Electronics -# Lukasz Majewski <l.majewski@samsung.com> - -obj-$(CONFIG_POWER_FG_MAX17042) += fg_max17042.o diff --git a/drivers/power/fuel_gauge/fg_max17042.c b/drivers/power/fuel_gauge/fg_max17042.c deleted file mode 100644 index a395d587a86..00000000000 --- a/drivers/power/fuel_gauge/fg_max17042.c +++ /dev/null @@ -1,287 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2012 Samsung Electronics - * Lukasz Majewski <l.majewski@samsung.com> - */ - -#include <common.h> -#include <log.h> -#include <linux/delay.h> -#include <power/pmic.h> -#include <power/max17042_fg.h> -#include <i2c.h> -#include <power/max8997_pmic.h> -#include <power/power_chrg.h> -#include <power/battery.h> -#include <power/fg_battery_cell_params.h> -#include <errno.h> - -static int fg_write_regs(struct pmic *p, u8 addr, u16 *data, int num) -{ - int ret = 0; - int i; - - for (i = 0; i < num; i++, addr++) { - ret = pmic_reg_write(p, addr, *(data + i)); - if (ret) - return ret; - } - - return 0; -} - -static int fg_read_regs(struct pmic *p, u8 addr, u16 *data, int num) -{ - unsigned int dat; - int ret = 0; - int i; - - for (i = 0; i < num; i++, addr++) { - ret = pmic_reg_read(p, addr, &dat); - if (ret) - return ret; - - *(data + i) = (u16)dat; - } - - return 0; -} - -static int fg_write_and_verify(struct pmic *p, u8 addr, u16 data) -{ - unsigned int val = data; - int ret = 0; - - ret |= pmic_reg_write(p, addr, val); - ret |= pmic_reg_read(p, addr, &val); - - if (ret) - return ret; - - if (((u16) val) == data) - return 0; - - return -1; -} - -static void por_fuelgauge_init(struct pmic *p) -{ - u16 r_data0[16], r_data1[16], r_data2[16]; - u32 rewrite_count = 5; - u32 check_count; - u32 lock_count; - u32 i = 0; - u32 val; - s32 ret = 0; - char *status_msg; - - /* Delay 500 ms */ - mdelay(500); - /* Initilize Configuration */ - pmic_reg_write(p, MAX17042_CONFIG, 0x2310); - -rewrite_model: - check_count = 5; - lock_count = 5; - - if (!rewrite_count--) { - status_msg = "init failed!"; - goto error; - } - - /* Unlock Model Access */ - pmic_reg_write(p, MAX17042_MLOCKReg1, MODEL_UNLOCK1); - pmic_reg_write(p, MAX17042_MLOCKReg2, MODEL_UNLOCK2); - - /* Write/Read/Verify the Custom Model */ - ret = fg_write_regs(p, MAX17042_MODEL1, cell_character0, - ARRAY_SIZE(cell_character0)); - if (ret) - goto rewrite_model; - - ret = fg_write_regs(p, MAX17042_MODEL2, cell_character1, - ARRAY_SIZE(cell_character1)); - if (ret) - goto rewrite_model; - - ret = fg_write_regs(p, MAX17042_MODEL3, cell_character2, - ARRAY_SIZE(cell_character2)); - if (ret) - goto rewrite_model; - -check_model: - if (!check_count--) { - if (rewrite_count) - goto rewrite_model; - else - status_msg = "check failed!"; - - goto error; - } - - ret = fg_read_regs(p, MAX17042_MODEL1, r_data0, ARRAY_SIZE(r_data0)); - if (ret) - goto check_model; - - ret = fg_read_regs(p, MAX17042_MODEL2, r_data1, ARRAY_SIZE(r_data1)); - if (ret) - goto check_model; - - ret = fg_read_regs(p, MAX17042_MODEL3, r_data2, ARRAY_SIZE(r_data2)); - if (ret) - goto check_model; - - for (i = 0; i < 16; i++) { - if ((cell_character0[i] != r_data0[i]) - || (cell_character1[i] != r_data1[i]) - || (cell_character2[i] != r_data2[i])) - goto rewrite_model; - } - -lock_model: - if (!lock_count--) { - if (rewrite_count) - goto rewrite_model; - else - status_msg = "lock failed!"; - - goto error; - } - - /* Lock model access */ - pmic_reg_write(p, MAX17042_MLOCKReg1, MODEL_LOCK1); - pmic_reg_write(p, MAX17042_MLOCKReg2, MODEL_LOCK2); - - /* Verify the model access is locked */ - ret = fg_read_regs(p, MAX17042_MODEL1, r_data0, ARRAY_SIZE(r_data0)); - if (ret) - goto lock_model; - - ret = fg_read_regs(p, MAX17042_MODEL2, r_data1, ARRAY_SIZE(r_data1)); - if (ret) - goto lock_model; - - ret = fg_read_regs(p, MAX17042_MODEL3, r_data2, ARRAY_SIZE(r_data2)); - if (ret) - goto lock_model; - - for (i = 0; i < ARRAY_SIZE(r_data0); i++) { - /* Check if model locked */ - if (r_data0[i] || r_data1[i] || r_data2[i]) - goto lock_model; - } - - /* Write Custom Parameters */ - fg_write_and_verify(p, MAX17042_RCOMP0, RCOMP0); - fg_write_and_verify(p, MAX17042_TEMPCO, TempCo); - - /* Delay at least 350mS */ - mdelay(350); - - /* Initialization Complete */ - pmic_reg_read(p, MAX17042_STATUS, &val); - /* Write and Verify Status with POR bit Cleared */ - fg_write_and_verify(p, MAX17042_STATUS, val & ~MAX17042_POR); - - /* Delay at least 350 ms */ - mdelay(350); - - status_msg = "OK!"; -error: - debug("%s: model init status: %s\n", p->name, status_msg); - return; -} - -static int power_update_battery(struct pmic *p, struct pmic *bat) -{ - struct power_battery *pb = bat->pbat; - unsigned int val; - int ret = 0; - - if (pmic_probe(p)) { - puts("Can't find max17042 fuel gauge\n"); - return -ENODEV; - } - - ret |= pmic_reg_read(p, MAX17042_VFSOC, &val); - pb->bat->state_of_chrg = (val >> 8); - - pmic_reg_read(p, MAX17042_VCELL, &val); - debug("vfsoc: 0x%x\n", val); - pb->bat->voltage_uV = ((val & 0xFFUL) >> 3) + ((val & 0xFF00) >> 3); - pb->bat->voltage_uV = (pb->bat->voltage_uV * 625); - - pmic_reg_read(p, 0x05, &val); - pb->bat->capacity = val >> 2; - - return ret; -} - -static int power_check_battery(struct pmic *p, struct pmic *bat) -{ - struct power_battery *pb = bat->pbat; - unsigned int val; - int ret = 0; - - if (pmic_probe(p)) { - puts("Can't find max17042 fuel gauge\n"); - return -ENODEV; - } - - ret |= pmic_reg_read(p, MAX17042_STATUS, &val); - debug("fg status: 0x%x\n", val); - - if (val & MAX17042_POR) - por_fuelgauge_init(p); - - ret |= pmic_reg_read(p, MAX17042_VERSION, &val); - pb->bat->version = val; - - power_update_battery(p, bat); - debug("fg ver: 0x%x\n", pb->bat->version); - printf("BAT: state_of_charge(SOC):%d%%\n", - pb->bat->state_of_chrg); - - printf(" voltage: %d.%6.6d [V] (expected to be %d [mAh])\n", - pb->bat->voltage_uV / 1000000, - pb->bat->voltage_uV % 1000000, - pb->bat->capacity); - - if (pb->bat->voltage_uV > 3850000) - pb->bat->state = EXT_SOURCE; - else if (pb->bat->voltage_uV < 3600000 || pb->bat->state_of_chrg < 5) - pb->bat->state = CHARGE; - else - pb->bat->state = NORMAL; - - return ret; -} - -static struct power_fg power_fg_ops = { - .fg_battery_check = power_check_battery, - .fg_battery_update = power_update_battery, -}; - -int power_fg_init(unsigned char bus) -{ - static const char name[] = "MAX17042_FG"; - struct pmic *p = pmic_alloc(); - - if (!p) { - printf("%s: POWER allocation error!\n", __func__); - return -ENOMEM; - } - - debug("Board Fuel Gauge init\n"); - - p->name = name; - p->interface = PMIC_I2C; - p->number_of_regs = FG_NUM_OF_REGS; - p->hw.i2c.addr = MAX17042_I2C_ADDR; - p->hw.i2c.tx_num = 2; - p->sensor_byte_order = PMIC_SENSOR_BYTE_ORDER_BIG; - p->bus = bus; - - p->fg = &power_fg_ops; - return 0; -} diff --git a/drivers/power/mfd/Makefile b/drivers/power/mfd/Makefile deleted file mode 100644 index a8eb7f81e72..00000000000 --- a/drivers/power/mfd/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2013 Samsung Electronics -# Piotr Wilczek <p.wilczek@samsung.com> - -obj-$(CONFIG_POWER_PMIC_MAX77693) += pmic_max77693.o -obj-$(CONFIG_POWER_MUIC_MAX77693) += muic_max77693.o -obj-$(CONFIG_POWER_FG_MAX77693) += fg_max77693.o diff --git a/drivers/power/mfd/fg_max77693.c b/drivers/power/mfd/fg_max77693.c deleted file mode 100644 index 983a6d4a2bd..00000000000 --- a/drivers/power/mfd/fg_max77693.c +++ /dev/null @@ -1,137 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2013 Samsung Electronics - * Piotr Wilczek <p.wilczek@samsung.com> - */ - -#include <common.h> -#include <log.h> -#include <power/pmic.h> -#include <power/max77693_fg.h> -#include <i2c.h> -#include <power/power_chrg.h> -#include <power/battery.h> -#include <power/fg_battery_cell_params.h> -#include <errno.h> - -static int max77693_get_vcell(u32 *vcell) -{ - u16 value; - u8 ret; - - ret = i2c_read(MAX77693_FUEL_I2C_ADDR, MAX77693_VCELL, 1, - (u8 *)&value, 2); - if (ret) - return ret; - - *vcell = (u32)(value >> 3); - *vcell = *vcell * 625; - - return 0; -} - -static int max77693_get_soc(u32 *soc) -{ - u16 value; - u8 ret; - - ret = i2c_read(MAX77693_FUEL_I2C_ADDR, MAX77693_VFSOC, 1, - (u8 *)&value, 2); - if (ret) - return ret; - - *soc = (u32)(value >> 8); - - return 0; -} - -static int power_update_battery(struct pmic *p, struct pmic *bat) -{ - struct power_battery *pb = bat->pbat; - int ret; - - if (pmic_probe(p)) { - puts("Can't find max77693 fuel gauge\n"); - return -ENODEV; - } - - ret = max77693_get_soc(&pb->bat->state_of_chrg); - if (ret) - return ret; - - max77693_get_vcell(&pb->bat->voltage_uV); - - return 0; -} - -static int power_check_battery(struct pmic *p, struct pmic *bat) -{ - struct power_battery *pb = bat->pbat; - unsigned int val; - int ret = 0; - - if (pmic_probe(p)) { - puts("Can't find max77693 fuel gauge\n"); - return -ENODEV; - } - - ret = pmic_reg_read(p, MAX77693_STATUS, &val); - if (ret) - return ret; - debug("fg status: 0x%x\n", val); - - ret = pmic_reg_read(p, MAX77693_VERSION, &pb->bat->version); - if (ret) - return ret; - - ret = power_update_battery(p, bat); - if (ret) - return ret; - debug("fg ver: 0x%x\n", pb->bat->version); - printf("BAT: state_of_charge(SOC):%d%%\n", - pb->bat->state_of_chrg); - - printf(" voltage: %d.%6.6d [V] (expected to be %d [mAh])\n", - pb->bat->voltage_uV / 1000000, - pb->bat->voltage_uV % 1000000, - pb->bat->capacity); - - if (pb->bat->voltage_uV > 3850000) - pb->bat->state = EXT_SOURCE; - else if (pb->bat->voltage_uV < 3600000 || pb->bat->state_of_chrg < 5) - pb->bat->state = CHARGE; - else - pb->bat->state = NORMAL; - - return 0; -} - -static struct power_fg power_fg_ops = { - .fg_battery_check = power_check_battery, - .fg_battery_update = power_update_battery, -}; - -int power_fg_init(unsigned char bus) -{ - static const char name[] = "MAX77693_FG"; - struct pmic *p = pmic_alloc(); - - if (!p) { - printf("%s: POWER allocation error!\n", __func__); - return -ENOMEM; - } - - debug("Board Fuel Gauge init\n"); - - p->name = name; - p->interface = PMIC_I2C; - p->number_of_regs = FG_NUM_OF_REGS; - p->hw.i2c.addr = MAX77693_FUEL_I2C_ADDR; - p->hw.i2c.tx_num = 2; - p->sensor_byte_order = PMIC_SENSOR_BYTE_ORDER_BIG; - p->bus = bus; - - p->fg = &power_fg_ops; - - return 0; -} diff --git a/drivers/power/mfd/muic_max77693.c b/drivers/power/mfd/muic_max77693.c deleted file mode 100644 index 36ee44b9a2c..00000000000 --- a/drivers/power/mfd/muic_max77693.c +++ /dev/null @@ -1,77 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2013 Samsung Electronics - * Piotr Wilczek <p.wilczek@samsung.com> - */ - -#include <common.h> -#include <log.h> -#include <power/pmic.h> -#include <power/power_chrg.h> -#include <power/max77693_muic.h> -#include <i2c.h> -#include <errno.h> - -static int power_chrg_get_type(struct pmic *p) -{ - unsigned int val; - unsigned int charge_type, charger; - - /* if probe failed, return cable none */ - if (pmic_probe(p)) - return CHARGER_NO; - - pmic_reg_read(p, MAX77693_MUIC_STATUS2, &val); - - charge_type = val & MAX77693_MUIC_CHG_MASK; - - switch (charge_type) { - case MAX77693_MUIC_CHG_NO: - charger = CHARGER_NO; - break; - case MAX77693_MUIC_CHG_USB: - case MAX77693_MUIC_CHG_USB_D: - charger = CHARGER_USB; - break; - case MAX77693_MUIC_CHG_TA: - case MAX77693_MUIC_CHG_TA_1A: - charger = CHARGER_TA; - break; - case MAX77693_MUIC_CHG_TA_500: - charger = CHARGER_TA_500; - break; - default: - charger = CHARGER_UNKNOWN; - break; - } - - return charger; -} - -static struct power_chrg power_chrg_muic_ops = { - .chrg_type = power_chrg_get_type, -}; - -int power_muic_init(unsigned int bus) -{ - static const char name[] = "MAX77693_MUIC"; - struct pmic *p = pmic_alloc(); - - if (!p) { - printf("%s: POWER allocation error!\n", __func__); - return -ENOMEM; - } - - debug("Board Micro USB Interface Controller init\n"); - - p->name = name; - p->interface = PMIC_I2C; - p->number_of_regs = MUIC_NUM_OF_REGS; - p->hw.i2c.addr = MAX77693_MUIC_I2C_ADDR; - p->hw.i2c.tx_num = 1; - p->bus = bus; - - p->chrg = &power_chrg_muic_ops; - - return 0; -} diff --git a/drivers/power/mfd/pmic_max77693.c b/drivers/power/mfd/pmic_max77693.c deleted file mode 100644 index e32a9722a40..00000000000 --- a/drivers/power/mfd/pmic_max77693.c +++ /dev/null @@ -1,96 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2013 Samsung Electronics - * Piotr Wilczek <p.wilczek@samsung.com> - */ - -#include <common.h> -#include <log.h> -#include <power/pmic.h> -#include <power/max77693_pmic.h> -#include <i2c.h> -#include <errno.h> - -static int max77693_charger_state(struct pmic *p, int state, int current) -{ - unsigned int val; - - if (pmic_probe(p)) - return -ENODEV; - - /* unlock write capability */ - val = MAX77693_CHG_UNLOCK; - pmic_reg_write(p, MAX77693_CHG_CNFG_06, val); - - if (state == PMIC_CHARGER_DISABLE) { - puts("Disable the charger.\n"); - pmic_reg_read(p, MAX77693_CHG_CNFG_00, &val); - val &= ~0x01; - pmic_reg_write(p, MAX77693_CHG_CNFG_00, val); - return -ENOTSUPP; - } - - if (current < CHARGER_MIN_CURRENT || current > CHARGER_MAX_CURRENT) { - printf("%s: Wrong charge current: %d [mA]\n", - __func__, current); - return -EINVAL; - } - - /* set charging current */ - pmic_reg_read(p, MAX77693_CHG_CNFG_02, &val); - val &= ~MAX77693_CHG_CC; - val |= current * 10 / 333; /* 0.1A/3 steps */ - pmic_reg_write(p, MAX77693_CHG_CNFG_02, val); - - /* enable charging */ - val = MAX77693_CHG_MODE_ON; - pmic_reg_write(p, MAX77693_CHG_CNFG_00, val); - - /* check charging current */ - pmic_reg_read(p, MAX77693_CHG_CNFG_02, &val); - val &= 0x3f; - printf("Enable the charger @ %d [mA]\n", val * 333 / 10); - - return 0; -} - -static int max77693_charger_bat_present(struct pmic *p) -{ - unsigned int val; - - if (pmic_probe(p)) - return -ENODEV; - - pmic_reg_read(p, MAX77693_CHG_INT_OK, &val); - - return !(val & MAX77693_CHG_DETBAT); -} - -static struct power_chrg power_chrg_pmic_ops = { - .chrg_bat_present = max77693_charger_bat_present, - .chrg_state = max77693_charger_state, -}; - -int pmic_init_max77693(unsigned char bus) -{ - static const char name[] = "MAX77693_PMIC"; - struct pmic *p = pmic_alloc(); - - if (!p) { - printf("%s: POWER allocation error!\n", __func__); - return -ENOMEM; - } - - debug("Board PMIC init\n"); - - p->name = name; - p->interface = PMIC_I2C; - p->number_of_regs = PMIC_NUM_OF_REGS; - p->hw.i2c.addr = MAX77693_PMIC_I2C_ADDR; - p->hw.i2c.tx_num = 1; - p->bus = bus; - - p->chrg = &power_chrg_pmic_ops; - - return 0; -} diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile index c3180c58208..0b3b3d62d0e 100644 --- a/drivers/power/pmic/Makefile +++ b/drivers/power/pmic/Makefile @@ -37,7 +37,6 @@ obj-$(CONFIG_POWER_TPS65218) += pmic_tps65218.o ifeq ($(CONFIG_$(SPL_)POWER_LEGACY),y) obj-$(CONFIG_POWER_LTC3676) += pmic_ltc3676.o -obj-$(CONFIG_POWER_MUIC_MAX8997) += muic_max8997.o obj-$(CONFIG_POWER_PCA9450) += pmic_pca9450.o obj-$(CONFIG_POWER_PFUZE100) += pmic_pfuze100.o obj-$(CONFIG_POWER_PFUZE3000) += pmic_pfuze3000.o diff --git a/drivers/power/pmic/muic_max8997.c b/drivers/power/pmic/muic_max8997.c deleted file mode 100644 index 969ce902395..00000000000 --- a/drivers/power/pmic/muic_max8997.c +++ /dev/null @@ -1,74 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2012 Samsung Electronics - * Lukasz Majewski <l.majewski@samsung.com> - */ - -#include <common.h> -#include <log.h> -#include <power/pmic.h> -#include <power/power_chrg.h> -#include <power/max8997_muic.h> -#include <i2c.h> -#include <errno.h> - -static int power_chrg_get_type(struct pmic *p) -{ - unsigned int val; - unsigned char charge_type, charger; - - if (pmic_probe(p)) - return CHARGER_NO; - - pmic_reg_read(p, MAX8997_MUIC_STATUS2, &val); - charge_type = val & MAX8997_MUIC_CHG_MASK; - - switch (charge_type) { - case MAX8997_MUIC_CHG_NO: - charger = CHARGER_NO; - break; - case MAX8997_MUIC_CHG_USB: - case MAX8997_MUIC_CHG_USB_D: - charger = CHARGER_USB; - break; - case MAX8997_MUIC_CHG_TA: - case MAX8997_MUIC_CHG_TA_1A: - charger = CHARGER_TA; - break; - case MAX8997_MUIC_CHG_TA_500: - charger = CHARGER_TA_500; - break; - default: - charger = CHARGER_UNKNOWN; - break; - } - - return charger; -} - -static struct power_chrg power_chrg_muic_ops = { - .chrg_type = power_chrg_get_type, -}; - -int power_muic_init(unsigned int bus) -{ - static const char name[] = "MAX8997_MUIC"; - struct pmic *p = pmic_alloc(); - - if (!p) { - printf("%s: POWER allocation error!\n", __func__); - return -ENOMEM; - } - - debug("Board Micro USB Interface Controller init\n"); - - p->name = name; - p->interface = PMIC_I2C; - p->number_of_regs = MUIC_NUM_OF_REGS; - p->hw.i2c.addr = MAX8997_MUIC_I2C_ADDR; - p->hw.i2c.tx_num = 1; - p->bus = bus; - - p->chrg = &power_chrg_muic_ops; - return 0; -} diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index acfd130bbc9..447551e15aa 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -6,49 +6,35 @@ obj-$(CONFIG_$(SPL_TPL_)DM_RTC) += rtc-uclass.o -obj-$(CONFIG_RTC_AT91SAM9_RTT) += at91sam9_rtt.o obj-$(CONFIG_RTC_ARMADA38X) += armada38x.o obj-$(CONFIG_RTC_DAVINCI) += davinci.o -obj-$(CONFIG_RTC_DS1302) += ds1302.o -obj-$(CONFIG_RTC_DS1306) += ds1306.o obj-$(CONFIG_RTC_DS1307) += ds1307.o obj-$(CONFIG_RTC_DS1338) += ds1307.o -obj-$(CONFIG_RTC_DS1339) += ds1307.o obj-$(CONFIG_RTC_DS1337) += ds1337.o obj-$(CONFIG_RTC_DS1374) += ds1374.o -obj-$(CONFIG_RTC_DS1388) += ds1337.o obj-$(CONFIG_RTC_DS3231) += ds3231.o obj-$(CONFIG_RTC_DS3232) += ds3232.o obj-$(CONFIG_RTC_EMULATION) += emul_rtc.o -obj-$(CONFIG_RTC_FTRTC010) += ftrtc010.o obj-$(CONFIG_RTC_HT1380) += ht1380.o obj-$(CONFIG_SANDBOX) += i2c_rtc_emul.o -obj-$(CONFIG_RTC_IMXDI) += imxdi.o obj-$(CONFIG_RTC_ISL1208) += isl1208.o obj-$(CONFIG_RTC_M41T62) += m41t62.o -obj-$(CONFIG_RTC_MAX6900) += max6900.o obj-$(CONFIG_RTC_MC13XXX) += mc13xxx-rtc.o obj-$(CONFIG_RTC_MC146818) += mc146818.o -obj-$(CONFIG_RTC_MCP79411) += ds1307.o obj-$(CONFIG_MCFRTC) += mcfrtc.o -obj-$(CONFIG_RTC_MK48T59) += mk48t59.o obj-$(CONFIG_RTC_MV) += mvrtc.o -obj-$(CONFIG_RTC_MX27) += mx27rtc.o obj-$(CONFIG_RTC_MXS) += mxsrtc.o obj-$(CONFIG_RTC_PCF8563) += pcf8563.o obj-$(CONFIG_RTC_PCF2127) += pcf2127.o obj-$(CONFIG_RTC_PL031) += pl031.o obj-$(CONFIG_RTC_PT7C4338) += pt7c4338.o -obj-$(CONFIG_RTC_RS5C372A) += rs5c372.o obj-$(CONFIG_RTC_RV3028) += rv3028.o obj-$(CONFIG_RTC_RV3029) += rv3029.o obj-$(CONFIG_RTC_RV8803) += rv8803.o obj-$(CONFIG_RTC_RX8025) += rx8025.o obj-$(CONFIG_RTC_RX8010SJ) += rx8010sj.o -obj-$(CONFIG_RTC_S3C24X0) += s3c24x0_rtc.o obj-$(CONFIG_RTC_S35392A) += s35392a.o obj-$(CONFIG_RTC_STM32) += stm32_rtc.o obj-$(CONFIG_SANDBOX) += sandbox_rtc.o -obj-$(CONFIG_RTC_X1205) += x1205.o obj-$(CONFIG_RTC_ABX80X) += abx80x.o obj-$(CONFIG_RTC_ZYNQMP) += zynqmp_rtc.o diff --git a/drivers/rtc/at91sam9_rtt.c b/drivers/rtc/at91sam9_rtt.c deleted file mode 100644 index 6f92660ef1d..00000000000 --- a/drivers/rtc/at91sam9_rtt.c +++ /dev/null @@ -1,78 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2010 - * Reinhard Meyer, reinhard.meyer@emk-elektronik.de - */ - -/* - * Date & Time support for the internal Real-time Timer - * of AT91SAM9260 and compatibles. - * Compatible with the LinuX rtc driver workaround: - * The RTT cannot be written to, but only reset. - * The actual time is the sum of RTT and one of - * the four GPBR registers. - * - * The at91sam9260 has 4 GPBR (0-3). - * For their typical use see at91_gpbr.h ! - * - * make sure u-boot and kernel use the same GPBR ! - */ - -#include <common.h> -#include <command.h> -#include <rtc.h> -#include <asm/io.h> -#include <linux/errno.h> -#include <asm/arch/hardware.h> -#include <asm/arch/at91_rtt.h> -#include <asm/arch/at91_gpbr.h> - -int rtc_get (struct rtc_time *tmp) -{ - at91_rtt_t *rtt = (at91_rtt_t *) ATMEL_BASE_RTT; - at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR; - ulong tim; - ulong tim2; - ulong off; - - do { - tim = readl(&rtt->vr); - tim2 = readl(&rtt->vr); - } while (tim!=tim2); - off = readl(&gpbr->reg[AT91_GPBR_INDEX_TIMEOFF]); - /* off==0 means time is invalid, but we ignore that */ - rtc_to_tm(tim+off, tmp); - return 0; -} - -int rtc_set (struct rtc_time *tmp) -{ - at91_rtt_t *rtt = (at91_rtt_t *) ATMEL_BASE_RTT; - at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR; - ulong tim; - - tim = rtc_mktime(tmp); - - /* clear alarm, set prescaler to 32768, clear counter */ - writel(32768+AT91_RTT_RTTRST, &rtt->mr); - writel(~0, &rtt->ar); - writel(tim, &gpbr->reg[AT91_GPBR_INDEX_TIMEOFF]); - /* wait for counter clear to happen, takes less than a 1/32768th second */ - while (readl(&rtt->vr) != 0) - ; - return 0; -} - -void rtc_reset (void) -{ - at91_rtt_t *rtt = (at91_rtt_t *) ATMEL_BASE_RTT; - at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR; - - /* clear alarm, set prescaler to 32768, clear counter */ - writel(32768+AT91_RTT_RTTRST, &rtt->mr); - writel(~0, &rtt->ar); - writel(0, &gpbr->reg[AT91_GPBR_INDEX_TIMEOFF]); - /* wait for counter clear to happen, takes less than a 1/32768th second */ - while (readl(&rtt->vr) != 0) - ; -} diff --git a/drivers/rtc/ds1302.c b/drivers/rtc/ds1302.c deleted file mode 100644 index 189607c3e02..00000000000 --- a/drivers/rtc/ds1302.c +++ /dev/null @@ -1,329 +0,0 @@ -/* - * ds1302.c - Support for the Dallas Semiconductor DS1302 Timekeeping Chip - * - * Rex G. Feany <rfeany@zumanetworks.com> - * - */ - -#include <common.h> -#include <command.h> -#include <rtc.h> -#include <linux/delay.h> - -/* GPP Pins */ -#define DATA 0x200 -#define SCLK 0x400 -#define RST 0x800 - -/* Happy Fun Defines(tm) */ -#define RESET rtc_go_low(RST), rtc_go_low(SCLK) -#define N_RESET rtc_go_high(RST), rtc_go_low(SCLK) - -#define CLOCK_HIGH rtc_go_high(SCLK) -#define CLOCK_LOW rtc_go_low(SCLK) - -#define DATA_HIGH rtc_go_high(DATA) -#define DATA_LOW rtc_go_low(DATA) -#define DATA_READ (GTREGREAD(GPP_VALUE) & DATA) - -#undef RTC_DEBUG - -#ifdef RTC_DEBUG -# define DPRINTF(x,args...) printf("ds1302: " x , ##args) -static inline void DUMP(const char *ptr, int num) -{ - while (num--) printf("%x ", *ptr++); - printf("]\n"); -} -#else -# define DPRINTF(x,args...) -# define DUMP(ptr, num) -#endif - -/* time data format for DS1302 */ -struct ds1302_st -{ - unsigned char CH:1; /* clock halt 1=stop 0=start */ - unsigned char sec10:3; - unsigned char sec:4; - - unsigned char zero0:1; - unsigned char min10:3; - unsigned char min:4; - - unsigned char fmt:1; /* 1=12 hour 0=24 hour */ - unsigned char zero1:1; - unsigned char hr10:2; /* 10 (0-2) or am/pm (am/pm, 0-1) */ - unsigned char hr:4; - - unsigned char zero2:2; - unsigned char date10:2; - unsigned char date:4; - - unsigned char zero3:3; - unsigned char month10:1; - unsigned char month:4; - - unsigned char zero4:5; - unsigned char day:3; /* day of week */ - - unsigned char year10:4; - unsigned char year:4; - - unsigned char WP:1; /* write protect 1=protect 0=unprot */ - unsigned char zero5:7; -}; - -static int ds1302_initted=0; - -/* Pin control */ -static inline void -rtc_go_high(unsigned int mask) -{ - unsigned int f = GTREGREAD(GPP_VALUE) | mask; - - GT_REG_WRITE(GPP_VALUE, f); -} - -static inline void -rtc_go_low(unsigned int mask) -{ - unsigned int f = GTREGREAD(GPP_VALUE) & ~mask; - - GT_REG_WRITE(GPP_VALUE, f); -} - -static inline void -rtc_go_input(unsigned int mask) -{ - unsigned int f = GTREGREAD(GPP_IO_CONTROL) & ~mask; - - GT_REG_WRITE(GPP_IO_CONTROL, f); -} - -static inline void -rtc_go_output(unsigned int mask) -{ - unsigned int f = GTREGREAD(GPP_IO_CONTROL) | mask; - - GT_REG_WRITE(GPP_IO_CONTROL, f); -} - -/* Access data in RTC */ - -static void -write_byte(unsigned char b) -{ - int i; - unsigned char mask=1; - - for(i=0;i<8;i++) { - CLOCK_LOW; /* Lower clock */ - (b&mask)?DATA_HIGH:DATA_LOW; /* set data */ - udelay(1); - CLOCK_HIGH; /* latch data with rising clock */ - udelay(1); - mask=mask<<1; - } -} - -static unsigned char -read_byte(void) -{ - int i; - unsigned char mask=1; - unsigned char b=0; - - for(i=0;i<8;i++) { - CLOCK_LOW; - udelay(1); - if (DATA_READ) b|=mask; /* if this bit is high, set in b */ - CLOCK_HIGH; /* clock out next bit */ - udelay(1); - mask=mask<<1; - } - return b; -} - -static void -read_ser_drv(unsigned char addr, unsigned char *buf, int count) -{ - int i; -#ifdef RTC_DEBUG - char *foo = buf; -#endif - - DPRINTF("READ 0x%x bytes @ 0x%x [ ", count, addr); - - addr|=1; /* READ */ - N_RESET; - udelay(4); - write_byte(addr); - rtc_go_input(DATA); /* Put gpp pin into input mode */ - udelay(1); - for(i=0;i<count;i++) *(buf++)=read_byte(); - RESET; - rtc_go_output(DATA);/* Reset gpp for output */ - udelay(4); - - DUMP(foo, count); -} - -static void -write_ser_drv(unsigned char addr, unsigned char *buf, int count) -{ - int i; - - DPRINTF("WRITE 0x%x bytes @ 0x%x [ ", count, addr); - DUMP(buf, count); - - addr&=~1; /* WRITE */ - N_RESET; - udelay(4); - write_byte(addr); - for(i=0;i<count;i++) write_byte(*(buf++)); - RESET; - udelay(4); - -} - -void -rtc_init(void) -{ - struct ds1302_st bbclk; - unsigned char b; - int mod; - - DPRINTF("init\n"); - - rtc_go_output(DATA|SCLK|RST); - - /* disable write protect */ - b = 0; - write_ser_drv(0x8e,&b,1); - - /* enable trickle */ - b = 0xa5; /* 1010.0101 */ - write_ser_drv(0x90,&b,1); - - /* read burst */ - read_ser_drv(0xbe, (unsigned char *)&bbclk, 8); - - /* Sanity checks */ - mod = 0; - if (bbclk.CH) { - printf("ds1302: Clock was halted, starting clock\n"); - bbclk.CH=0; - mod=1; - } - - if (bbclk.fmt) { - printf("ds1302: Clock was in 12 hour mode, fixing\n"); - bbclk.fmt=0; - mod=1; - } - - if (bbclk.year>9) { - printf("ds1302: Year was corrupted, fixing\n"); - bbclk.year10=100/10; /* 2000 - why not? ;) */ - bbclk.year=0; - mod=1; - } - - /* Write out the changes if needed */ - if (mod) { - /* enable write protect */ - bbclk.WP = 1; - write_ser_drv(0xbe,(unsigned char *)&bbclk,8); - } else { - /* Else just turn write protect on */ - b = 0x80; - write_ser_drv(0x8e,&b,1); - } - DPRINTF("init done\n"); - - ds1302_initted=1; -} - -void -rtc_reset(void) -{ - if(!ds1302_initted) rtc_init(); - /* TODO */ -} - -int -rtc_get(struct rtc_time *tmp) -{ - int rel = 0; - struct ds1302_st bbclk; - - if(!ds1302_initted) rtc_init(); - - read_ser_drv(0xbe,(unsigned char *)&bbclk, 8); /* read burst */ - - if (bbclk.CH) { - printf("ds1302: rtc_get: Clock was halted, clock probably " - "corrupt\n"); - rel = -1; - } - - tmp->tm_sec=10*bbclk.sec10+bbclk.sec; - tmp->tm_min=10*bbclk.min10+bbclk.min; - tmp->tm_hour=10*bbclk.hr10+bbclk.hr; - tmp->tm_wday=bbclk.day; - tmp->tm_mday=10*bbclk.date10+bbclk.date; - tmp->tm_mon=10*bbclk.month10+bbclk.month; - tmp->tm_year=10*bbclk.year10+bbclk.year + 1900; - - tmp->tm_yday = 0; - tmp->tm_isdst= 0; - - DPRINTF("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", - tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, - tmp->tm_hour, tmp->tm_min, tmp->tm_sec ); - - return rel; -} - -int rtc_set(struct rtc_time *tmp) -{ - struct ds1302_st bbclk; - unsigned char b=0; - - if(!ds1302_initted) rtc_init(); - - DPRINTF("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", - tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, - tmp->tm_hour, tmp->tm_min, tmp->tm_sec); - - memset(&bbclk,0,sizeof(bbclk)); - bbclk.CH=0; /* dont halt */ - bbclk.WP=1; /* write protect when we're done */ - - bbclk.sec10=tmp->tm_sec/10; - bbclk.sec=tmp->tm_sec%10; - - bbclk.min10=tmp->tm_min/10; - bbclk.min=tmp->tm_min%10; - - bbclk.hr10=tmp->tm_hour/10; - bbclk.hr=tmp->tm_hour%10; - - bbclk.day=tmp->tm_wday; - - bbclk.date10=tmp->tm_mday/10; - bbclk.date=tmp->tm_mday%10; - - bbclk.month10=tmp->tm_mon/10; - bbclk.month=tmp->tm_mon%10; - - tmp->tm_year -= 1900; - bbclk.year10=tmp->tm_year/10; - bbclk.year=tmp->tm_year%10; - - write_ser_drv(0x8e,&b,1); /* disable write protect */ - write_ser_drv(0xbe,(unsigned char *)&bbclk, 8); /* write burst */ - - return 0; -} diff --git a/drivers/rtc/ds1306.c b/drivers/rtc/ds1306.c deleted file mode 100644 index 36d615812b2..00000000000 --- a/drivers/rtc/ds1306.c +++ /dev/null @@ -1,438 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2002 SIXNET, dge@sixnetio.com. - * - * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net> - * Stephan Linz <linz@li-pro.net> - */ - -/* - * Date & Time support for DS1306 RTC using SPI: - * - * - SXNI855T: it uses its own soft SPI here in this file - * - all other: use the external spi_xfer() function - * (see include/spi.h) - */ - -#include <common.h> -#include <command.h> -#include <rtc.h> -#include <spi.h> -#include <linux/delay.h> - -#define RTC_SECONDS 0x00 -#define RTC_MINUTES 0x01 -#define RTC_HOURS 0x02 -#define RTC_DAY_OF_WEEK 0x03 -#define RTC_DATE_OF_MONTH 0x04 -#define RTC_MONTH 0x05 -#define RTC_YEAR 0x06 - -#define RTC_SECONDS_ALARM0 0x07 -#define RTC_MINUTES_ALARM0 0x08 -#define RTC_HOURS_ALARM0 0x09 -#define RTC_DAY_OF_WEEK_ALARM0 0x0a - -#define RTC_SECONDS_ALARM1 0x0b -#define RTC_MINUTES_ALARM1 0x0c -#define RTC_HOURS_ALARM1 0x0d -#define RTC_DAY_OF_WEEK_ALARM1 0x0e - -#define RTC_CONTROL 0x0f -#define RTC_STATUS 0x10 -#define RTC_TRICKLE_CHARGER 0x11 - -#define RTC_USER_RAM_BASE 0x20 - -/* ************************************************************************* */ -#ifdef CONFIG_SXNI855T /* !!! SHOULD BE CHANGED TO NEW CODE !!! */ - -static void soft_spi_send (unsigned char n); -static unsigned char soft_spi_read (void); -static void init_spi (void); - -/*----------------------------------------------------------------------- - * Definitions - */ - -#define PB_SPISCK 0x00000002 /* PB 30 */ -#define PB_SPIMOSI 0x00000004 /* PB 29 */ -#define PB_SPIMISO 0x00000008 /* PB 28 */ -#define PB_SPI_CE 0x00010000 /* PB 15 */ - -/* ------------------------------------------------------------------------- */ - -/* read clock time from DS1306 and return it in *tmp */ -int rtc_get (struct rtc_time *tmp) -{ - volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; - unsigned char spi_byte; /* Data Byte */ - - init_spi (); /* set port B for software SPI */ - - /* Now we can enable the DS1306 RTC */ - immap->im_cpm.cp_pbdat |= PB_SPI_CE; - udelay(10); - - /* Shift out the address (0) of the time in the Clock Chip */ - soft_spi_send (0); - - /* Put the clock readings into the rtc_time structure */ - tmp->tm_sec = bcd2bin (soft_spi_read ()); /* Read seconds */ - tmp->tm_min = bcd2bin (soft_spi_read ()); /* Read minutes */ - - /* Hours are trickier */ - spi_byte = soft_spi_read (); /* Read Hours into temporary value */ - if (spi_byte & 0x40) { - /* 12 hour mode bit is set (time is in 1-12 format) */ - if (spi_byte & 0x20) { - /* since PM we add 11 to get 0-23 for hours */ - tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) + 11; - } else { - /* since AM we subtract 1 to get 0-23 for hours */ - tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) - 1; - } - } else { - /* Otherwise, 0-23 hour format */ - tmp->tm_hour = (bcd2bin (spi_byte & 0x3F)); - } - - soft_spi_read (); /* Read and discard Day of week */ - tmp->tm_mday = bcd2bin (soft_spi_read ()); /* Read Day of the Month */ - tmp->tm_mon = bcd2bin (soft_spi_read ()); /* Read Month */ - - /* Read Year and convert to this century */ - tmp->tm_year = bcd2bin (soft_spi_read ()) + 2000; - - /* Now we can disable the DS1306 RTC */ - immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */ - udelay(10); - - rtc_calc_weekday(tmp); /* Determine the day of week */ - - debug ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", - tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, - tmp->tm_hour, tmp->tm_min, tmp->tm_sec); - - return 0; -} - -/* ------------------------------------------------------------------------- */ - -/* set clock time in DS1306 RTC and in MPC8xx RTC */ -int rtc_set (struct rtc_time *tmp) -{ - volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; - - init_spi (); /* set port B for software SPI */ - - /* Now we can enable the DS1306 RTC */ - immap->im_cpm.cp_pbdat |= PB_SPI_CE; /* Enable DS1306 Chip */ - udelay(10); - - /* First disable write protect in the clock chip control register */ - soft_spi_send (0x8F); /* send address of the control register */ - soft_spi_send (0x00); /* send control register contents */ - - /* Now disable the DS1306 to terminate the write */ - immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; - udelay(10); - - /* Now enable the DS1306 to initiate a new write */ - immap->im_cpm.cp_pbdat |= PB_SPI_CE; - udelay(10); - - /* Next, send the address of the clock time write registers */ - soft_spi_send (0x80); /* send address of the first time register */ - - /* Use Burst Mode to send all of the time data to the clock */ - bin2bcd (tmp->tm_sec); - soft_spi_send (bin2bcd (tmp->tm_sec)); /* Send Seconds */ - soft_spi_send (bin2bcd (tmp->tm_min)); /* Send Minutes */ - soft_spi_send (bin2bcd (tmp->tm_hour)); /* Send Hour */ - soft_spi_send (bin2bcd (tmp->tm_wday)); /* Send Day of the Week */ - soft_spi_send (bin2bcd (tmp->tm_mday)); /* Send Day of Month */ - soft_spi_send (bin2bcd (tmp->tm_mon)); /* Send Month */ - soft_spi_send (bin2bcd (tmp->tm_year - 2000)); /* Send Year */ - - /* Now we can disable the Clock chip to terminate the burst write */ - immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */ - udelay(10); - - /* Now we can enable the Clock chip to initiate a new write */ - immap->im_cpm.cp_pbdat |= PB_SPI_CE; /* Enable DS1306 Chip */ - udelay(10); - - /* First we Enable write protect in the clock chip control register */ - soft_spi_send (0x8F); /* send address of the control register */ - soft_spi_send (0x40); /* send out Control Register contents */ - - /* Now disable the DS1306 */ - immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */ - udelay(10); - - /* Set standard MPC8xx clock to the same time so Linux will - * see the time even if it doesn't have a DS1306 clock driver. - * This helps with experimenting with standard kernels. - */ - { - ulong tim; - - tim = rtc_mktime(tmp); - - immap->im_sitk.sitk_rtck = KAPWR_KEY; - immap->im_sit.sit_rtc = tim; - } - - debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", - tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, - tmp->tm_hour, tmp->tm_min, tmp->tm_sec); - - return 0; -} - -/* ------------------------------------------------------------------------- */ - -/* Initialize Port B for software SPI */ -static void init_spi (void) -{ - volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; - - /* Force output pins to begin at logic 0 */ - immap->im_cpm.cp_pbdat &= ~(PB_SPI_CE | PB_SPIMOSI | PB_SPISCK); - - /* Set these 3 signals as outputs */ - immap->im_cpm.cp_pbdir |= (PB_SPIMOSI | PB_SPI_CE | PB_SPISCK); - - immap->im_cpm.cp_pbdir &= ~PB_SPIMISO; /* Make MISO pin an input */ - udelay(10); -} - -/* ------------------------------------------------------------------------- */ - -/* NOTE: soft_spi_send() assumes that the I/O lines are configured already */ -static void soft_spi_send (unsigned char n) -{ - volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; - unsigned char bitpos; /* bit position to receive */ - unsigned char i; /* Loop Control */ - - /* bit position to send, start with most significant bit */ - bitpos = 0x80; - - /* Send 8 bits to software SPI */ - for (i = 0; i < 8; i++) { /* Loop for 8 bits */ - immap->im_cpm.cp_pbdat |= PB_SPISCK; /* Raise SCK */ - - if (n & bitpos) - immap->im_cpm.cp_pbdat |= PB_SPIMOSI; /* Set MOSI to 1 */ - else - immap->im_cpm.cp_pbdat &= ~PB_SPIMOSI; /* Set MOSI to 0 */ - udelay(10); - - immap->im_cpm.cp_pbdat &= ~PB_SPISCK; /* Lower SCK */ - udelay(10); - - bitpos >>= 1; /* Shift for next bit position */ - } -} - -/* ------------------------------------------------------------------------- */ - -/* NOTE: soft_spi_read() assumes that the I/O lines are configured already */ -static unsigned char soft_spi_read (void) -{ - volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; - - unsigned char spi_byte = 0; /* Return value, assume success */ - unsigned char bitpos; /* bit position to receive */ - unsigned char i; /* Loop Control */ - - /* bit position to receive, start with most significant bit */ - bitpos = 0x80; - - /* Read 8 bits here */ - for (i = 0; i < 8; i++) { /* Do 8 bits in loop */ - immap->im_cpm.cp_pbdat |= PB_SPISCK; /* Raise SCK */ - udelay(10); - if (immap->im_cpm.cp_pbdat & PB_SPIMISO) /* Get a bit of data */ - spi_byte |= bitpos; /* Set data accordingly */ - immap->im_cpm.cp_pbdat &= ~PB_SPISCK; /* Lower SCK */ - udelay(10); - bitpos >>= 1; /* Shift for next bit position */ - } - - return spi_byte; /* Return the byte read */ -} - -/* ------------------------------------------------------------------------- */ - -void rtc_reset (void) -{ - return; /* nothing to do */ -} - -#else /* not CONFIG_SXNI855T */ -/* ************************************************************************* */ - -static unsigned char rtc_read (unsigned char reg); -static void rtc_write (unsigned char reg, unsigned char val); - -static struct spi_slave *slave; - -/* read clock time from DS1306 and return it in *tmp */ -int rtc_get (struct rtc_time *tmp) -{ - unsigned char sec, min, hour, mday, wday, mon, year; - - /* - * Assuming Vcc = 2.0V (lowest speed) - * - * REVISIT: If we add an rtc_init() function we can do this - * step just once. - */ - if (!slave) { - slave = spi_setup_slave(0, CONFIG_SYS_SPI_RTC_DEVID, 600000, - SPI_MODE_3 | SPI_CS_HIGH); - if (!slave) - return; - } - - if (spi_claim_bus(slave)) - return; - - sec = rtc_read (RTC_SECONDS); - min = rtc_read (RTC_MINUTES); - hour = rtc_read (RTC_HOURS); - mday = rtc_read (RTC_DATE_OF_MONTH); - wday = rtc_read (RTC_DAY_OF_WEEK); - mon = rtc_read (RTC_MONTH); - year = rtc_read (RTC_YEAR); - - spi_release_bus(slave); - - debug ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x " - "hr: %02x min: %02x sec: %02x\n", - year, mon, mday, wday, hour, min, sec); - debug ("Alarms[0]: wday: %02x hour: %02x min: %02x sec: %02x\n", - rtc_read (RTC_DAY_OF_WEEK_ALARM0), - rtc_read (RTC_HOURS_ALARM0), - rtc_read (RTC_MINUTES_ALARM0), rtc_read (RTC_SECONDS_ALARM0)); - debug ("Alarms[1]: wday: %02x hour: %02x min: %02x sec: %02x\n", - rtc_read (RTC_DAY_OF_WEEK_ALARM1), - rtc_read (RTC_HOURS_ALARM1), - rtc_read (RTC_MINUTES_ALARM1), rtc_read (RTC_SECONDS_ALARM1)); - - tmp->tm_sec = bcd2bin (sec & 0x7F); /* convert Seconds */ - tmp->tm_min = bcd2bin (min & 0x7F); /* convert Minutes */ - - /* convert Hours */ - tmp->tm_hour = (hour & 0x40) - ? ((hour & 0x20) /* 12 hour mode */ - ? bcd2bin (hour & 0x1F) + 11 /* PM */ - : bcd2bin (hour & 0x1F) - 1 /* AM */ - ) - : bcd2bin (hour & 0x3F); /* 24 hour mode */ - - tmp->tm_mday = bcd2bin (mday & 0x3F); /* convert Day of the Month */ - tmp->tm_mon = bcd2bin (mon & 0x1F); /* convert Month */ - tmp->tm_year = bcd2bin (year) + 2000; /* convert Year */ - tmp->tm_wday = bcd2bin (wday & 0x07) - 1; /* convert Day of the Week */ - tmp->tm_yday = 0; - tmp->tm_isdst = 0; - - debug ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", - tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, - tmp->tm_hour, tmp->tm_min, tmp->tm_sec); - - return 0; -} - -/* ------------------------------------------------------------------------- */ - -/* set clock time from *tmp in DS1306 RTC */ -int rtc_set (struct rtc_time *tmp) -{ - /* Assuming Vcc = 2.0V (lowest speed) */ - if (!slave) { - slave = spi_setup_slave(0, CONFIG_SYS_SPI_RTC_DEVID, 600000, - SPI_MODE_3 | SPI_CS_HIGH); - if (!slave) - return; - } - - if (spi_claim_bus(slave)) - return; - - debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", - tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, - tmp->tm_hour, tmp->tm_min, tmp->tm_sec); - - rtc_write (RTC_SECONDS, bin2bcd (tmp->tm_sec)); - rtc_write (RTC_MINUTES, bin2bcd (tmp->tm_min)); - rtc_write (RTC_HOURS, bin2bcd (tmp->tm_hour)); - rtc_write (RTC_DAY_OF_WEEK, bin2bcd (tmp->tm_wday + 1)); - rtc_write (RTC_DATE_OF_MONTH, bin2bcd (tmp->tm_mday)); - rtc_write (RTC_MONTH, bin2bcd (tmp->tm_mon)); - rtc_write (RTC_YEAR, bin2bcd (tmp->tm_year - 2000)); - - spi_release_bus(slave); -} - -/* ------------------------------------------------------------------------- */ - -/* reset the DS1306 */ -void rtc_reset (void) -{ - /* Assuming Vcc = 2.0V (lowest speed) */ - if (!slave) { - slave = spi_setup_slave(0, CONFIG_SYS_SPI_RTC_DEVID, 600000, - SPI_MODE_3 | SPI_CS_HIGH); - if (!slave) - return; - } - - if (spi_claim_bus(slave)) - return; - - /* clear the control register */ - rtc_write (RTC_CONTROL, 0x00); /* 1st step: reset WP */ - rtc_write (RTC_CONTROL, 0x00); /* 2nd step: reset 1Hz, AIE1, AIE0 */ - - /* reset all alarms */ - rtc_write (RTC_SECONDS_ALARM0, 0x00); - rtc_write (RTC_SECONDS_ALARM1, 0x00); - rtc_write (RTC_MINUTES_ALARM0, 0x00); - rtc_write (RTC_MINUTES_ALARM1, 0x00); - rtc_write (RTC_HOURS_ALARM0, 0x00); - rtc_write (RTC_HOURS_ALARM1, 0x00); - rtc_write (RTC_DAY_OF_WEEK_ALARM0, 0x00); - rtc_write (RTC_DAY_OF_WEEK_ALARM1, 0x00); - - spi_release_bus(slave); -} - -/* ------------------------------------------------------------------------- */ - -static unsigned char rtc_read (unsigned char reg) -{ - int ret; - - ret = spi_w8r8(slave, reg); - return ret < 0 ? 0 : ret; -} - -/* ------------------------------------------------------------------------- */ - -static void rtc_write (unsigned char reg, unsigned char val) -{ - unsigned char dout[2]; /* SPI Output Data Bytes */ - unsigned char din[2]; /* SPI Input Data Bytes */ - - dout[0] = 0x80 | reg; - dout[1] = val; - - spi_xfer (slave, 16, dout, din, SPI_XFER_BEGIN | SPI_XFER_END); -} - -#endif /* end of code exclusion (see #ifdef CONFIG_SXNI855T above) */ diff --git a/drivers/rtc/ftrtc010.c b/drivers/rtc/ftrtc010.c deleted file mode 100644 index e384922f473..00000000000 --- a/drivers/rtc/ftrtc010.c +++ /dev/null @@ -1,122 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Faraday FTRTC010 Real Time Clock - * - * (C) Copyright 2009 Faraday Technology - * Po-Yu Chuang <ratbert@faraday-tech.com> - */ - -#include <config.h> -#include <common.h> -#include <log.h> -#include <rtc.h> -#include <asm/io.h> - -struct ftrtc010 { - unsigned int sec; /* 0x00 */ - unsigned int min; /* 0x04 */ - unsigned int hour; /* 0x08 */ - unsigned int day; /* 0x0c */ - unsigned int alarm_sec; /* 0x10 */ - unsigned int alarm_min; /* 0x14 */ - unsigned int alarm_hour; /* 0x18 */ - unsigned int record; /* 0x1c */ - unsigned int cr; /* 0x20 */ - unsigned int wsec; /* 0x24 */ - unsigned int wmin; /* 0x28 */ - unsigned int whour; /* 0x2c */ - unsigned int wday; /* 0x30 */ - unsigned int intr; /* 0x34 */ - unsigned int div; /* 0x38 */ - unsigned int rev; /* 0x3c */ -}; - -/* - * RTC Control Register - */ -#define FTRTC010_CR_ENABLE (1 << 0) -#define FTRTC010_CR_INTERRUPT_SEC (1 << 1) /* per second irq */ -#define FTRTC010_CR_INTERRUPT_MIN (1 << 2) /* per minute irq */ -#define FTRTC010_CR_INTERRUPT_HR (1 << 3) /* per hour irq */ -#define FTRTC010_CR_INTERRUPT_DAY (1 << 4) /* per day irq */ - -static struct ftrtc010 *rtc = (struct ftrtc010 *)CONFIG_FTRTC010_BASE; - -static void ftrtc010_enable(void) -{ - writel(FTRTC010_CR_ENABLE, &rtc->cr); -} - -/* - * return current time in seconds - */ -static unsigned long ftrtc010_time(void) -{ - unsigned long day; - unsigned long hour; - unsigned long minute; - unsigned long second; - unsigned long second2; - - do { - second = readl(&rtc->sec); - day = readl(&rtc->day); - hour = readl(&rtc->hour); - minute = readl(&rtc->min); - second2 = readl(&rtc->sec); - } while (second != second2); - - return day * 24 * 60 * 60 + hour * 60 * 60 + minute * 60 + second; -} - -/* - * Get the current time from the RTC - */ - -int rtc_get(struct rtc_time *tmp) -{ - unsigned long now; - - debug("%s(): record register: %x\n", - __func__, readl(&rtc->record)); - -#ifdef CFG_FTRTC010_PCLK - now = (ftrtc010_time() + readl(&rtc->record)) / RTC_DIV_COUNT; -#else /* CFG_FTRTC010_EXTCLK */ - now = ftrtc010_time() + readl(&rtc->record); -#endif - - rtc_to_tm(now, tmp); - - return 0; -} - -/* - * Set the RTC - */ -int rtc_set(struct rtc_time *tmp) -{ - unsigned long new; - unsigned long now; - - debug("%s(): DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", - __func__, - tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, - tmp->tm_hour, tmp->tm_min, tmp->tm_sec); - - new = rtc_mktime(tmp); - - now = ftrtc010_time(); - - debug("%s(): write %lx to record register\n", __func__, new - now); - - writel(new - now, &rtc->record); - - return 0; -} - -void rtc_reset(void) -{ - debug("%s()\n", __func__); - ftrtc010_enable(); -} diff --git a/drivers/rtc/imxdi.c b/drivers/rtc/imxdi.c deleted file mode 100644 index e3a1393266c..00000000000 --- a/drivers/rtc/imxdi.c +++ /dev/null @@ -1,223 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2009-2012 ADVANSEE - * Benoît Thébaudeau <benoit.thebaudeau@advansee.com> - * - * Based on the Linux rtc-imxdi.c driver, which is: - * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. - * Copyright 2010 Orex Computed Radiography - */ - -/* - * Date & Time support for Freescale i.MX DryIce RTC - */ - -#include <common.h> -#include <command.h> -#include <linux/compat.h> -#include <rtc.h> -#include <linux/delay.h> - -#include <asm/io.h> -#include <asm/arch/imx-regs.h> - -/* DryIce Register Definitions */ - -struct imxdi_regs { - u32 dtcmr; /* Time Counter MSB Reg */ - u32 dtclr; /* Time Counter LSB Reg */ - u32 dcamr; /* Clock Alarm MSB Reg */ - u32 dcalr; /* Clock Alarm LSB Reg */ - u32 dcr; /* Control Reg */ - u32 dsr; /* Status Reg */ - u32 dier; /* Interrupt Enable Reg */ -}; - -#define DCAMR_UNSET 0xFFFFFFFF /* doomsday - 1 sec */ - -#define DCR_TCE (1 << 3) /* Time Counter Enable */ - -#define DSR_WBF (1 << 10) /* Write Busy Flag */ -#define DSR_WNF (1 << 9) /* Write Next Flag */ -#define DSR_WCF (1 << 8) /* Write Complete Flag */ -#define DSR_WEF (1 << 7) /* Write Error Flag */ -#define DSR_CAF (1 << 4) /* Clock Alarm Flag */ -#define DSR_NVF (1 << 1) /* Non-Valid Flag */ -#define DSR_SVF (1 << 0) /* Security Violation Flag */ - -#define DIER_WNIE (1 << 9) /* Write Next Interrupt Enable */ -#define DIER_WCIE (1 << 8) /* Write Complete Interrupt Enable */ -#define DIER_WEIE (1 << 7) /* Write Error Interrupt Enable */ -#define DIER_CAIE (1 << 4) /* Clock Alarm Interrupt Enable */ - -/* Driver Private Data */ - -struct imxdi_data { - struct imxdi_regs __iomem *regs; - int init_done; -}; - -static struct imxdi_data data; - -/* - * This function attempts to clear the dryice write-error flag. - * - * A dryice write error is similar to a bus fault and should not occur in - * normal operation. Clearing the flag requires another write, so the root - * cause of the problem may need to be fixed before the flag can be cleared. - */ -static void clear_write_error(void) -{ - int cnt; - - puts("### Warning: RTC - Register write error!\n"); - - /* clear the write error flag */ - __raw_writel(DSR_WEF, &data.regs->dsr); - - /* wait for it to take effect */ - for (cnt = 0; cnt < 1000; cnt++) { - if ((__raw_readl(&data.regs->dsr) & DSR_WEF) == 0) - return; - udelay(10); - } - puts("### Error: RTC - Cannot clear write-error flag!\n"); -} - -/* - * Write a dryice register and wait until it completes. - * - * Use interrupt flags to determine when the write has completed. - */ -#define DI_WRITE_WAIT(val, reg) \ -( \ - /* do the register write */ \ - __raw_writel((val), &data.regs->reg), \ - \ - di_write_wait((val), #reg) \ -) -static int di_write_wait(u32 val, const char *reg) -{ - int cnt; - int ret = 0; - int rc = 0; - - /* wait for the write to finish */ - for (cnt = 0; cnt < 100; cnt++) { - if ((__raw_readl(&data.regs->dsr) & (DSR_WCF | DSR_WEF)) != 0) { - ret = 1; - break; - } - udelay(10); - } - if (ret == 0) - printf("### Warning: RTC - Write-wait timeout " - "val = 0x%.8x reg = %s\n", val, reg); - - /* check for write error */ - if (__raw_readl(&data.regs->dsr) & DSR_WEF) { - clear_write_error(); - rc = -1; - } - - return rc; -} - -/* - * Initialize dryice hardware - */ -static int di_init(void) -{ - int rc = 0; - - data.regs = (struct imxdi_regs __iomem *)IMX_DRYICE_BASE; - - /* mask all interrupts */ - __raw_writel(0, &data.regs->dier); - - /* put dryice into valid state */ - if (__raw_readl(&data.regs->dsr) & DSR_NVF) { - rc = DI_WRITE_WAIT(DSR_NVF | DSR_SVF, dsr); - if (rc) - goto err; - } - - /* initialize alarm */ - rc = DI_WRITE_WAIT(DCAMR_UNSET, dcamr); - if (rc) - goto err; - rc = DI_WRITE_WAIT(0, dcalr); - if (rc) - goto err; - - /* clear alarm flag */ - if (__raw_readl(&data.regs->dsr) & DSR_CAF) { - rc = DI_WRITE_WAIT(DSR_CAF, dsr); - if (rc) - goto err; - } - - /* the timer won't count if it has never been written to */ - if (__raw_readl(&data.regs->dtcmr) == 0) { - rc = DI_WRITE_WAIT(0, dtcmr); - if (rc) - goto err; - } - - /* start keeping time */ - if (!(__raw_readl(&data.regs->dcr) & DCR_TCE)) { - rc = DI_WRITE_WAIT(__raw_readl(&data.regs->dcr) | DCR_TCE, dcr); - if (rc) - goto err; - } - - data.init_done = 1; - return 0; - -err: - return rc; -} - -int rtc_get(struct rtc_time *tmp) -{ - unsigned long now; - int rc = 0; - - if (!data.init_done) { - rc = di_init(); - if (rc) - goto err; - } - - now = __raw_readl(&data.regs->dtcmr); - rtc_to_tm(now, tmp); - -err: - return rc; -} - -int rtc_set(struct rtc_time *tmp) -{ - unsigned long now; - int rc; - - if (!data.init_done) { - rc = di_init(); - if (rc) - goto err; - } - - now = rtc_mktime(tmp); - /* zero the fractional part first */ - rc = DI_WRITE_WAIT(0, dtclr); - if (rc == 0) - rc = DI_WRITE_WAIT(now, dtcmr); - -err: - return rc; -} - -void rtc_reset(void) -{ - di_init(); -} diff --git a/drivers/rtc/max6900.c b/drivers/rtc/max6900.c deleted file mode 100644 index e03a87f94da..00000000000 --- a/drivers/rtc/max6900.c +++ /dev/null @@ -1,105 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - */ - -/* - * Date & Time support for MAXIM MAX6900 RTC - */ - -/* #define DEBUG */ - -#include <common.h> -#include <command.h> -#include <rtc.h> -#include <i2c.h> -#include <linux/delay.h> - -#ifndef CFG_SYS_I2C_RTC_ADDR -#define CFG_SYS_I2C_RTC_ADDR 0x50 -#endif - -/* ------------------------------------------------------------------------- */ - -static uchar rtc_read (uchar reg) -{ - return (i2c_reg_read (CFG_SYS_I2C_RTC_ADDR, reg)); -} - -static void rtc_write (uchar reg, uchar val) -{ - i2c_reg_write (CFG_SYS_I2C_RTC_ADDR, reg, val); - udelay(2500); -} - -/* ------------------------------------------------------------------------- */ - -int rtc_get (struct rtc_time *tmp) -{ - uchar sec, min, hour, mday, wday, mon, cent, year; - int retry = 1; - - do { - sec = rtc_read (0x80); - min = rtc_read (0x82); - hour = rtc_read (0x84); - mday = rtc_read (0x86); - mon = rtc_read (0x88); - wday = rtc_read (0x8a); - year = rtc_read (0x8c); - cent = rtc_read (0x92); - /* - * Check for seconds rollover - */ - if ((sec != 59) || (rtc_read(0x80) == sec)){ - retry = 0; - } - } while (retry); - - debug ( "Get RTC year: %02x mon: %02x cent: %02x mday: %02x wday: %02x " - "hr: %02x min: %02x sec: %02x\n", - year, mon, cent, mday, wday, - hour, min, sec ); - - tmp->tm_sec = bcd2bin (sec & 0x7F); - tmp->tm_min = bcd2bin (min & 0x7F); - tmp->tm_hour = bcd2bin (hour & 0x3F); - tmp->tm_mday = bcd2bin (mday & 0x3F); - tmp->tm_mon = bcd2bin (mon & 0x1F); - tmp->tm_year = bcd2bin (year) + bcd2bin(cent) * 100; - tmp->tm_wday = bcd2bin (wday & 0x07); - tmp->tm_yday = 0; - tmp->tm_isdst= 0; - - debug ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", - tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, - tmp->tm_hour, tmp->tm_min, tmp->tm_sec); - - return 0; -} - -int rtc_set (struct rtc_time *tmp) -{ - - debug ( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", - tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, - tmp->tm_hour, tmp->tm_min, tmp->tm_sec); - - rtc_write (0x9E, 0x00); - rtc_write (0x80, 0); /* Clear seconds to ensure no rollover */ - rtc_write (0x92, bin2bcd(tmp->tm_year / 100)); - rtc_write (0x8c, bin2bcd(tmp->tm_year % 100)); - rtc_write (0x8a, bin2bcd(tmp->tm_wday)); - rtc_write (0x88, bin2bcd(tmp->tm_mon)); - rtc_write (0x86, bin2bcd(tmp->tm_mday)); - rtc_write (0x84, bin2bcd(tmp->tm_hour)); - rtc_write (0x82, bin2bcd(tmp->tm_min )); - rtc_write (0x80, bin2bcd(tmp->tm_sec )); - - return 0; -} - -void rtc_reset (void) -{ -} diff --git a/drivers/rtc/mk48t59.c b/drivers/rtc/mk48t59.c deleted file mode 100644 index 8c90a704076..00000000000 --- a/drivers/rtc/mk48t59.c +++ /dev/null @@ -1,175 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Andreas Heppel <aheppel@sysgo.de> - */ - -/* - * Date & Time support for the MK48T59 RTC - */ - -#undef RTC_DEBUG - -#include <common.h> -#include <command.h> -#include <config.h> -#include <rtc.h> -#include <mk48t59.h> - -#if defined(CONFIG_BAB7xx) - -static uchar rtc_read (short reg) -{ - out8(RTC_PORT_ADDR0, reg & 0xFF); - out8(RTC_PORT_ADDR1, (reg>>8) & 0xFF); - return in8(RTC_PORT_DATA); -} - -static void rtc_write (short reg, uchar val) -{ - out8(RTC_PORT_ADDR0, reg & 0xFF); - out8(RTC_PORT_ADDR1, (reg>>8) & 0xFF); - out8(RTC_PORT_DATA, val); -} - -#elif defined(CONFIG_EVAL5200) - -static uchar rtc_read (short reg) -{ - return in8(RTC(reg)); -} - -static void rtc_write (short reg, uchar val) -{ - out8(RTC(reg),val); -} - -#else -# error Board specific rtc access functions should be supplied -#endif - -/* ------------------------------------------------------------------------- */ - -void *nvram_read(void *dest, const short src, size_t count) -{ - uchar *d = (uchar *) dest; - short s = src; - - while (count--) - *d++ = rtc_read(s++); - - return dest; -} - -void nvram_write(short dest, const void *src, size_t count) -{ - short d = dest; - uchar *s = (uchar *) src; - - while (count--) - rtc_write(d++, *s++); -} - -/* ------------------------------------------------------------------------- */ - -int rtc_get (struct rtc_time *tmp) -{ - uchar save_ctrl_a; - uchar sec, min, hour, mday, wday, mon, year; - - /* Simple: freeze the clock, read it and allow updates again */ - save_ctrl_a = rtc_read(RTC_CONTROLA); - - /* Set the register to read the value. */ - save_ctrl_a |= RTC_CA_READ; - rtc_write(RTC_CONTROLA, save_ctrl_a); - - sec = rtc_read (RTC_SECONDS); - min = rtc_read (RTC_MINUTES); - hour = rtc_read (RTC_HOURS); - mday = rtc_read (RTC_DAY_OF_MONTH); - wday = rtc_read (RTC_DAY_OF_WEEK); - mon = rtc_read (RTC_MONTH); - year = rtc_read (RTC_YEAR); - - /* re-enable update */ - save_ctrl_a &= ~RTC_CA_READ; - rtc_write(RTC_CONTROLA, save_ctrl_a); - -#ifdef RTC_DEBUG - printf ( "Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x " - "hr: %02x min: %02x sec: %02x\n", - year, mon, mday, wday, - hour, min, sec ); -#endif - tmp->tm_sec = bcd2bin (sec & 0x7F); - tmp->tm_min = bcd2bin (min & 0x7F); - tmp->tm_hour = bcd2bin (hour & 0x3F); - tmp->tm_mday = bcd2bin (mday & 0x3F); - tmp->tm_mon = bcd2bin (mon & 0x1F); - tmp->tm_year = bcd2bin (year); - tmp->tm_wday = bcd2bin (wday & 0x07); - if(tmp->tm_year<70) - tmp->tm_year+=2000; - else - tmp->tm_year+=1900; - tmp->tm_yday = 0; - tmp->tm_isdst= 0; -#ifdef RTC_DEBUG - printf ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", - tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, - tmp->tm_hour, tmp->tm_min, tmp->tm_sec); -#endif - - return 0; -} - -int rtc_set (struct rtc_time *tmp) -{ - uchar save_ctrl_a; - -#ifdef RTC_DEBUG - printf ( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", - tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, - tmp->tm_hour, tmp->tm_min, tmp->tm_sec); -#endif - save_ctrl_a = rtc_read(RTC_CONTROLA); - - save_ctrl_a |= RTC_CA_WRITE; - rtc_write(RTC_CONTROLA, save_ctrl_a); /* disables the RTC to update the regs */ - - rtc_write (RTC_YEAR, bin2bcd(tmp->tm_year % 100)); - rtc_write (RTC_MONTH, bin2bcd(tmp->tm_mon)); - - rtc_write (RTC_DAY_OF_WEEK, bin2bcd(tmp->tm_wday)); - rtc_write (RTC_DAY_OF_MONTH, bin2bcd(tmp->tm_mday)); - rtc_write (RTC_HOURS, bin2bcd(tmp->tm_hour)); - rtc_write (RTC_MINUTES, bin2bcd(tmp->tm_min )); - rtc_write (RTC_SECONDS, bin2bcd(tmp->tm_sec )); - - save_ctrl_a &= ~RTC_CA_WRITE; - rtc_write(RTC_CONTROLA, save_ctrl_a); /* enables the RTC to update the regs */ - - return 0; -} - -void rtc_reset (void) -{ - uchar control_b; - - /* - * Start oscillator here. - */ - control_b = rtc_read(RTC_CONTROLB); - - control_b &= ~RTC_CB_STOP; - rtc_write(RTC_CONTROLB, control_b); -} - -void rtc_set_watchdog(short multi, short res) -{ - uchar wd_value; - - wd_value = RTC_WDS | ((multi & 0x1F) << 2) | (res & 0x3); - rtc_write(RTC_WATCHDOG, wd_value); -} diff --git a/drivers/rtc/mx27rtc.c b/drivers/rtc/mx27rtc.c deleted file mode 100644 index 563e8a4a361..00000000000 --- a/drivers/rtc/mx27rtc.c +++ /dev/null @@ -1,64 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Freescale i.MX27 RTC Driver - * - * Copyright (C) 2012 Philippe Reynes <tremyfr@yahoo.fr> - */ - -#include <common.h> -#include <rtc.h> -#include <asm/io.h> -#include <asm/arch/imx-regs.h> - -#define HOUR_SHIFT 8 -#define HOUR_MASK 0x1f -#define MIN_SHIFT 0 -#define MIN_MASK 0x3f - -int rtc_get(struct rtc_time *time) -{ - struct rtc_regs *rtc_regs = (struct rtc_regs *)IMX_RTC_BASE; - uint32_t day, hour, min, sec; - - day = readl(&rtc_regs->dayr); - hour = readl(&rtc_regs->hourmin); - sec = readl(&rtc_regs->seconds); - - min = (hour >> MIN_SHIFT) & MIN_MASK; - hour = (hour >> HOUR_SHIFT) & HOUR_MASK; - - sec += min * 60 + hour * 3600 + day * 24 * 3600; - - rtc_to_tm(sec, time); - - return 0; -} - -int rtc_set(struct rtc_time *time) -{ - struct rtc_regs *rtc_regs = (struct rtc_regs *)IMX_RTC_BASE; - uint32_t day, hour, min, sec; - - sec = rtc_mktime(time); - - day = sec / (24 * 3600); - sec = sec % (24 * 3600); - hour = sec / 3600; - sec = sec % 3600; - min = sec / 60; - sec = sec % 60; - - hour = (hour & HOUR_MASK) << HOUR_SHIFT; - hour |= (min & MIN_MASK) << MIN_SHIFT; - - writel(day, &rtc_regs->dayr); - writel(hour, &rtc_regs->hourmin); - writel(sec, &rtc_regs->seconds); - - return 0; -} - -void rtc_reset(void) -{ - /* nothing to do */ -} diff --git a/drivers/rtc/rs5c372.c b/drivers/rtc/rs5c372.c deleted file mode 100644 index 6b1c23ca5db..00000000000 --- a/drivers/rtc/rs5c372.c +++ /dev/null @@ -1,256 +0,0 @@ -/* - * rs5c372.c - * - * Device driver for Ricoh's Real Time Controller RS5C372A. - * - * Copyright (C) 2004 Gary Jennejohn garyj@denx.de - * - * Based in part in ds1307.c - - * (C) Copyright 2001, 2002, 2003 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * Keith Outwater, keith_outwater@mvis.com` - * Steven Scholz, steven.scholz@imc-berlin.de - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <common.h> -#include <command.h> -#include <rtc.h> -#include <i2c.h> - -/* - * Reads are always done starting with register 15, which requires some - * jumping-through-hoops to access the data correctly. - * - * Writes are always done starting with register 0. - */ - -#define DEBUG 0 - -#if DEBUG -static unsigned int rtc_debug = DEBUG; -#else -#define rtc_debug 0 /* gcc will remove all the debug code for us */ -#endif - -#ifndef CFG_SYS_I2C_RTC_ADDR -#define CFG_SYS_I2C_RTC_ADDR 0x32 -#endif - -#define RS5C372_RAM_SIZE 0x10 -#define RATE_32000HZ 0x80 /* Rate Select 32.000KHz */ -#define RATE_32768HZ 0x00 /* Rate Select 32.768KHz */ - -#define STATUS_XPT 0x10 /* data invalid because voltage was 0 */ - -#define USE_24HOUR_MODE 0x20 -#define TWELVE_HOUR_MODE(n) ((((n) >> 5) & 1) == 0) -#define HOURS_AP(n) (((n) >> 5) & 1) -#define HOURS_12(n) bcd2bin((n) & 0x1F) -#define HOURS_24(n) bcd2bin((n) & 0x3F) - - -static int setup_done = 0; - -static int -rs5c372_readram(unsigned char *buf, int len) -{ - int ret; - - ret = i2c_read(CFG_SYS_I2C_RTC_ADDR, 0, 0, buf, len); - if (ret != 0) { - printf("%s: failed to read\n", __FUNCTION__); - return ret; - } - - if (buf[0] & STATUS_XPT) - printf("### Warning: RTC lost power\n"); - - return ret; -} - -static void -rs5c372_enable(void) -{ - unsigned char buf[RS5C372_RAM_SIZE + 1]; - int ret; - - /* note that this returns reg. 15 in buf[1] */ - ret = rs5c372_readram(&buf[1], RS5C372_RAM_SIZE); - if (ret != 0) { - printf("%s: failed\n", __FUNCTION__); - return; - } - - buf[0] = 0; - /* we want to start writing at register 0 so we have to copy the */ - /* register contents up one slot */ - for (ret = 2; ret < 9; ret++) - buf[ret - 1] = buf[ret]; - /* registers 0 to 6 (time values) are not touched */ - buf[8] = RATE_32768HZ; /* reg. 7 */ - buf[9] = 0; /* reg. 8 */ - buf[10] = 0; /* reg. 9 */ - buf[11] = 0; /* reg. 10 */ - buf[12] = 0; /* reg. 11 */ - buf[13] = 0; /* reg. 12 */ - buf[14] = 0; /* reg. 13 */ - buf[15] = 0; /* reg. 14 */ - buf[16] = USE_24HOUR_MODE; /* reg. 15 */ - ret = i2c_write(CFG_SYS_I2C_RTC_ADDR, 0, 0, buf, RS5C372_RAM_SIZE+1); - if (ret != 0) { - printf("%s: failed\n", __FUNCTION__); - return; - } - setup_done = 1; - - return; -} - -static void -rs5c372_convert_to_time(struct rtc_time *dt, unsigned char *buf) -{ - /* buf[0] is register 15 */ - dt->tm_sec = bcd2bin(buf[1]); - dt->tm_min = bcd2bin(buf[2]); - - if (TWELVE_HOUR_MODE(buf[0])) { - dt->tm_hour = HOURS_12(buf[3]); - if (HOURS_AP(buf[3])) /* PM */ - dt->tm_hour += 12; - } else /* 24-hour-mode */ - dt->tm_hour = HOURS_24(buf[3]); - - dt->tm_mday = bcd2bin(buf[5]); - dt->tm_mon = bcd2bin(buf[6]); - dt->tm_year = bcd2bin(buf[7]); - if (dt->tm_year >= 70) - dt->tm_year += 1900; - else - dt->tm_year += 2000; - /* 0 is Sunday */ - dt->tm_wday = bcd2bin(buf[4] & 0x07); - dt->tm_yday = 0; - dt->tm_isdst= 0; - - if(rtc_debug > 2) { - printf("rs5c372_convert_to_time: year = %d\n", dt->tm_year); - printf("rs5c372_convert_to_time: mon = %d\n", dt->tm_mon); - printf("rs5c372_convert_to_time: mday = %d\n", dt->tm_mday); - printf("rs5c372_convert_to_time: hour = %d\n", dt->tm_hour); - printf("rs5c372_convert_to_time: min = %d\n", dt->tm_min); - printf("rs5c372_convert_to_time: sec = %d\n", dt->tm_sec); - } -} - -/* - * Get the current time from the RTC - */ -int -rtc_get (struct rtc_time *tmp) -{ - unsigned char buf[RS5C372_RAM_SIZE]; - int ret; - - if (!setup_done) - rs5c372_enable(); - - if (!setup_done) - return -1; - - memset(buf, 0, sizeof(buf)); - - /* note that this returns reg. 15 in buf[0] */ - ret = rs5c372_readram(buf, RS5C372_RAM_SIZE); - if (ret != 0) { - printf("%s: failed\n", __FUNCTION__); - return -1; - } - - rs5c372_convert_to_time(tmp, buf); - - return 0; -} - -/* - * Set the RTC - */ -int rtc_set (struct rtc_time *tmp) -{ - unsigned char buf[8], reg15; - int ret; - - if (!setup_done) - rs5c372_enable(); - - if (!setup_done) - return -1; - - if(rtc_debug > 2) { - printf("rtc_set: tm_year = %d\n", tmp->tm_year); - printf("rtc_set: tm_mon = %d\n", tmp->tm_mon); - printf("rtc_set: tm_mday = %d\n", tmp->tm_mday); - printf("rtc_set: tm_hour = %d\n", tmp->tm_hour); - printf("rtc_set: tm_min = %d\n", tmp->tm_min); - printf("rtc_set: tm_sec = %d\n", tmp->tm_sec); - } - - memset(buf, 0, sizeof(buf)); - - /* only read register 15 */ - ret = i2c_read(CFG_SYS_I2C_RTC_ADDR, 0, 0, buf, 1); - - if (ret == 0) { - /* need to save register 15 */ - reg15 = buf[0]; - buf[0] = 0; /* register address on RS5C372 */ - buf[1] = bin2bcd(tmp->tm_sec); - buf[2] = bin2bcd(tmp->tm_min); - /* need to handle 12 hour mode */ - if (TWELVE_HOUR_MODE(reg15)) { - if (tmp->tm_hour >= 12) { /* PM */ - /* 12 PM is a special case */ - if (tmp->tm_hour == 12) - buf[3] = bin2bcd(tmp->tm_hour); - else - buf[3] = bin2bcd(tmp->tm_hour - 12); - buf[3] |= 0x20; - } - } else { - buf[3] = bin2bcd(tmp->tm_hour); - } - - buf[4] = bin2bcd(tmp->tm_wday); - buf[5] = bin2bcd(tmp->tm_mday); - buf[6] = bin2bcd(tmp->tm_mon); - if (tmp->tm_year < 1970 || tmp->tm_year > 2069) - printf("WARNING: year should be between 1970 and 2069!\n"); - buf[7] = bin2bcd(tmp->tm_year % 100); - - ret = i2c_write(CFG_SYS_I2C_RTC_ADDR, 0, 0, buf, 8); - if (ret != 0) { - printf("rs5c372_set_datetime(), i2c_master_send() returned %d\n",ret); - return -1; - } - } else { - return -1; - } - - return 0; -} - -/* - * Reset the RTC. - */ -void -rtc_reset (void) -{ - if (!setup_done) - rs5c372_enable(); -} diff --git a/drivers/rtc/s3c24x0_rtc.c b/drivers/rtc/s3c24x0_rtc.c deleted file mode 100644 index 96ea3cf878e..00000000000 --- a/drivers/rtc/s3c24x0_rtc.c +++ /dev/null @@ -1,149 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2003 - * David Müller ELSOFT AG Switzerland. d.mueller@elsoft.ch - */ - -/* - * Date & Time support for the built-in Samsung S3C24X0 RTC - */ - -#include <common.h> -#include <command.h> - -#include <asm/arch/s3c24x0_cpu.h> - -#include <rtc.h> -#include <asm/io.h> -#include <linux/compiler.h> - -typedef enum { - RTC_ENABLE, - RTC_DISABLE -} RTC_ACCESS; - - -static inline void SetRTC_Access(RTC_ACCESS a) -{ - struct s3c24x0_rtc *rtc = s3c24x0_get_base_rtc(); - - switch (a) { - case RTC_ENABLE: - writeb(readb(&rtc->rtccon) | 0x01, &rtc->rtccon); - break; - - case RTC_DISABLE: - writeb(readb(&rtc->rtccon) & ~0x01, &rtc->rtccon); - break; - } -} - -/* ------------------------------------------------------------------------- */ - -int rtc_get(struct rtc_time *tmp) -{ - struct s3c24x0_rtc *rtc = s3c24x0_get_base_rtc(); - uchar sec, min, hour, mday, wday, mon, year; - __maybe_unused uchar a_sec, a_min, a_hour, a_date, - a_mon, a_year, a_armed; - - /* enable access to RTC registers */ - SetRTC_Access(RTC_ENABLE); - - /* read RTC registers */ - do { - sec = readb(&rtc->bcdsec); - min = readb(&rtc->bcdmin); - hour = readb(&rtc->bcdhour); - mday = readb(&rtc->bcddate); - wday = readb(&rtc->bcdday); - mon = readb(&rtc->bcdmon); - year = readb(&rtc->bcdyear); - } while (sec != readb(&rtc->bcdsec)); - - /* read ALARM registers */ - a_sec = readb(&rtc->almsec); - a_min = readb(&rtc->almmin); - a_hour = readb(&rtc->almhour); - a_date = readb(&rtc->almdate); - a_mon = readb(&rtc->almmon); - a_year = readb(&rtc->almyear); - a_armed = readb(&rtc->rtcalm); - - /* disable access to RTC registers */ - SetRTC_Access(RTC_DISABLE); - -#ifdef RTC_DEBUG - printf("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x " - "hr: %02x min: %02x sec: %02x\n", - year, mon, mday, wday, hour, min, sec); - printf("Alarms: %02x: year: %02x month: %02x date: %02x hour: " - "%02x min: %02x sec: %02x\n", - a_armed, a_year, a_mon, a_date, a_hour, a_min, a_sec); -#endif - - tmp->tm_sec = bcd2bin(sec & 0x7F); - tmp->tm_min = bcd2bin(min & 0x7F); - tmp->tm_hour = bcd2bin(hour & 0x3F); - tmp->tm_mday = bcd2bin(mday & 0x3F); - tmp->tm_mon = bcd2bin(mon & 0x1F); - tmp->tm_year = bcd2bin(year); - tmp->tm_wday = bcd2bin(wday & 0x07); - if (tmp->tm_year < 70) - tmp->tm_year += 2000; - else - tmp->tm_year += 1900; - tmp->tm_yday = 0; - tmp->tm_isdst = 0; -#ifdef RTC_DEBUG - printf("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", - tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, - tmp->tm_hour, tmp->tm_min, tmp->tm_sec); -#endif - - return 0; -} - -int rtc_set(struct rtc_time *tmp) -{ - struct s3c24x0_rtc *rtc = s3c24x0_get_base_rtc(); - uchar sec, min, hour, mday, wday, mon, year; - -#ifdef RTC_DEBUG - printf("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", - tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, - tmp->tm_hour, tmp->tm_min, tmp->tm_sec); -#endif - year = bin2bcd(tmp->tm_year % 100); - mon = bin2bcd(tmp->tm_mon); - wday = bin2bcd(tmp->tm_wday); - mday = bin2bcd(tmp->tm_mday); - hour = bin2bcd(tmp->tm_hour); - min = bin2bcd(tmp->tm_min); - sec = bin2bcd(tmp->tm_sec); - - /* enable access to RTC registers */ - SetRTC_Access(RTC_ENABLE); - - /* write RTC registers */ - writeb(sec, &rtc->bcdsec); - writeb(min, &rtc->bcdmin); - writeb(hour, &rtc->bcdhour); - writeb(mday, &rtc->bcddate); - writeb(wday, &rtc->bcdday); - writeb(mon, &rtc->bcdmon); - writeb(year, &rtc->bcdyear); - - /* disable access to RTC registers */ - SetRTC_Access(RTC_DISABLE); - - return 0; -} - -void rtc_reset(void) -{ - struct s3c24x0_rtc *rtc = s3c24x0_get_base_rtc(); - - writeb((readb(&rtc->rtccon) & ~0x06) | 0x08, &rtc->rtccon); - writeb(readb(&rtc->rtccon) & ~(0x08 | 0x01), &rtc->rtccon); -} diff --git a/drivers/rtc/x1205.c b/drivers/rtc/x1205.c deleted file mode 100644 index 4a8d1c5903f..00000000000 --- a/drivers/rtc/x1205.c +++ /dev/null @@ -1,161 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2007 - * Stefan Roese, DENX Software Engineering, sr@denx.de. - * - * based on a the Linux rtc-x1207.c driver which is: - * Copyright 2004 Karen Spearel - * Copyright 2005 Alessandro Zummo - * - * Information and datasheet: - * http://www.intersil.com/cda/deviceinfo/0,1477,X1205,00.html - */ - -/* - * Date & Time support for Xicor/Intersil X1205 RTC - */ - -/* #define DEBUG */ - -#include <common.h> -#include <command.h> -#include <log.h> -#include <rtc.h> -#include <i2c.h> - -#define CCR_SEC 0 -#define CCR_MIN 1 -#define CCR_HOUR 2 -#define CCR_MDAY 3 -#define CCR_MONTH 4 -#define CCR_YEAR 5 -#define CCR_WDAY 6 -#define CCR_Y2K 7 - -#define X1205_REG_SR 0x3F /* status register */ -#define X1205_REG_Y2K 0x37 -#define X1205_REG_DW 0x36 -#define X1205_REG_YR 0x35 -#define X1205_REG_MO 0x34 -#define X1205_REG_DT 0x33 -#define X1205_REG_HR 0x32 -#define X1205_REG_MN 0x31 -#define X1205_REG_SC 0x30 -#define X1205_REG_DTR 0x13 -#define X1205_REG_ATR 0x12 -#define X1205_REG_INT 0x11 -#define X1205_REG_0 0x10 -#define X1205_REG_Y2K1 0x0F -#define X1205_REG_DWA1 0x0E -#define X1205_REG_YRA1 0x0D -#define X1205_REG_MOA1 0x0C -#define X1205_REG_DTA1 0x0B -#define X1205_REG_HRA1 0x0A -#define X1205_REG_MNA1 0x09 -#define X1205_REG_SCA1 0x08 -#define X1205_REG_Y2K0 0x07 -#define X1205_REG_DWA0 0x06 -#define X1205_REG_YRA0 0x05 -#define X1205_REG_MOA0 0x04 -#define X1205_REG_DTA0 0x03 -#define X1205_REG_HRA0 0x02 -#define X1205_REG_MNA0 0x01 -#define X1205_REG_SCA0 0x00 - -#define X1205_CCR_BASE 0x30 /* Base address of CCR */ -#define X1205_ALM0_BASE 0x00 /* Base address of ALARM0 */ - -#define X1205_SR_RTCF 0x01 /* Clock failure */ -#define X1205_SR_WEL 0x02 /* Write Enable Latch */ -#define X1205_SR_RWEL 0x04 /* Register Write Enable */ - -#define X1205_DTR_DTR0 0x01 -#define X1205_DTR_DTR1 0x02 -#define X1205_DTR_DTR2 0x04 - -#define X1205_HR_MIL 0x80 /* Set in ccr.hour for 24 hr mode */ - -static void rtc_write(int reg, u8 val) -{ - i2c_write(CFG_SYS_I2C_RTC_ADDR, reg, 2, &val, 1); -} - -/* - * In the routines that deal directly with the x1205 hardware, we use - * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch - * Epoch is initialized as 2000. Time is set to UTC. - */ -int rtc_get(struct rtc_time *tm) -{ - u8 buf[8]; - - i2c_read(CFG_SYS_I2C_RTC_ADDR, X1205_CCR_BASE, 2, buf, 8); - - debug("%s: raw read data - sec=%02x, min=%02x, hr=%02x, " - "mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n", - __FUNCTION__, - buf[0], buf[1], buf[2], buf[3], - buf[4], buf[5], buf[6], buf[7]); - - tm->tm_sec = bcd2bin(buf[CCR_SEC]); - tm->tm_min = bcd2bin(buf[CCR_MIN]); - tm->tm_hour = bcd2bin(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */ - tm->tm_mday = bcd2bin(buf[CCR_MDAY]); - tm->tm_mon = bcd2bin(buf[CCR_MONTH]); /* mon is 0-11 */ - tm->tm_year = bcd2bin(buf[CCR_YEAR]) - + (bcd2bin(buf[CCR_Y2K]) * 100); - tm->tm_wday = buf[CCR_WDAY]; - - debug("%s: tm is secs=%d, mins=%d, hours=%d, " - "mday=%d, mon=%d, year=%d, wday=%d\n", - __FUNCTION__, - tm->tm_sec, tm->tm_min, tm->tm_hour, - tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); - - return 0; -} - -int rtc_set(struct rtc_time *tm) -{ - int i; - u8 buf[8]; - - debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", - tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, - tm->tm_hour, tm->tm_min, tm->tm_sec); - - buf[CCR_SEC] = bin2bcd(tm->tm_sec); - buf[CCR_MIN] = bin2bcd(tm->tm_min); - - /* set hour and 24hr bit */ - buf[CCR_HOUR] = bin2bcd(tm->tm_hour) | X1205_HR_MIL; - - buf[CCR_MDAY] = bin2bcd(tm->tm_mday); - - /* month, 1 - 12 */ - buf[CCR_MONTH] = bin2bcd(tm->tm_mon); - - /* year, since the rtc epoch*/ - buf[CCR_YEAR] = bin2bcd(tm->tm_year % 100); - buf[CCR_WDAY] = tm->tm_wday & 0x07; - buf[CCR_Y2K] = bin2bcd(tm->tm_year / 100); - - /* this sequence is required to unlock the chip */ - rtc_write(X1205_REG_SR, X1205_SR_WEL); - rtc_write(X1205_REG_SR, X1205_SR_WEL | X1205_SR_RWEL); - - /* write register's data */ - for (i = 0; i < 8; i++) - rtc_write(X1205_CCR_BASE + i, buf[i]); - - rtc_write(X1205_REG_SR, 0); - - return 0; -} - -void rtc_reset(void) -{ - /* - * Nothing to do - */ -} diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h index e6ab6f1b9b7..660aaab6638 100644 --- a/drivers/serial/serial_sh.h +++ b/drivers/serial/serial_sh.h @@ -13,7 +13,6 @@ struct uart_port { }; #if defined(CONFIG_CPU_SH7721) || \ - defined(CONFIG_SH73A0) || \ defined(CONFIG_R8A7740) # define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */ # define PORT_PTCR 0xA405011EUL @@ -149,7 +148,6 @@ struct uart_port { #define SCIF_DR 0x0001 /* 7705 SCIF, 7707 SCIF, 7709 SCIF, 7750 SCIF */ #if defined(CONFIG_CPU_SH7721) || \ - defined(CONFIG_SH73A0) || \ defined(CONFIG_R8A7740) # define SCIF_ORER 0x0200 # define SCIF_ERRORS (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER) @@ -197,7 +195,6 @@ struct uart_port { (((port)->type == PORT_SCI) ? SCI_ORER : SCIF_ORER) #if defined(CONFIG_CPU_SH7721) || \ - defined(CONFIG_SH73A0) || \ defined(CONFIG_R8A7740) # define SCxSR_RDxF_CLEAR(port) (sci_in(port, SCxSR) & 0xfffc) # define SCxSR_ERROR_CLEAR(port) (sci_in(port, SCxSR) & 0xfd73) @@ -278,8 +275,7 @@ static inline void sci_##name##_out(struct uart_port *port,\ SCI_OUT(sci_size, sci_offset, value);\ } -#if defined(CONFIG_SH73A0) || \ - defined(CONFIG_R8A7740) +#if defined(CONFIG_R8A7740) #if defined(CONFIG_CPU_SH7721) || \ defined(CONFIG_SH73A0) #define SCIF_FNS(name, scif_offset, scif_size) \ @@ -323,8 +319,7 @@ static inline void sci_##name##_out(struct uart_port *port,\ CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size) #endif -#if defined(CONFIG_CPU_SH7721) || \ - defined(CONFIG_SH73A0) +#if defined(CONFIG_CPU_SH7721) SCIF_FNS(SCSMR, 0x00, 16) SCIF_FNS(SCBRR, 0x04, 8) @@ -477,7 +472,6 @@ static inline int sci_rxd_in(struct uart_port *port) #if defined(CONFIG_CPU_SH7780) #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1) #elif defined(CONFIG_CPU_SH7721) || \ - defined(CONFIG_SH73A0) || \ defined(CONFIG_R8A7740) #define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1) #elif defined(CONFIG_CPU_SH7723) diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile index 0ed3bbf356a..40c876764af 100644 --- a/drivers/sysreset/Makefile +++ b/drivers/sysreset/Makefile @@ -20,6 +20,6 @@ obj-$(CONFIG_SYSRESET_TI_SCI) += sysreset-ti-sci.o obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o obj-$(CONFIG_SYSRESET_RESETCTL) += sysreset_resetctl.o -obj-$(CONFIG_SYSRESET_$(SPL_TPL_)AT91) += sysreset_at91.o +obj-$(CONFIG_$(SPL_TPL_)SYSRESET_AT91) += sysreset_at91.o obj-$(CONFIG_$(SPL_TPL_)SYSRESET_X86) += sysreset_x86.o obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile index 9c04403da30..b04b6bcd779 100644 --- a/drivers/usb/gadget/Makefile +++ b/drivers/usb/gadget/Makefile @@ -19,8 +19,7 @@ obj-$(CONFIG_USB_GADGET_ATMEL_USBA) += atmel_usba_udc.o obj-$(CONFIG_USB_GADGET_BCM_UDC_OTG_PHY) += bcm_udc_otg_phy.o obj-$(CONFIG_USB_GADGET_DWC2_OTG) += dwc2_udc_otg.o obj-$(CONFIG_USB_GADGET_DWC2_OTG_PHY) += dwc2_udc_otg_phy.o -obj-$(CONFIG_USB_GADGET_FOTG210) += fotg210.o -obj-$(CONFIG_USB_GADGET_MAX3420) += max3420_udc.o +0obj-$(CONFIG_USB_GADGET_MAX3420) += max3420_udc.o ifndef CONFIG_SPL_BUILD obj-$(CONFIG_USB_GADGET_DOWNLOAD) += g_dnl.o obj-$(CONFIG_USB_FUNCTION_THOR) += f_thor.o diff --git a/drivers/usb/gadget/fotg210.c b/drivers/usb/gadget/fotg210.c deleted file mode 100644 index af43433d88d..00000000000 --- a/drivers/usb/gadget/fotg210.c +++ /dev/null @@ -1,964 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Faraday USB 2.0 OTG Controller - * - * (C) Copyright 2010 Faraday Technology - * Dante Su <dantesu@faraday-tech.com> - */ - -#include <common.h> -#include <command.h> -#include <config.h> -#include <cpu_func.h> -#include <log.h> -#include <net.h> -#include <malloc.h> -#include <asm/io.h> -#include <linux/delay.h> -#include <linux/errno.h> -#include <linux/types.h> -#include <linux/usb/ch9.h> -#include <linux/usb/gadget.h> - -#include <usb/fotg210.h> - -#define CFG_NUM_ENDPOINTS 4 -#define CFG_EP0_MAX_PACKET_SIZE 64 -#define CFG_EPX_MAX_PACKET_SIZE 512 - -#define CFG_CMD_TIMEOUT (CONFIG_SYS_HZ >> 2) /* 250 ms */ - -struct fotg210_chip; - -struct fotg210_ep { - struct usb_ep ep; - - uint maxpacket; - uint id; - uint stopped; - - struct list_head queue; - struct fotg210_chip *chip; - const struct usb_endpoint_descriptor *desc; -}; - -struct fotg210_request { - struct usb_request req; - struct list_head queue; - struct fotg210_ep *ep; -}; - -struct fotg210_chip { - struct usb_gadget gadget; - struct usb_gadget_driver *driver; - struct fotg210_regs *regs; - uint8_t irq; - uint16_t addr; - int pullup; - enum usb_device_state state; - struct fotg210_ep ep[1 + CFG_NUM_ENDPOINTS]; -}; - -static struct usb_endpoint_descriptor ep0_desc = { - .bLength = sizeof(struct usb_endpoint_descriptor), - .bDescriptorType = USB_DT_ENDPOINT, - .bEndpointAddress = USB_DIR_IN, - .bmAttributes = USB_ENDPOINT_XFER_CONTROL, -}; - -static inline int fifo_to_ep(struct fotg210_chip *chip, int id, int in) -{ - return (id < 0) ? 0 : ((id & 0x03) + 1); -} - -static inline int ep_to_fifo(struct fotg210_chip *chip, int id) -{ - return (id <= 0) ? -1 : ((id - 1) & 0x03); -} - -static inline int ep_reset(struct fotg210_chip *chip, uint8_t ep_addr) -{ - int ep = ep_addr & USB_ENDPOINT_NUMBER_MASK; - struct fotg210_regs *regs = chip->regs; - - if (ep_addr & USB_DIR_IN) { - /* reset endpoint */ - setbits_le32(®s->iep[ep - 1], IEP_RESET); - mdelay(1); - clrbits_le32(®s->iep[ep - 1], IEP_RESET); - /* clear endpoint stall */ - clrbits_le32(®s->iep[ep - 1], IEP_STALL); - } else { - /* reset endpoint */ - setbits_le32(®s->oep[ep - 1], OEP_RESET); - mdelay(1); - clrbits_le32(®s->oep[ep - 1], OEP_RESET); - /* clear endpoint stall */ - clrbits_le32(®s->oep[ep - 1], OEP_STALL); - } - - return 0; -} - -static int fotg210_reset(struct fotg210_chip *chip) -{ - struct fotg210_regs *regs = chip->regs; - uint32_t i; - - chip->state = USB_STATE_POWERED; - - /* chip enable */ - writel(DEVCTRL_EN, ®s->dev_ctrl); - - /* device address reset */ - chip->addr = 0; - writel(0, ®s->dev_addr); - - /* set idle counter to 7ms */ - writel(7, ®s->idle); - - /* disable all interrupts */ - writel(IMR_MASK, ®s->imr); - writel(GIMR_MASK, ®s->gimr); - writel(GIMR0_MASK, ®s->gimr0); - writel(GIMR1_MASK, ®s->gimr1); - writel(GIMR2_MASK, ®s->gimr2); - - /* clear interrupts */ - writel(ISR_MASK, ®s->isr); - writel(0, ®s->gisr); - writel(0, ®s->gisr0); - writel(0, ®s->gisr1); - writel(0, ®s->gisr2); - - /* chip reset */ - setbits_le32(®s->dev_ctrl, DEVCTRL_RESET); - mdelay(10); - if (readl(®s->dev_ctrl) & DEVCTRL_RESET) { - printf("fotg210: chip reset failed\n"); - return -1; - } - - /* CX FIFO reset */ - setbits_le32(®s->cxfifo, CXFIFO_CXFIFOCLR); - mdelay(10); - if (readl(®s->cxfifo) & CXFIFO_CXFIFOCLR) { - printf("fotg210: ep0 fifo reset failed\n"); - return -1; - } - - /* create static ep-fifo map (EP1 <-> FIFO0, EP2 <-> FIFO1 ...) */ - writel(EPMAP14_DEFAULT, ®s->epmap14); - writel(EPMAP58_DEFAULT, ®s->epmap58); - writel(FIFOMAP_DEFAULT, ®s->fifomap); - writel(0, ®s->fifocfg); - for (i = 0; i < 8; ++i) { - writel(CFG_EPX_MAX_PACKET_SIZE, ®s->iep[i]); - writel(CFG_EPX_MAX_PACKET_SIZE, ®s->oep[i]); - } - - /* FIFO reset */ - for (i = 0; i < 4; ++i) { - writel(FIFOCSR_RESET, ®s->fifocsr[i]); - mdelay(10); - if (readl(®s->fifocsr[i]) & FIFOCSR_RESET) { - printf("fotg210: fifo%d reset failed\n", i); - return -1; - } - } - - /* enable only device interrupt and triggered at level-high */ - writel(IMR_IRQLH | IMR_HOST | IMR_OTG, ®s->imr); - writel(ISR_MASK, ®s->isr); - /* disable EP0 IN/OUT interrupt */ - writel(GIMR0_CXOUT | GIMR0_CXIN, ®s->gimr0); - /* disable EPX IN+SPK+OUT interrupts */ - writel(GIMR1_MASK, ®s->gimr1); - /* disable wakeup+idle+dma+zlp interrupts */ - writel(GIMR2_WAKEUP | GIMR2_IDLE | GIMR2_DMAERR | GIMR2_DMAFIN - | GIMR2_ZLPRX | GIMR2_ZLPTX, ®s->gimr2); - /* enable all group interrupt */ - writel(0, ®s->gimr); - - /* suspend delay = 3 ms */ - writel(3, ®s->idle); - - /* turn-on device interrupts */ - setbits_le32(®s->dev_ctrl, DEVCTRL_GIRQ_EN); - - return 0; -} - -static inline int fotg210_cxwait(struct fotg210_chip *chip, uint32_t mask) -{ - struct fotg210_regs *regs = chip->regs; - int ret = -1; - ulong ts; - - for (ts = get_timer(0); get_timer(ts) < CFG_CMD_TIMEOUT; ) { - if ((readl(®s->cxfifo) & mask) != mask) - continue; - ret = 0; - break; - } - - if (ret) - printf("fotg210: cx/ep0 timeout\n"); - - return ret; -} - -static int fotg210_dma(struct fotg210_ep *ep, struct fotg210_request *req) -{ - struct fotg210_chip *chip = ep->chip; - struct fotg210_regs *regs = chip->regs; - uint32_t tmp, ts; - uint8_t *buf = req->req.buf + req->req.actual; - uint32_t len = req->req.length - req->req.actual; - int fifo = ep_to_fifo(chip, ep->id); - int ret = -EBUSY; - - /* 1. init dma buffer */ - if (len > ep->maxpacket) - len = ep->maxpacket; - - /* 2. wait for dma ready (hardware) */ - for (ts = get_timer(0); get_timer(ts) < CFG_CMD_TIMEOUT; ) { - if (!(readl(®s->dma_ctrl) & DMACTRL_START)) { - ret = 0; - break; - } - } - if (ret) { - printf("fotg210: dma busy\n"); - req->req.status = ret; - return ret; - } - - /* 3. DMA target setup */ - if (ep->desc->bEndpointAddress & USB_DIR_IN) - flush_dcache_range((ulong)buf, (ulong)buf + len); - else - invalidate_dcache_range((ulong)buf, (ulong)buf + len); - - writel(virt_to_phys(buf), ®s->dma_addr); - - if (ep->desc->bEndpointAddress & USB_DIR_IN) { - if (ep->id == 0) { - /* Wait until cx/ep0 fifo empty */ - fotg210_cxwait(chip, CXFIFO_CXFIFOE); - udelay(1); - writel(DMAFIFO_CX, ®s->dma_fifo); - } else { - /* Wait until epx fifo empty */ - fotg210_cxwait(chip, CXFIFO_FIFOE(fifo)); - writel(DMAFIFO_FIFO(fifo), ®s->dma_fifo); - } - writel(DMACTRL_LEN(len) | DMACTRL_MEM2FIFO, ®s->dma_ctrl); - } else { - uint32_t blen; - - if (ep->id == 0) { - writel(DMAFIFO_CX, ®s->dma_fifo); - do { - blen = CXFIFO_BYTES(readl(®s->cxfifo)); - } while (blen < len); - } else { - writel(DMAFIFO_FIFO(fifo), ®s->dma_fifo); - blen = FIFOCSR_BYTES(readl(®s->fifocsr[fifo])); - } - len = (len < blen) ? len : blen; - writel(DMACTRL_LEN(len) | DMACTRL_FIFO2MEM, ®s->dma_ctrl); - } - - /* 4. DMA start */ - setbits_le32(®s->dma_ctrl, DMACTRL_START); - - /* 5. DMA wait */ - ret = -EBUSY; - for (ts = get_timer(0); get_timer(ts) < CFG_CMD_TIMEOUT; ) { - tmp = readl(®s->gisr2); - /* DMA complete */ - if (tmp & GISR2_DMAFIN) { - ret = 0; - break; - } - /* DMA error */ - if (tmp & GISR2_DMAERR) { - printf("fotg210: dma error\n"); - break; - } - /* resume, suspend, reset */ - if (tmp & (GISR2_RESUME | GISR2_SUSPEND | GISR2_RESET)) { - printf("fotg210: dma reset by host\n"); - break; - } - } - - /* 7. DMA target reset */ - if (ret) - writel(DMACTRL_ABORT | DMACTRL_CLRFF, ®s->dma_ctrl); - - writel(0, ®s->gisr2); - writel(0, ®s->dma_fifo); - - req->req.status = ret; - if (!ret) - req->req.actual += len; - else - printf("fotg210: ep%d dma error(code=%d)\n", ep->id, ret); - - return len; -} - -/* - * result of setup packet - */ -#define CX_IDLE 0 -#define CX_FINISH 1 -#define CX_STALL 2 - -static void fotg210_setup(struct fotg210_chip *chip) -{ - int id, ret = CX_IDLE; - uint32_t tmp[2]; - struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)tmp; - struct fotg210_regs *regs = chip->regs; - - /* - * If this is the first Cx 8 byte command, - * we can now query USB mode (high/full speed; USB 2.0/USB 1.0) - */ - if (chip->state == USB_STATE_POWERED) { - chip->state = USB_STATE_DEFAULT; - if (readl(®s->otgcsr) & OTGCSR_DEV_B) { - /* Mini-B */ - if (readl(®s->dev_ctrl) & DEVCTRL_HS) { - puts("fotg210: HS\n"); - chip->gadget.speed = USB_SPEED_HIGH; - /* SOF mask timer = 1100 ticks */ - writel(SOFMTR_TMR(1100), ®s->sof_mtr); - } else { - puts("fotg210: FS\n"); - chip->gadget.speed = USB_SPEED_FULL; - /* SOF mask timer = 10000 ticks */ - writel(SOFMTR_TMR(10000), ®s->sof_mtr); - } - } else { - printf("fotg210: mini-A?\n"); - } - } - - /* switch data port to ep0 */ - writel(DMAFIFO_CX, ®s->dma_fifo); - /* fetch 8 bytes setup packet */ - tmp[0] = readl(®s->ep0_data); - tmp[1] = readl(®s->ep0_data); - /* release data port */ - writel(0, ®s->dma_fifo); - - if (req->bRequestType & USB_DIR_IN) - ep0_desc.bEndpointAddress = USB_DIR_IN; - else - ep0_desc.bEndpointAddress = USB_DIR_OUT; - - ret = CX_IDLE; - - if ((req->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) { - switch (req->bRequest) { - case USB_REQ_SET_CONFIGURATION: - debug("fotg210: set_cfg(%d)\n", req->wValue & 0x00FF); - if (!(req->wValue & 0x00FF)) { - chip->state = USB_STATE_ADDRESS; - writel(chip->addr, ®s->dev_addr); - } else { - chip->state = USB_STATE_CONFIGURED; - writel(chip->addr | DEVADDR_CONF, - ®s->dev_addr); - } - ret = CX_IDLE; - break; - - case USB_REQ_SET_ADDRESS: - debug("fotg210: set_addr(0x%04X)\n", req->wValue); - chip->state = USB_STATE_ADDRESS; - chip->addr = req->wValue & DEVADDR_ADDR_MASK; - ret = CX_FINISH; - writel(chip->addr, ®s->dev_addr); - break; - - case USB_REQ_CLEAR_FEATURE: - debug("fotg210: clr_feature(%d, %d)\n", - req->bRequestType & 0x03, req->wValue); - switch (req->wValue) { - case 0: /* [Endpoint] halt */ - ep_reset(chip, req->wIndex); - ret = CX_FINISH; - break; - case 1: /* [Device] remote wake-up */ - case 2: /* [Device] test mode */ - default: - ret = CX_STALL; - break; - } - break; - - case USB_REQ_SET_FEATURE: - debug("fotg210: set_feature(%d, %d)\n", - req->wValue, req->wIndex & 0xf); - switch (req->wValue) { - case 0: /* Endpoint Halt */ - id = req->wIndex & 0xf; - setbits_le32(®s->iep[id - 1], IEP_STALL); - setbits_le32(®s->oep[id - 1], OEP_STALL); - ret = CX_FINISH; - break; - case 1: /* Remote Wakeup */ - case 2: /* Test Mode */ - default: - ret = CX_STALL; - break; - } - break; - - case USB_REQ_GET_STATUS: - debug("fotg210: get_status\n"); - ret = CX_STALL; - break; - - case USB_REQ_SET_DESCRIPTOR: - debug("fotg210: set_descriptor\n"); - ret = CX_STALL; - break; - - case USB_REQ_SYNCH_FRAME: - debug("fotg210: sync frame\n"); - ret = CX_STALL; - break; - } - } /* if ((req->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) */ - - if (ret == CX_IDLE && chip->driver->setup) { - if (chip->driver->setup(&chip->gadget, req) < 0) - ret = CX_STALL; - else - ret = CX_FINISH; - } - - switch (ret) { - case CX_FINISH: - setbits_le32(®s->cxfifo, CXFIFO_CXFIN); - break; - - case CX_STALL: - setbits_le32(®s->cxfifo, CXFIFO_CXSTALL | CXFIFO_CXFIN); - printf("fotg210: cx_stall!\n"); - break; - - case CX_IDLE: - debug("fotg210: cx_idle?\n"); - default: - break; - } -} - -/* - * fifo - FIFO id - * zlp - zero length packet - */ -static void fotg210_recv(struct fotg210_chip *chip, int ep_id) -{ - struct fotg210_regs *regs = chip->regs; - struct fotg210_ep *ep = chip->ep + ep_id; - struct fotg210_request *req; - int len; - - if (ep->stopped || (ep->desc->bEndpointAddress & USB_DIR_IN)) { - printf("fotg210: ep%d recv, invalid!\n", ep->id); - return; - } - - if (list_empty(&ep->queue)) { - printf("fotg210: ep%d recv, drop!\n", ep->id); - return; - } - - req = list_first_entry(&ep->queue, struct fotg210_request, queue); - len = fotg210_dma(ep, req); - if (len < ep->ep.maxpacket || req->req.length <= req->req.actual) { - list_del_init(&req->queue); - if (req->req.complete) - req->req.complete(&ep->ep, &req->req); - } - - if (ep->id > 0 && list_empty(&ep->queue)) { - setbits_le32(®s->gimr1, - GIMR1_FIFO_RX(ep_to_fifo(chip, ep->id))); - } -} - -/* - * USB Gadget Layer - */ -static int fotg210_ep_enable( - struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc) -{ - struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep); - struct fotg210_chip *chip = ep->chip; - struct fotg210_regs *regs = chip->regs; - int id = ep_to_fifo(chip, ep->id); - int in = (desc->bEndpointAddress & USB_DIR_IN) ? 1 : 0; - - if (!_ep || !desc - || desc->bDescriptorType != USB_DT_ENDPOINT - || le16_to_cpu(desc->wMaxPacketSize) == 0) { - printf("fotg210: bad ep or descriptor\n"); - return -EINVAL; - } - - ep->desc = desc; - ep->stopped = 0; - - if (in) - setbits_le32(®s->fifomap, FIFOMAP(id, FIFOMAP_IN)); - - switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) { - case USB_ENDPOINT_XFER_CONTROL: - return -EINVAL; - - case USB_ENDPOINT_XFER_ISOC: - setbits_le32(®s->fifocfg, - FIFOCFG(id, FIFOCFG_EN | FIFOCFG_ISOC)); - break; - - case USB_ENDPOINT_XFER_BULK: - setbits_le32(®s->fifocfg, - FIFOCFG(id, FIFOCFG_EN | FIFOCFG_BULK)); - break; - - case USB_ENDPOINT_XFER_INT: - setbits_le32(®s->fifocfg, - FIFOCFG(id, FIFOCFG_EN | FIFOCFG_INTR)); - break; - } - - return 0; -} - -static int fotg210_ep_disable(struct usb_ep *_ep) -{ - struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep); - struct fotg210_chip *chip = ep->chip; - struct fotg210_regs *regs = chip->regs; - int id = ep_to_fifo(chip, ep->id); - - ep->desc = NULL; - ep->stopped = 1; - - clrbits_le32(®s->fifocfg, FIFOCFG(id, FIFOCFG_CFG_MASK)); - clrbits_le32(®s->fifomap, FIFOMAP(id, FIFOMAP_DIR_MASK)); - - return 0; -} - -static struct usb_request *fotg210_ep_alloc_request( - struct usb_ep *_ep, gfp_t gfp_flags) -{ - struct fotg210_request *req = malloc(sizeof(*req)); - - if (req) { - memset(req, 0, sizeof(*req)); - INIT_LIST_HEAD(&req->queue); - } - return &req->req; -} - -static void fotg210_ep_free_request( - struct usb_ep *_ep, struct usb_request *_req) -{ - struct fotg210_request *req; - - req = container_of(_req, struct fotg210_request, req); - free(req); -} - -static int fotg210_ep_queue( - struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) -{ - struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep); - struct fotg210_chip *chip = ep->chip; - struct fotg210_regs *regs = chip->regs; - struct fotg210_request *req; - - req = container_of(_req, struct fotg210_request, req); - if (!_req || !_req->complete || !_req->buf - || !list_empty(&req->queue)) { - printf("fotg210: invalid request to ep%d\n", ep->id); - return -EINVAL; - } - - if (!chip || chip->state == USB_STATE_SUSPENDED) { - printf("fotg210: request while chip suspended\n"); - return -EINVAL; - } - - req->req.actual = 0; - req->req.status = -EINPROGRESS; - - if (req->req.length == 0) { - req->req.status = 0; - if (req->req.complete) - req->req.complete(&ep->ep, &req->req); - return 0; - } - - if (ep->id == 0) { - do { - int len = fotg210_dma(ep, req); - if (len < ep->ep.maxpacket) - break; - if (ep->desc->bEndpointAddress & USB_DIR_IN) - udelay(100); - } while (req->req.length > req->req.actual); - } else { - if (ep->desc->bEndpointAddress & USB_DIR_IN) { - do { - int len = fotg210_dma(ep, req); - if (len < ep->ep.maxpacket) - break; - } while (req->req.length > req->req.actual); - } else { - list_add_tail(&req->queue, &ep->queue); - clrbits_le32(®s->gimr1, - GIMR1_FIFO_RX(ep_to_fifo(chip, ep->id))); - } - } - - if (ep->id == 0 || (ep->desc->bEndpointAddress & USB_DIR_IN)) { - if (req->req.complete) - req->req.complete(&ep->ep, &req->req); - } - - return 0; -} - -static int fotg210_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) -{ - struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep); - struct fotg210_request *req; - - /* make sure it's actually queued on this endpoint */ - list_for_each_entry(req, &ep->queue, queue) { - if (&req->req == _req) - break; - } - if (&req->req != _req) - return -EINVAL; - - /* remove the request */ - list_del_init(&req->queue); - - /* update status & invoke complete callback */ - if (req->req.status == -EINPROGRESS) { - req->req.status = -ECONNRESET; - if (req->req.complete) - req->req.complete(_ep, &req->req); - } - - return 0; -} - -static int fotg210_ep_halt(struct usb_ep *_ep, int halt) -{ - struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep); - struct fotg210_chip *chip = ep->chip; - struct fotg210_regs *regs = chip->regs; - int ret = -1; - - debug("fotg210: ep%d halt=%d\n", ep->id, halt); - - /* Endpoint STALL */ - if (ep->id > 0 && ep->id <= CFG_NUM_ENDPOINTS) { - if (halt) { - /* wait until all ep fifo empty */ - fotg210_cxwait(chip, 0xf00); - /* stall */ - if (ep->desc->bEndpointAddress & USB_DIR_IN) { - setbits_le32(®s->iep[ep->id - 1], - IEP_STALL); - } else { - setbits_le32(®s->oep[ep->id - 1], - OEP_STALL); - } - } else { - if (ep->desc->bEndpointAddress & USB_DIR_IN) { - clrbits_le32(®s->iep[ep->id - 1], - IEP_STALL); - } else { - clrbits_le32(®s->oep[ep->id - 1], - OEP_STALL); - } - } - ret = 0; - } - - return ret; -} - -/* - * activate/deactivate link with host. - */ -static void pullup(struct fotg210_chip *chip, int is_on) -{ - struct fotg210_regs *regs = chip->regs; - - if (is_on) { - if (!chip->pullup) { - chip->state = USB_STATE_POWERED; - chip->pullup = 1; - /* enable the chip */ - setbits_le32(®s->dev_ctrl, DEVCTRL_EN); - /* clear unplug bit (BIT0) */ - clrbits_le32(®s->phy_tmsr, PHYTMSR_UNPLUG); - } - } else { - chip->state = USB_STATE_NOTATTACHED; - chip->pullup = 0; - chip->addr = 0; - writel(chip->addr, ®s->dev_addr); - /* set unplug bit (BIT0) */ - setbits_le32(®s->phy_tmsr, PHYTMSR_UNPLUG); - /* disable the chip */ - clrbits_le32(®s->dev_ctrl, DEVCTRL_EN); - } -} - -static int fotg210_pullup(struct usb_gadget *_gadget, int is_on) -{ - struct fotg210_chip *chip; - - chip = container_of(_gadget, struct fotg210_chip, gadget); - - debug("fotg210: pullup=%d\n", is_on); - - pullup(chip, is_on); - - return 0; -} - -static int fotg210_get_frame(struct usb_gadget *_gadget) -{ - struct fotg210_chip *chip; - struct fotg210_regs *regs; - - chip = container_of(_gadget, struct fotg210_chip, gadget); - regs = chip->regs; - - return SOFFNR_FNR(readl(®s->sof_fnr)); -} - -static struct usb_gadget_ops fotg210_gadget_ops = { - .get_frame = fotg210_get_frame, - .pullup = fotg210_pullup, -}; - -static struct usb_ep_ops fotg210_ep_ops = { - .enable = fotg210_ep_enable, - .disable = fotg210_ep_disable, - .queue = fotg210_ep_queue, - .dequeue = fotg210_ep_dequeue, - .set_halt = fotg210_ep_halt, - .alloc_request = fotg210_ep_alloc_request, - .free_request = fotg210_ep_free_request, -}; - -static struct fotg210_chip controller = { - .regs = (void __iomem *)CONFIG_FOTG210_BASE, - .gadget = { - .name = "fotg210_udc", - .ops = &fotg210_gadget_ops, - .ep0 = &controller.ep[0].ep, - .speed = USB_SPEED_UNKNOWN, - .is_dualspeed = 1, - .is_otg = 0, - .is_a_peripheral = 0, - .b_hnp_enable = 0, - .a_hnp_support = 0, - .a_alt_hnp_support = 0, - }, - .ep[0] = { - .id = 0, - .ep = { - .name = "ep0", - .ops = &fotg210_ep_ops, - }, - .desc = &ep0_desc, - .chip = &controller, - .maxpacket = CFG_EP0_MAX_PACKET_SIZE, - }, - .ep[1] = { - .id = 1, - .ep = { - .name = "ep1", - .ops = &fotg210_ep_ops, - }, - .chip = &controller, - .maxpacket = CFG_EPX_MAX_PACKET_SIZE, - }, - .ep[2] = { - .id = 2, - .ep = { - .name = "ep2", - .ops = &fotg210_ep_ops, - }, - .chip = &controller, - .maxpacket = CFG_EPX_MAX_PACKET_SIZE, - }, - .ep[3] = { - .id = 3, - .ep = { - .name = "ep3", - .ops = &fotg210_ep_ops, - }, - .chip = &controller, - .maxpacket = CFG_EPX_MAX_PACKET_SIZE, - }, - .ep[4] = { - .id = 4, - .ep = { - .name = "ep4", - .ops = &fotg210_ep_ops, - }, - .chip = &controller, - .maxpacket = CFG_EPX_MAX_PACKET_SIZE, - }, -}; - -int usb_gadget_handle_interrupts(int index) -{ - struct fotg210_chip *chip = &controller; - struct fotg210_regs *regs = chip->regs; - uint32_t id, st, isr, gisr; - - isr = readl(®s->isr) & (~readl(®s->imr)); - gisr = readl(®s->gisr) & (~readl(®s->gimr)); - if (!(isr & ISR_DEV) || !gisr) - return 0; - - writel(ISR_DEV, ®s->isr); - - /* CX interrupts */ - if (gisr & GISR_GRP0) { - st = readl(®s->gisr0); - /* - * Write 1 and then 0 works for both W1C & RW. - * - * HW v1.11.0+: It's a W1C register (write 1 clear) - * HW v1.10.0-: It's a R/W register (write 0 clear) - */ - writel(st & GISR0_CXABORT, ®s->gisr0); - writel(0, ®s->gisr0); - - if (st & GISR0_CXERR) - printf("fotg210: cmd error\n"); - - if (st & GISR0_CXABORT) - printf("fotg210: cmd abort\n"); - - if (st & GISR0_CXSETUP) /* setup */ - fotg210_setup(chip); - else if (st & GISR0_CXEND) /* command finish */ - setbits_le32(®s->cxfifo, CXFIFO_CXFIN); - } - - /* FIFO interrupts */ - if (gisr & GISR_GRP1) { - st = readl(®s->gisr1); - for (id = 0; id < 4; ++id) { - if (st & GISR1_RX_FIFO(id)) - fotg210_recv(chip, fifo_to_ep(chip, id, 0)); - } - } - - /* Device Status Interrupts */ - if (gisr & GISR_GRP2) { - st = readl(®s->gisr2); - /* - * Write 1 and then 0 works for both W1C & RW. - * - * HW v1.11.0+: It's a W1C register (write 1 clear) - * HW v1.10.0-: It's a R/W register (write 0 clear) - */ - writel(st, ®s->gisr2); - writel(0, ®s->gisr2); - - if (st & GISR2_RESET) - printf("fotg210: reset by host\n"); - else if (st & GISR2_SUSPEND) - printf("fotg210: suspend/removed\n"); - else if (st & GISR2_RESUME) - printf("fotg210: resume\n"); - - /* Errors */ - if (st & GISR2_ISOCERR) - printf("fotg210: iso error\n"); - if (st & GISR2_ISOCABT) - printf("fotg210: iso abort\n"); - if (st & GISR2_DMAERR) - printf("fotg210: dma error\n"); - } - - return 0; -} - -int usb_gadget_register_driver(struct usb_gadget_driver *driver) -{ - int i, ret = 0; - struct fotg210_chip *chip = &controller; - - if (!driver || !driver->bind || !driver->setup) { - puts("fotg210: bad parameter.\n"); - return -EINVAL; - } - - INIT_LIST_HEAD(&chip->gadget.ep_list); - for (i = 0; i < CFG_NUM_ENDPOINTS + 1; ++i) { - struct fotg210_ep *ep = chip->ep + i; - - ep->ep.maxpacket = ep->maxpacket; - INIT_LIST_HEAD(&ep->queue); - - if (ep->id == 0) { - ep->stopped = 0; - } else { - ep->stopped = 1; - list_add_tail(&ep->ep.ep_list, &chip->gadget.ep_list); - } - } - - if (fotg210_reset(chip)) { - puts("fotg210: reset failed.\n"); - return -EINVAL; - } - - ret = driver->bind(&chip->gadget); - if (ret) { - debug("fotg210: driver->bind() returned %d\n", ret); - return ret; - } - chip->driver = driver; - - return ret; -} - -int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) -{ - struct fotg210_chip *chip = &controller; - - driver->unbind(&chip->gadget); - chip->driver = NULL; - - pullup(chip, 0); - - return 0; -} diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h index abc6dc7f89f..98156c312d2 100644 --- a/drivers/usb/gadget/gadget_chips.h +++ b/drivers/usb/gadget/gadget_chips.h @@ -117,12 +117,6 @@ #define gadget_is_ci(g) 0 #endif -#ifdef CONFIG_USB_GADGET_FOTG210 -#define gadget_is_fotg210(g) (!strcmp("fotg210_udc", (g)->name)) -#else -#define gadget_is_fotg210(g) 0 -#endif - #ifdef CONFIG_USB_DWC3_GADGET #define gadget_is_dwc3(g) (!strcmp("dwc3-gadget", (g)->name)) #else @@ -202,8 +196,6 @@ static inline int usb_gadget_controller_number(struct usb_gadget *gadget) return 0x20; else if (gadget_is_ci(gadget)) return 0x21; - else if (gadget_is_fotg210(gadget)) - return 0x22; else if (gadget_is_dwc3(gadget)) return 0x23; else if (gadget_is_cdns3(gadget)) diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index ddc36632069..8dad36f9369 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -17,7 +17,6 @@ obj-$(CONFIG_USB_OHCI_NEW) += ohci-hcd.o obj-$(CONFIG_USB_ATMEL) += ohci-at91.o obj-$(CONFIG_USB_OHCI_DA8XX) += ohci-da8xx.o obj-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o -obj-$(CONFIG_USB_SL811HS) += sl811-hcd.o obj-$(CONFIG_USB_OHCI_LPC32XX) += ohci-lpc32xx.o obj-$(CONFIG_USB_OHCI_PCI) += ohci-pci.o obj-$(CONFIG_USB_OHCI_GENERIC) += ohci-generic.o @@ -25,10 +24,8 @@ obj-$(CONFIG_USB_OHCI_NPCM) += ohci-npcm.o # echi obj-$(CONFIG_USB_EHCI_HCD) += ehci-hcd.o -obj-$(CONFIG_USB_EHCI_ARMADA100) += ehci-armada100.o utmi-armada100.o obj-$(CONFIG_USB_EHCI_ATMEL) += ehci-atmel.o obj-$(CONFIG_USB_EHCI_FSL) += ehci-fsl.o -obj-$(CONFIG_USB_EHCI_FARADAY) += ehci-faraday.o obj-$(CONFIG_USB_EHCI_GENERIC) += ehci-generic.o obj-$(CONFIG_USB_EHCI_EXYNOS) += ehci-exynos.o obj-$(CONFIG_USB_EHCI_MXS) += ehci-mxs.o @@ -41,9 +38,7 @@ obj-$(CONFIG_USB_EHCI_MARVELL) += ehci-marvell.o obj-$(CONFIG_USB_EHCI_MSM) += ehci-msm.o obj-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o obj-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o -obj-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o obj-$(CONFIG_USB_EHCI_VF) += ehci-vf.o -obj-$(CONFIG_USB_EHCI_RMOBILE) += ehci-rmobile.o obj-$(CONFIG_USB_EHCI_ZYNQ) += ehci-zynq.o # xhci diff --git a/drivers/usb/host/ehci-armada100.c b/drivers/usb/host/ehci-armada100.c deleted file mode 100644 index 2ce9f27b862..00000000000 --- a/drivers/usb/host/ehci-armada100.c +++ /dev/null @@ -1,48 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2012 - * eInfochips Ltd. <www.einfochips.com> - * Written-by: Ajay Bhargav <contact@8051projects.net> - * - * This driver is based on Kirkwood echi driver - * (C) Copyright 2009 - * Marvell Semiconductor <www.marvell.com> - * Written-by: Prafulla Wadaskar <prafulla@marvell.com> - */ - -#include <common.h> -#include <log.h> -#include <asm/io.h> -#include <usb.h> -#include "ehci.h" -#include <asm/arch/cpu.h> -#include <asm/arch/armada100.h> -#include <asm/arch/utmi-armada100.h> - -/* - * EHCI host controller init - */ -int ehci_hcd_init(int index, enum usb_init_type init, - struct ehci_hccr **hccr, struct ehci_hcor **hcor) -{ - if (utmi_init() < 0) - return -1; - - *hccr = (struct ehci_hccr *)(ARMD1_USB_HOST_BASE + 0x100); - *hcor = (struct ehci_hcor *)((uint32_t) *hccr - + HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); - - debug("armada100-ehci: init hccr %x and hcor %x hc_length %d\n", - (uint32_t)*hccr, (uint32_t)*hcor, - (uint32_t)HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); - - return 0; -} - -/* - * EHCI host controller stop - */ -int ehci_hcd_stop(int index) -{ - return 0; -} diff --git a/drivers/usb/host/ehci-faraday.c b/drivers/usb/host/ehci-faraday.c deleted file mode 100644 index 85a35269601..00000000000 --- a/drivers/usb/host/ehci-faraday.c +++ /dev/null @@ -1,144 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Faraday USB 2.0 EHCI Controller - * - * (C) Copyright 2010 Faraday Technology - * Dante Su <dantesu@faraday-tech.com> - */ - -#include <common.h> -#include <log.h> -#include <asm/io.h> -#include <usb.h> -#include <linux/delay.h> -#include <usb/fusbh200.h> -#include <usb/fotg210.h> - -#include "ehci.h" - -#ifndef CFG_USB_EHCI_BASE_LIST -#define CFG_USB_EHCI_BASE_LIST { CONFIG_USB_EHCI_BASE } -#endif - -union ehci_faraday_regs { - struct fusbh200_regs usb; - struct fotg210_regs otg; -}; - -static inline int ehci_is_fotg2xx(union ehci_faraday_regs *regs) -{ - return !readl(®s->usb.easstr); -} - -void faraday_ehci_set_usbmode(struct ehci_ctrl *ctrl) -{ - /* nothing needs to be done */ -} - -int faraday_ehci_get_port_speed(struct ehci_ctrl *ctrl, uint32_t reg) -{ - int spd, ret = PORTSC_PSPD_HS; - union ehci_faraday_regs *regs; - - ret = (void __iomem *)((ulong)ctrl->hcor - 0x10); - if (ehci_is_fotg2xx(regs)) - spd = OTGCSR_SPD(readl(®s->otg.otgcsr)); - else - spd = BMCSR_SPD(readl(®s->usb.bmcsr)); - - switch (spd) { - case 0: /* full speed */ - ret = PORTSC_PSPD_FS; - break; - case 1: /* low speed */ - ret = PORTSC_PSPD_LS; - break; - case 2: /* high speed */ - ret = PORTSC_PSPD_HS; - break; - default: - printf("ehci-faraday: invalid device speed\n"); - break; - } - - return ret; -} - -uint32_t *faraday_ehci_get_portsc_register(struct ehci_ctrl *ctrl, int port) -{ - /* Faraday EHCI has one and only one portsc register */ - if (port) { - /* Printing the message would cause a scan failure! */ - debug("The request port(%d) is not configured\n", port); - return NULL; - } - - /* Faraday EHCI PORTSC register offset is 0x20 from hcor */ - return (uint32_t *)((uint8_t *)ctrl->hcor + 0x20); -} - -static const struct ehci_ops faraday_ehci_ops = { - .set_usb_mode = faraday_ehci_set_usbmode, - .get_port_speed = faraday_ehci_get_port_speed, - .get_portsc_register = faraday_ehci_get_portsc_register, -}; - -/* - * Create the appropriate control structures to manage - * a new EHCI host controller. - */ -int ehci_hcd_init(int index, enum usb_init_type init, - struct ehci_hccr **ret_hccr, struct ehci_hcor **ret_hcor) -{ - struct ehci_hccr *hccr; - struct ehci_hcor *hcor; - union ehci_faraday_regs *regs; - uint32_t base_list[] = CFG_USB_EHCI_BASE_LIST; - - if (index < 0 || index >= ARRAY_SIZE(base_list)) - return -1; - ehci_set_controller_priv(index, NULL, &faraday_ehci_ops); - regs = (void __iomem *)base_list[index]; - hccr = (struct ehci_hccr *)®s->usb.hccr; - hcor = (struct ehci_hcor *)®s->usb.hcor; - - if (ehci_is_fotg2xx(regs)) { - /* A-device bus reset */ - /* ... Power off A-device */ - setbits_le32(®s->otg.otgcsr, OTGCSR_A_BUSDROP); - /* ... Drop vbus and bus traffic */ - clrbits_le32(®s->otg.otgcsr, OTGCSR_A_BUSREQ); - mdelay(1); - /* ... Power on A-device */ - clrbits_le32(®s->otg.otgcsr, OTGCSR_A_BUSDROP); - /* ... Drive vbus and bus traffic */ - setbits_le32(®s->otg.otgcsr, OTGCSR_A_BUSREQ); - mdelay(1); - /* Disable OTG & DEV interrupts, triggered at level-high */ - writel(IMR_IRQLH | IMR_OTG | IMR_DEV, ®s->otg.imr); - /* Clear all interrupt status */ - writel(ISR_HOST | ISR_OTG | ISR_DEV, ®s->otg.isr); - } else { - /* Interrupt=level-high */ - setbits_le32(®s->usb.bmcsr, BMCSR_IRQLH); - /* VBUS on */ - clrbits_le32(®s->usb.bmcsr, BMCSR_VBUS_OFF); - /* Disable all interrupts */ - writel(0x00, ®s->usb.bmier); - writel(0x1f, ®s->usb.bmisr); - } - - *ret_hccr = hccr; - *ret_hcor = hcor; - - return 0; -} - -/* - * Destroy the appropriate control structures corresponding - * the the EHCI host controller. - */ -int ehci_hcd_stop(int index) -{ - return 0; -} diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index 9139d61dd0c..9839aa17492 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -705,12 +705,10 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer, dev->act_len = length - QT_TOKEN_GET_TOTALBYTES(qhtoken); } else { dev->act_len = 0; -#ifndef CONFIG_USB_EHCI_FARADAY debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n", dev->devnum, ehci_readl(&ctrl->hcor->or_usbsts), ehci_readl(&ctrl->hcor->or_portsc[0]), ehci_readl(&ctrl->hcor->or_portsc[1])); -#endif } free(qtd); @@ -1190,9 +1188,6 @@ int usb_lowlevel_init(int index, enum usb_init_type init, void **controller) if (rc) return rc; #endif -#ifdef CONFIG_USB_EHCI_FARADAY - tweaks |= EHCI_TWEAK_NO_INIT_CF; -#endif rc = ehci_common_init(ctrl, tweaks); if (rc) return rc; diff --git a/drivers/usb/host/ehci-rmobile.c b/drivers/usb/host/ehci-rmobile.c deleted file mode 100644 index 60525f22867..00000000000 --- a/drivers/usb/host/ehci-rmobile.c +++ /dev/null @@ -1,129 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * EHCI HCD (Host Controller Driver) for USB. - * - * Copyright (C) 2013,2014 Renesas Electronics Corporation - * Copyright (C) 2014 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> - */ - -#include <common.h> -#include <asm/io.h> -#include <asm/arch/ehci-rmobile.h> -#include <linux/delay.h> -#include "ehci.h" - -#if defined(CONFIG_R8A7740) -static u32 usb_base_address[] = { - 0xC6700000 -}; -#elif defined(CONFIG_R8A7790) -static u32 usb_base_address[] = { - 0xEE080000, /* USB0 (EHCI) */ - 0xEE0A0000, /* USB1 */ - 0xEE0C0000, /* USB2 */ -}; -#elif defined(CONFIG_R8A7791) || defined(CONFIG_R8A7793) || \ - defined(CONFIG_R8A7794) -static u32 usb_base_address[] = { - 0xEE080000, /* USB0 (EHCI) */ - 0xEE0C0000, /* USB1 */ -}; -#else -#error rmobile EHCI USB driver not supported on this platform -#endif - -int ehci_hcd_stop(int index) -{ - int i; - u32 base; - struct ahbcom_pci_bridge *ahbcom_pci; - - base = usb_base_address[index]; - ahbcom_pci = (struct ahbcom_pci_bridge *)(base + AHBPCI_OFFSET); - writel(0, &ahbcom_pci->ahb_bus_ctr); - - /* reset ehci */ - setbits_le32(base + EHCI_USBCMD, CMD_RESET); - for (i = 100; i > 0; i--) { - if (!(readl(base + EHCI_USBCMD) & CMD_RESET)) - break; - udelay(100); - } - - if (!i) - printf("error : ehci(%d) reset failed.\n", index); - - if (index == (ARRAY_SIZE(usb_base_address) - 1)) - setbits_le32(SMSTPCR7, SMSTPCR703); - - return 0; -} - -int ehci_hcd_init(int index, enum usb_init_type init, - struct ehci_hccr **hccr, struct ehci_hcor **hcor) -{ - u32 base; - u32 phys_base; - struct rmobile_ehci_reg *rehci; - struct ahbcom_pci_bridge *ahbcom_pci; - struct ahbconf_pci_bridge *ahbconf_pci; - struct ahb_pciconf *ahb_pciconf_ohci; - struct ahb_pciconf *ahb_pciconf_ehci; - uint32_t cap_base; - - base = usb_base_address[index]; - phys_base = base; - if (index == 0) - clrbits_le32(SMSTPCR7, SMSTPCR703); - - rehci = (struct rmobile_ehci_reg *)(base + EHCI_OFFSET); - ahbcom_pci = (struct ahbcom_pci_bridge *)(base + AHBPCI_OFFSET); - ahbconf_pci = - (struct ahbconf_pci_bridge *)(base + PCI_CONF_AHBPCI_OFFSET); - ahb_pciconf_ohci = (struct ahb_pciconf *)(base + PCI_CONF_OHCI_OFFSET); - ahb_pciconf_ehci = (struct ahb_pciconf *)(base + PCI_CONF_EHCI_OFFSET); - - /* Clock & Reset & Direct Power Down */ - clrsetbits_le32(&ahbcom_pci->usbctr, - (DIRPD | PCICLK_MASK | USBH_RST), USBCTR_WIN_SIZE_1GB); - clrbits_le32(&ahbcom_pci->usbctr, PLL_RST); - - /* AHB-PCI Bridge Communication Registers */ - writel(AHB_BUS_CTR_INIT, &ahbcom_pci->ahb_bus_ctr); - writel((CFG_SYS_SDRAM_BASE & 0xf0000000) | PCIAHB_WIN_PREFETCH, - &ahbcom_pci->pciahb_win1_ctr); - writel(0xf0000000 | PCIAHB_WIN_PREFETCH, - &ahbcom_pci->pciahb_win2_ctr); - writel(phys_base | PCIWIN2_PCICMD, &ahbcom_pci->ahbpci_win2_ctr); - - setbits_le32(&ahbcom_pci->pci_arbiter_ctr, - PCIBP_MODE | PCIREQ1 | PCIREQ0); - - /* PCI Configuration Registers for AHBPCI */ - writel(PCIWIN1_PCICMD | AHB_CFG_AHBPCI, - &ahbcom_pci->ahbpci_win1_ctr); - writel(phys_base + AHBPCI_OFFSET, &ahbconf_pci->basead); - writel(CFG_SYS_SDRAM_BASE & 0xf0000000, &ahbconf_pci->win1_basead); - writel(0xf0000000, &ahbconf_pci->win2_basead); - writel(SERREN | PERREN | MASTEREN | MEMEN, - &ahbconf_pci->cmnd_sts); - - /* PCI Configuration Registers for EHCI */ - writel(PCIWIN1_PCICMD | AHB_CFG_HOST, &ahbcom_pci->ahbpci_win1_ctr); - writel(phys_base + OHCI_OFFSET, &ahb_pciconf_ohci->basead); - writel(phys_base + EHCI_OFFSET, &ahb_pciconf_ehci->basead); - writel(SERREN | PERREN | MASTEREN | MEMEN, - &ahb_pciconf_ohci->cmnd_sts); - writel(SERREN | PERREN | MASTEREN | MEMEN, - &ahb_pciconf_ehci->cmnd_sts); - - /* Enable PCI interrupt */ - setbits_le32(&ahbcom_pci->pci_int_enable, - USBH_PMEEN | USBH_INTBEN | USBH_INTAEN); - - *hccr = (struct ehci_hccr *)((uint32_t)&rehci->hciversion); - cap_base = ehci_readl(&(*hccr)->cr_capbase); - *hcor = (struct ehci_hcor *)((uint32_t)*hccr + HC_LENGTH(cap_base)); - - return 0; -} diff --git a/drivers/usb/host/ehci-vct.c b/drivers/usb/host/ehci-vct.c deleted file mode 100644 index 7167f82b481..00000000000 --- a/drivers/usb/host/ehci-vct.c +++ /dev/null @@ -1,44 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2009 Stefan Roese <sr@denx.de>, DENX Software Engineering - */ - -#include <common.h> -#include <usb.h> - -#include "ehci.h" - -int vct_ehci_hcd_init(u32 *hccr, u32 *hcor); - -/* - * Create the appropriate control structures to manage - * a new EHCI host controller. - */ -int ehci_hcd_init(int index, enum usb_init_type init, - struct ehci_hccr **hccr, struct ehci_hcor **hcor) -{ - int ret; - u32 vct_hccr; - u32 vct_hcor; - - /* - * Init VCT specific stuff - */ - ret = vct_ehci_hcd_init(&vct_hccr, &vct_hcor); - if (ret) - return ret; - - *hccr = (struct ehci_hccr *)vct_hccr; - *hcor = (struct ehci_hcor *)vct_hcor; - - return 0; -} - -/* - * Destroy the appropriate control structures corresponding - * the the EHCI host controller. - */ -int ehci_hcd_stop(int index) -{ - return 0; -} diff --git a/drivers/usb/host/sl811-hcd.c b/drivers/usb/host/sl811-hcd.c deleted file mode 100644 index 7c823f241a8..00000000000 --- a/drivers/usb/host/sl811-hcd.c +++ /dev/null @@ -1,714 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * This code is based on linux driver for sl811hs chip, source at - * drivers/usb/host/sl811.c: - * - * SL811 Host Controller Interface driver for USB. - * - * Copyright (c) 2003/06, Courage Co., Ltd. - * - * Based on: - * 1.uhci.c by Linus Torvalds, Johannes Erdfelt, Randy Dunlap, - * Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, - * Adam Richter, Gregory P. Smith; - * 2.Original SL811 driver (hc_sl811.o) by Pei Liu <pbl@cypress.com> - * 3.Rewrited as sl811.o by Yin Aihua <yinah:couragetech.com.cn> - */ - -#include <common.h> -#include <mpc8xx.h> -#include <usb.h> -#include <linux/delay.h> -#include "sl811.h" - -#include "../../../board/kup/common/kup.h" - -#ifdef __PPC__ -# define EIEIO __asm__ volatile ("eieio") -#else -# define EIEIO /* nothing */ -#endif - -#define SL811_ADR (0x50000000) -#define SL811_DAT (0x50000001) - -#ifdef SL811_DEBUG -static int debug = 9; -#endif - -static int root_hub_devnum = 0; -static struct usb_port_status rh_status = { 0 };/* root hub port status */ - -static int sl811_rh_submit_urb(struct usb_device *usb_dev, unsigned long pipe, - void *data, int buf_len, struct devrequest *cmd); - -static void sl811_write (__u8 index, __u8 data) -{ - *(volatile unsigned char *) (SL811_ADR) = index; - EIEIO; - *(volatile unsigned char *) (SL811_DAT) = data; - EIEIO; -} - -static __u8 sl811_read (__u8 index) -{ - __u8 data; - - *(volatile unsigned char *) (SL811_ADR) = index; - EIEIO; - data = *(volatile unsigned char *) (SL811_DAT); - EIEIO; - return (data); -} - -/* - * Read consecutive bytes of data from the SL811H/SL11H buffer - */ -static void inline sl811_read_buf(__u8 offset, __u8 *buf, __u8 size) -{ - *(volatile unsigned char *) (SL811_ADR) = offset; - EIEIO; - while (size--) { - *buf++ = *(volatile unsigned char *) (SL811_DAT); - EIEIO; - } -} - -/* - * Write consecutive bytes of data to the SL811H/SL11H buffer - */ -static void inline sl811_write_buf(__u8 offset, __u8 *buf, __u8 size) -{ - *(volatile unsigned char *) (SL811_ADR) = offset; - EIEIO; - while (size--) { - *(volatile unsigned char *) (SL811_DAT) = *buf++; - EIEIO; - } -} - -int usb_init_kup4x (void) -{ - volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; - volatile memctl8xx_t *memctl = &immap->im_memctl; - int i; - unsigned char tmp; - - memctl = &immap->im_memctl; - memctl->memc_or7 = 0xFFFF8726; - memctl->memc_br7 = 0x50000401; /* start at 0x50000000 */ - /* BP 14 low = USB ON */ - immap->im_cpm.cp_pbdat &= ~(BP_USB_VCC); - /* PB 14 nomal port */ - immap->im_cpm.cp_pbpar &= ~(BP_USB_VCC); - /* output */ - immap->im_cpm.cp_pbdir |= (BP_USB_VCC); - - puts ("USB: "); - - for (i = 0x10; i < 0xff; i++) { - sl811_write(i, i); - tmp = (sl811_read(i)); - if (tmp != i) { - printf ("SL811 compare error index=0x%02x read=0x%02x\n", i, tmp); - return (-1); - } - } - printf ("SL811 ready\n"); - return (0); -} - -/* - * This function resets SL811HS controller and detects the speed of - * the connecting device - * - * Return: 0 = no device attached; 1 = USB device attached - */ -static int sl811_hc_reset(void) -{ - int status ; - - sl811_write(SL811_CTRL2, SL811_CTL2_HOST | SL811_12M_HI); - sl811_write(SL811_CTRL1, SL811_CTRL1_RESET); - - mdelay(20); - - /* Disable hardware SOF generation, clear all irq status. */ - sl811_write(SL811_CTRL1, 0); - mdelay(2); - sl811_write(SL811_INTRSTS, 0xff); - status = sl811_read(SL811_INTRSTS); - - if (status & SL811_INTR_NOTPRESENT) { - /* Device is not present */ - PDEBUG(0, "Device not present\n"); - rh_status.wPortStatus &= ~(USB_PORT_STAT_CONNECTION | USB_PORT_STAT_ENABLE); - rh_status.wPortChange |= USB_PORT_STAT_C_CONNECTION; - sl811_write(SL811_INTR, SL811_INTR_INSRMV); - return 0; - } - - /* Send SOF to address 0, endpoint 0. */ - sl811_write(SL811_LEN_B, 0); - sl811_write(SL811_PIDEP_B, PIDEP(USB_PID_SOF, 0)); - sl811_write(SL811_DEV_B, 0x00); - sl811_write(SL811_SOFLOW, SL811_12M_LOW); - - if (status & SL811_INTR_SPEED_FULL) { - /* full speed device connect directly to root hub */ - PDEBUG (0, "Full speed Device attached\n"); - - sl811_write(SL811_CTRL1, SL811_CTRL1_RESET); - mdelay(20); - sl811_write(SL811_CTRL2, SL811_CTL2_HOST | SL811_12M_HI); - sl811_write(SL811_CTRL1, SL811_CTRL1_SOF); - - /* start the SOF or EOP */ - sl811_write(SL811_CTRL_B, SL811_USB_CTRL_ARM); - rh_status.wPortStatus |= USB_PORT_STAT_CONNECTION; - rh_status.wPortStatus &= ~USB_PORT_STAT_LOW_SPEED; - mdelay(2); - sl811_write(SL811_INTRSTS, 0xff); - } else { - /* slow speed device connect directly to root-hub */ - PDEBUG(0, "Low speed Device attached\n"); - - sl811_write(SL811_CTRL1, SL811_CTRL1_RESET); - mdelay(20); - sl811_write(SL811_CTRL2, SL811_CTL2_HOST | SL811_CTL2_DSWAP | SL811_12M_HI); - sl811_write(SL811_CTRL1, SL811_CTRL1_SPEED_LOW | SL811_CTRL1_SOF); - - /* start the SOF or EOP */ - sl811_write(SL811_CTRL_B, SL811_USB_CTRL_ARM); - rh_status.wPortStatus |= USB_PORT_STAT_CONNECTION | USB_PORT_STAT_LOW_SPEED; - mdelay(2); - sl811_write(SL811_INTRSTS, 0xff); - } - - rh_status.wPortChange |= USB_PORT_STAT_C_CONNECTION; - sl811_write(SL811_INTR, /*SL811_INTR_INSRMV*/SL811_INTR_DONE_A); - - return 1; -} - -int usb_lowlevel_init(int index, enum usb_init_type init, void **controller) -{ - root_hub_devnum = 0; - sl811_hc_reset(); - return 0; -} - -int usb_lowlevel_stop(int index) -{ - sl811_hc_reset(); - return 0; -} - -static int calc_needed_buswidth(int bytes, int need_preamble) -{ - return !need_preamble ? bytes * 8 + 256 : 8 * 8 * bytes + 2048; -} - -static int sl811_send_packet(struct usb_device *dev, unsigned long pipe, __u8 *buffer, int len) -{ - __u8 ctrl = SL811_USB_CTRL_ARM | SL811_USB_CTRL_ENABLE; - __u16 status = 0; - int err = 0, time_start = get_timer(0); - int need_preamble = !(rh_status.wPortStatus & USB_PORT_STAT_LOW_SPEED) && - (dev->speed == USB_SPEED_LOW); - - if (len > 239) - return -1; - - if (usb_pipeout(pipe)) - ctrl |= SL811_USB_CTRL_DIR_OUT; - if (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) - ctrl |= SL811_USB_CTRL_TOGGLE_1; - if (need_preamble) - ctrl |= SL811_USB_CTRL_PREAMBLE; - - sl811_write(SL811_INTRSTS, 0xff); - - while (err < 3) { - sl811_write(SL811_ADDR_A, 0x10); - sl811_write(SL811_LEN_A, len); - if (usb_pipeout(pipe) && len) - sl811_write_buf(0x10, buffer, len); - - if (!(rh_status.wPortStatus & USB_PORT_STAT_LOW_SPEED) && - sl811_read(SL811_SOFCNTDIV)*64 < calc_needed_buswidth(len, need_preamble)) - ctrl |= SL811_USB_CTRL_SOF; - else - ctrl &= ~SL811_USB_CTRL_SOF; - - sl811_write(SL811_CTRL_A, ctrl); - while (!(sl811_read(SL811_INTRSTS) & SL811_INTR_DONE_A)) { - if (5*CONFIG_SYS_HZ < get_timer(time_start)) { - printf("USB transmit timed out\n"); - return -USB_ST_CRC_ERR; - } - } - - sl811_write(SL811_INTRSTS, 0xff); - status = sl811_read(SL811_STS_A); - - if (status & SL811_USB_STS_ACK) { - int remainder = sl811_read(SL811_CNT_A); - if (remainder) { - PDEBUG(0, "usb transfer remainder = %d\n", remainder); - len -= remainder; - } - if (usb_pipein(pipe) && len) - sl811_read_buf(0x10, buffer, len); - return len; - } - - if ((status & SL811_USB_STS_NAK) == SL811_USB_STS_NAK) - continue; - - PDEBUG(0, "usb transfer error %#x\n", (int)status); - err++; - } - - err = 0; - - if (status & SL811_USB_STS_ERROR) - err |= USB_ST_BUF_ERR; - if (status & SL811_USB_STS_TIMEOUT) - err |= USB_ST_CRC_ERR; - if (status & SL811_USB_STS_STALL) - err |= USB_ST_STALLED; - - return -err; -} - -int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer, - int len) -{ - int dir_out = usb_pipeout(pipe); - int ep = usb_pipeendpoint(pipe); - int max = usb_maxpacket(dev, pipe); - int done = 0; - - PDEBUG(7, "dev = %ld pipe = %ld buf = %p size = %d dir_out = %d\n", - usb_pipedevice(pipe), usb_pipeendpoint(pipe), buffer, len, dir_out); - - dev->status = 0; - - sl811_write(SL811_DEV_A, usb_pipedevice(pipe)); - sl811_write(SL811_PIDEP_A, PIDEP(!dir_out ? USB_PID_IN : USB_PID_OUT, ep)); - while (done < len) { - int res = sl811_send_packet(dev, pipe, (__u8*)buffer+done, - max > len - done ? len - done : max); - if (res < 0) { - dev->status = -res; - return res; - } - - if (!dir_out && res < max) /* short packet */ - break; - - done += res; - usb_dotoggle(dev, ep, dir_out); - } - - dev->act_len = done; - - return 0; -} - -int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer, - int len,struct devrequest *setup) -{ - int done = 0; - int devnum = usb_pipedevice(pipe); - int ep = usb_pipeendpoint(pipe); - - dev->status = 0; - - if (devnum == root_hub_devnum) - return sl811_rh_submit_urb(dev, pipe, buffer, len, setup); - - PDEBUG(7, "dev = %d pipe = %ld buf = %p size = %d rt = %#x req = %#x bus = %i\n", - devnum, ep, buffer, len, (int)setup->requesttype, - (int)setup->request, sl811_read(SL811_SOFCNTDIV)*64); - - sl811_write(SL811_DEV_A, devnum); - sl811_write(SL811_PIDEP_A, PIDEP(USB_PID_SETUP, ep)); - /* setup phase */ - usb_settoggle(dev, ep, 1, 0); - if (sl811_send_packet(dev, usb_sndctrlpipe(dev, ep), - (__u8*)setup, sizeof(*setup)) == sizeof(*setup)) { - int dir_in = usb_pipein(pipe); - int max = usb_maxpacket(dev, pipe); - - /* data phase */ - sl811_write(SL811_PIDEP_A, - PIDEP(dir_in ? USB_PID_IN : USB_PID_OUT, ep)); - usb_settoggle(dev, ep, usb_pipeout(pipe), 1); - while (done < len) { - int res = sl811_send_packet(dev, pipe, (__u8*)buffer+done, - max > len - done ? len - done : max); - if (res < 0) { - PDEBUG(0, "status data failed!\n"); - dev->status = -res; - return 0; - } - done += res; - usb_dotoggle(dev, ep, usb_pipeout(pipe)); - if (dir_in && res < max) /* short packet */ - break; - } - - /* status phase */ - sl811_write(SL811_PIDEP_A, - PIDEP(!dir_in ? USB_PID_IN : USB_PID_OUT, ep)); - usb_settoggle(dev, ep, !usb_pipeout(pipe), 1); - if (sl811_send_packet(dev, - !dir_in ? usb_rcvctrlpipe(dev, ep) : - usb_sndctrlpipe(dev, ep), - 0, 0) < 0) { - PDEBUG(0, "status phase failed!\n"); - dev->status = -1; - } - } else { - PDEBUG(0, "setup phase failed!\n"); - dev->status = -1; - } - - dev->act_len = done; - - return done; -} - -int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer, - int len, int interval, bool nonblock) -{ - PDEBUG(0, "dev = %p pipe = %#lx buf = %p size = %d int = %d\n", dev, pipe, - buffer, len, interval); - return -1; -} - -/* - * SL811 Virtual Root Hub - */ - -/* Device descriptor */ -static __u8 sl811_rh_dev_des[] = -{ - 0x12, /* __u8 bLength; */ - 0x01, /* __u8 bDescriptorType; Device */ - 0x10, /* __u16 bcdUSB; v1.1 */ - 0x01, - 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */ - 0x00, /* __u8 bDeviceSubClass; */ - 0x00, /* __u8 bDeviceProtocol; */ - 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */ - 0x00, /* __u16 idVendor; */ - 0x00, - 0x00, /* __u16 idProduct; */ - 0x00, - 0x00, /* __u16 bcdDevice; */ - 0x00, - 0x00, /* __u8 iManufacturer; */ - 0x02, /* __u8 iProduct; */ - 0x01, /* __u8 iSerialNumber; */ - 0x01 /* __u8 bNumConfigurations; */ -}; - -/* Configuration descriptor */ -static __u8 sl811_rh_config_des[] = -{ - 0x09, /* __u8 bLength; */ - 0x02, /* __u8 bDescriptorType; Configuration */ - 0x19, /* __u16 wTotalLength; */ - 0x00, - 0x01, /* __u8 bNumInterfaces; */ - 0x01, /* __u8 bConfigurationValue; */ - 0x00, /* __u8 iConfiguration; */ - 0x40, /* __u8 bmAttributes; - Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, - 4..0: resvd */ - 0x00, /* __u8 MaxPower; */ - - /* interface */ - 0x09, /* __u8 if_bLength; */ - 0x04, /* __u8 if_bDescriptorType; Interface */ - 0x00, /* __u8 if_bInterfaceNumber; */ - 0x00, /* __u8 if_bAlternateSetting; */ - 0x01, /* __u8 if_bNumEndpoints; */ - 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */ - 0x00, /* __u8 if_bInterfaceSubClass; */ - 0x00, /* __u8 if_bInterfaceProtocol; */ - 0x00, /* __u8 if_iInterface; */ - - /* endpoint */ - 0x07, /* __u8 ep_bLength; */ - 0x05, /* __u8 ep_bDescriptorType; Endpoint */ - 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */ - 0x03, /* __u8 ep_bmAttributes; Interrupt */ - 0x08, /* __u16 ep_wMaxPacketSize; */ - 0x00, - 0xff /* __u8 ep_bInterval; 255 ms */ -}; - -/* root hub class descriptor*/ -static __u8 sl811_rh_hub_des[] = -{ - 0x09, /* __u8 bLength; */ - 0x29, /* __u8 bDescriptorType; Hub-descriptor */ - 0x01, /* __u8 bNbrPorts; */ - 0x00, /* __u16 wHubCharacteristics; */ - 0x00, - 0x50, /* __u8 bPwrOn2pwrGood; 2ms */ - 0x00, /* __u8 bHubContrCurrent; 0 mA */ - 0xfc, /* __u8 DeviceRemovable; *** 7 Ports max *** */ - 0xff /* __u8 PortPwrCtrlMask; *** 7 ports max *** */ -}; - -/* - * helper routine for returning string descriptors in UTF-16LE - * input can actually be ISO-8859-1; ASCII is its 7-bit subset - */ -static int ascii2utf (char *s, u8 *utf, int utfmax) -{ - int retval; - - for (retval = 0; *s && utfmax > 1; utfmax -= 2, retval += 2) { - *utf++ = *s++; - *utf++ = 0; - } - return retval; -} - -/* - * root_hub_string is used by each host controller's root hub code, - * so that they're identified consistently throughout the system. - */ -static int usb_root_hub_string (int id, int serial, char *type, __u8 *data, int len) -{ - char buf [30]; - - /* assert (len > (2 * (sizeof (buf) + 1))); - assert (strlen (type) <= 8);*/ - - /* language ids */ - if (id == 0) { - *data++ = 4; *data++ = 3; /* 4 bytes data */ - *data++ = 0; *data++ = 0; /* some language id */ - return 4; - - /* serial number */ - } else if (id == 1) { - sprintf (buf, "%#x", serial); - - /* product description */ - } else if (id == 2) { - sprintf (buf, "USB %s Root Hub", type); - - /* id 3 == vendor description */ - - /* unsupported IDs --> "stall" */ - } else - return 0; - - ascii2utf (buf, data + 2, len - 2); - data [0] = 2 + strlen(buf) * 2; - data [1] = 3; - return data [0]; -} - -/* helper macro */ -#define OK(x) len = (x); break - -/* - * This function handles all USB request to the the virtual root hub - */ -static int sl811_rh_submit_urb(struct usb_device *usb_dev, unsigned long pipe, - void *data, int buf_len, struct devrequest *cmd) -{ - __u8 data_buf[16]; - __u8 *bufp = data_buf; - int len = 0; - int status = 0; - __u16 bmRType_bReq; - __u16 wValue = le16_to_cpu (cmd->value); - __u16 wLength = le16_to_cpu (cmd->length); -#ifdef SL811_DEBUG - __u16 wIndex = le16_to_cpu (cmd->index); -#endif - - if (usb_pipeint(pipe)) { - PDEBUG(0, "interrupt transfer unimplemented!\n"); - return 0; - } - - bmRType_bReq = cmd->requesttype | (cmd->request << 8); - - PDEBUG(5, "submit rh urb, req = %d(%x) val = %#x index = %#x len=%d\n", - bmRType_bReq, bmRType_bReq, wValue, wIndex, wLength); - - /* Request Destination: - without flags: Device, - USB_RECIP_INTERFACE: interface, - USB_RECIP_ENDPOINT: endpoint, - USB_TYPE_CLASS means HUB here, - USB_RECIP_OTHER | USB_TYPE_CLASS almost ever means HUB_PORT here - */ - switch (bmRType_bReq) { - case RH_GET_STATUS: - *(__u16 *)bufp = cpu_to_le16(1); - OK(2); - - case RH_GET_STATUS | USB_RECIP_INTERFACE: - *(__u16 *)bufp = cpu_to_le16(0); - OK(2); - - case RH_GET_STATUS | USB_RECIP_ENDPOINT: - *(__u16 *)bufp = cpu_to_le16(0); - OK(2); - - case RH_GET_STATUS | USB_TYPE_CLASS: - *(__u32 *)bufp = cpu_to_le32(0); - OK(4); - - case RH_GET_STATUS | USB_RECIP_OTHER | USB_TYPE_CLASS: - *(__u32 *)bufp = cpu_to_le32(rh_status.wPortChange<<16 | rh_status.wPortStatus); - OK(4); - - case RH_CLEAR_FEATURE | USB_RECIP_ENDPOINT: - switch (wValue) { - case 1: - OK(0); - } - break; - - case RH_CLEAR_FEATURE | USB_TYPE_CLASS: - switch (wValue) { - case C_HUB_LOCAL_POWER: - OK(0); - - case C_HUB_OVER_CURRENT: - OK(0); - } - break; - - case RH_CLEAR_FEATURE | USB_RECIP_OTHER | USB_TYPE_CLASS: - switch (wValue) { - case USB_PORT_FEAT_ENABLE: - rh_status.wPortStatus &= ~USB_PORT_STAT_ENABLE; - OK(0); - - case USB_PORT_FEAT_SUSPEND: - rh_status.wPortStatus &= ~USB_PORT_STAT_SUSPEND; - OK(0); - - case USB_PORT_FEAT_POWER: - rh_status.wPortStatus &= ~USB_PORT_STAT_POWER; - OK(0); - - case USB_PORT_FEAT_C_CONNECTION: - rh_status.wPortChange &= ~USB_PORT_STAT_C_CONNECTION; - OK(0); - - case USB_PORT_FEAT_C_ENABLE: - rh_status.wPortChange &= ~USB_PORT_STAT_C_ENABLE; - OK(0); - - case USB_PORT_FEAT_C_SUSPEND: - rh_status.wPortChange &= ~USB_PORT_STAT_C_SUSPEND; - OK(0); - - case USB_PORT_FEAT_C_OVER_CURRENT: - rh_status.wPortChange &= ~USB_PORT_STAT_C_OVERCURRENT; - OK(0); - - case USB_PORT_FEAT_C_RESET: - rh_status.wPortChange &= ~USB_PORT_STAT_C_RESET; - OK(0); - } - break; - - case RH_SET_FEATURE | USB_RECIP_OTHER | USB_TYPE_CLASS: - switch (wValue) { - case USB_PORT_FEAT_SUSPEND: - rh_status.wPortStatus |= USB_PORT_STAT_SUSPEND; - OK(0); - - case USB_PORT_FEAT_RESET: - rh_status.wPortStatus |= USB_PORT_STAT_RESET; - rh_status.wPortChange = 0; - rh_status.wPortChange |= USB_PORT_STAT_C_RESET; - rh_status.wPortStatus &= ~USB_PORT_STAT_RESET; - rh_status.wPortStatus |= USB_PORT_STAT_ENABLE; - OK(0); - - case USB_PORT_FEAT_POWER: - rh_status.wPortStatus |= USB_PORT_STAT_POWER; - OK(0); - - case USB_PORT_FEAT_ENABLE: - rh_status.wPortStatus |= USB_PORT_STAT_ENABLE; - OK(0); - } - break; - - case RH_SET_ADDRESS: - root_hub_devnum = wValue; - OK(0); - - case RH_GET_DESCRIPTOR: - switch ((wValue & 0xff00) >> 8) { - case USB_DT_DEVICE: - len = sizeof(sl811_rh_dev_des); - bufp = sl811_rh_dev_des; - OK(len); - - case USB_DT_CONFIG: - len = sizeof(sl811_rh_config_des); - bufp = sl811_rh_config_des; - OK(len); - - case USB_DT_STRING: - len = usb_root_hub_string(wValue & 0xff, (int)(long)0, "SL811HS", data, wLength); - if (len > 0) { - bufp = data; - OK(len); - } - - default: - status = -32; - } - break; - - case RH_GET_DESCRIPTOR | USB_TYPE_CLASS: - len = sizeof(sl811_rh_hub_des); - bufp = sl811_rh_hub_des; - OK(len); - - case RH_GET_CONFIGURATION: - bufp[0] = 0x01; - OK(1); - - case RH_SET_CONFIGURATION: - OK(0); - - default: - PDEBUG(1, "unsupported root hub command\n"); - status = -32; - } - - len = min(len, buf_len); - if (data != bufp) - memcpy(data, bufp, len); - - PDEBUG(5, "len = %d, status = %d\n", len, status); - - usb_dev->status = status; - usb_dev->act_len = len; - - return status == 0 ? len : status; -} diff --git a/drivers/usb/host/sl811.h b/drivers/usb/host/sl811.h deleted file mode 100644 index c1f9f013bd1..00000000000 --- a/drivers/usb/host/sl811.h +++ /dev/null @@ -1,104 +0,0 @@ -#ifndef __UBOOT_SL811_H -#define __UBOOT_SL811_H - -#undef SL811_DEBUG - -#ifdef SL811_DEBUG - #define PDEBUG(level, fmt, args...) \ - if (debug >= (level)) printf("[%s:%d] " fmt, \ - __PRETTY_FUNCTION__, __LINE__ , ## args) -#else - #define PDEBUG(level, fmt, args...) do {} while(0) -#endif - -/* Sl811 host control register */ -#define SL811_CTRL_A 0x00 -#define SL811_ADDR_A 0x01 -#define SL811_LEN_A 0x02 -#define SL811_STS_A 0x03 /* read */ -#define SL811_PIDEP_A 0x03 /* write */ -#define SL811_CNT_A 0x04 /* read */ -#define SL811_DEV_A 0x04 /* write */ -#define SL811_CTRL1 0x05 -#define SL811_INTR 0x06 -#define SL811_CTRL_B 0x08 -#define SL811_ADDR_B 0x09 -#define SL811_LEN_B 0x0A -#define SL811_STS_B 0x0B /* read */ -#define SL811_PIDEP_B 0x0B /* write */ -#define SL811_CNT_B 0x0C /* read */ -#define SL811_DEV_B 0x0C /* write */ -#define SL811_INTRSTS 0x0D /* write clears bitwise */ -#define SL811_HWREV 0x0E /* read */ -#define SL811_SOFLOW 0x0E /* write */ -#define SL811_SOFCNTDIV 0x0F /* read */ -#define SL811_CTRL2 0x0F /* write */ - -/* USB control register bits (addr 0x00 and addr 0x08) */ -#define SL811_USB_CTRL_ARM 0x01 -#define SL811_USB_CTRL_ENABLE 0x02 -#define SL811_USB_CTRL_DIR_OUT 0x04 -#define SL811_USB_CTRL_ISO 0x10 -#define SL811_USB_CTRL_SOF 0x20 -#define SL811_USB_CTRL_TOGGLE_1 0x40 -#define SL811_USB_CTRL_PREAMBLE 0x80 - -/* USB status register bits (addr 0x03 and addr 0x0B) */ -#define SL811_USB_STS_ACK 0x01 -#define SL811_USB_STS_ERROR 0x02 -#define SL811_USB_STS_TIMEOUT 0x04 -#define SL811_USB_STS_TOGGLE_1 0x08 -#define SL811_USB_STS_SETUP 0x10 -#define SL811_USB_STS_OVERFLOW 0x20 -#define SL811_USB_STS_NAK 0x40 -#define SL811_USB_STS_STALL 0x80 - -/* Control register 1 bits (addr 0x05) */ -#define SL811_CTRL1_SOF 0x01 -#define SL811_CTRL1_RESET 0x08 -#define SL811_CTRL1_JKSTATE 0x10 -#define SL811_CTRL1_SPEED_LOW 0x20 -#define SL811_CTRL1_SUSPEND 0x40 - -/* Interrut enable (addr 0x06) and interrupt status register bits (addr 0x0D) */ -#define SL811_INTR_DONE_A 0x01 -#define SL811_INTR_DONE_B 0x02 -#define SL811_INTR_SOF 0x10 -#define SL811_INTR_INSRMV 0x20 -#define SL811_INTR_DETECT 0x40 -#define SL811_INTR_NOTPRESENT 0x40 -#define SL811_INTR_SPEED_FULL 0x80 /* only in status reg */ - -/* HW rev and SOF lo register bits (addr 0x0E) */ -#define SL811_HWR_HWREV 0xF0 - -/* SOF counter and control reg 2 (addr 0x0F) */ -#define SL811_CTL2_SOFHI 0x3F -#define SL811_CTL2_DSWAP 0x40 -#define SL811_CTL2_HOST 0x80 - -/* Set up for 1-ms SOF time. */ -#define SL811_12M_LOW 0xE0 -#define SL811_12M_HI 0x2E - -#define SL811_DATA_START 0x10 -#define SL811_DATA_LIMIT 240 - -/* Requests: bRequest << 8 | bmRequestType */ -#define RH_GET_STATUS 0x0080 -#define RH_CLEAR_FEATURE 0x0100 -#define RH_SET_FEATURE 0x0300 -#define RH_SET_ADDRESS 0x0500 -#define RH_GET_DESCRIPTOR 0x0680 -#define RH_SET_DESCRIPTOR 0x0700 -#define RH_GET_CONFIGURATION 0x0880 -#define RH_SET_CONFIGURATION 0x0900 -#define RH_GET_STATE 0x0280 -#define RH_GET_INTERFACE 0x0A80 -#define RH_SET_INTERFACE 0x0B00 -#define RH_SYNC_FRAME 0x0C80 - - -#define PIDEP(pid, ep) (((pid) & 0x0f) << 4 | (ep)) - -#endif /* __UBOOT_SL811_H */ diff --git a/drivers/usb/host/utmi-armada100.c b/drivers/usb/host/utmi-armada100.c deleted file mode 100644 index 5d66e5881f3..00000000000 --- a/drivers/usb/host/utmi-armada100.c +++ /dev/null @@ -1,80 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2012 - * eInfochips Ltd. <www.einfochips.com> - * Written-by: Ajay Bhargav <contact@8051projects.net> - * - * (C) Copyright 2009 - * Marvell Semiconductor <www.marvell.com> - */ - -#include <common.h> -#include <asm/io.h> -#include <usb.h> -#include <asm/arch/cpu.h> -#include <asm/arch/armada100.h> -#include <asm/arch/utmi-armada100.h> -#include <linux/delay.h> - -static int utmi_phy_init(void) -{ - struct armd1usb_phy_reg *phy_regs = - (struct armd1usb_phy_reg *)UTMI_PHY_BASE; - int timeout; - - setbits_le32(&phy_regs->utmi_ctrl, INPKT_DELAY_SOF | PLL_PWR_UP); - udelay(1000); - setbits_le32(&phy_regs->utmi_ctrl, PHY_PWR_UP); - - clrbits_le32(&phy_regs->utmi_pll, PLL_FBDIV_MASK | PLL_REFDIV_MASK); - setbits_le32(&phy_regs->utmi_pll, N_DIVIDER << PLL_FBDIV | M_DIVIDER); - - setbits_le32(&phy_regs->utmi_tx, PHSEL_VAL << CK60_PHSEL); - - /* Calibrate pll */ - timeout = 10000; - while (--timeout && ((readl(&phy_regs->utmi_pll) & PLL_READY) == 0)) - ; - if (!timeout) - return -1; - - udelay(200); - setbits_le32(&phy_regs->utmi_pll, VCOCAL_START); - udelay(400); - clrbits_le32(&phy_regs->utmi_pll, VCOCAL_START); - - udelay(200); - setbits_le32(&phy_regs->utmi_tx, RCAL_START); - udelay(400); - clrbits_le32(&phy_regs->utmi_tx, RCAL_START); - - timeout = 10000; - while (--timeout && ((readl(&phy_regs->utmi_pll) & PLL_READY) == 0)) - ; - if (!timeout) - return -1; - - return 0; -} - -/* - * Initialize USB host controller's UTMI Physical interface - */ -int utmi_init(void) -{ - struct armd1mpmu_registers *mpmu_regs = - (struct armd1mpmu_registers *)ARMD1_MPMU_BASE; - - struct armd1apmu_registers *apmu_regs = - (struct armd1apmu_registers *)ARMD1_APMU_BASE; - - /* Turn on 26Mhz ref clock for UTMI PLL */ - setbits_le32(&mpmu_regs->acgr, APB2_26M_EN | AP_26M); - - /* USB Clock reset */ - writel(USB_SPH_AXICLK_EN, &apmu_regs->usbcrc); - writel(USB_SPH_AXICLK_EN | USB_SPH_AXI_RST, &apmu_regs->usbcrc); - - /* Initialize UTMI transceiver */ - return utmi_phy_init(); -} diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 75c789a9570..cdb7d9a54d4 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -32,12 +32,10 @@ obj-y += ti/ obj-$(CONFIG_ATMEL_HLCD) += atmel_hlcdfb.o obj-$(CONFIG_ATMEL_LCD) += atmel_lcdfb.o obj-$(CONFIG_IHS_VIDEO_OUT) += ihs_video_out.o -obj-$(CONFIG_LG4573) += lg4573.o obj-$(CONFIG_LOGICORE_DP_TX) += logicore_dp_tx.o obj-$(CONFIG_NXP_TDA19988) += tda19988.o obj-$(CONFIG_OSD) += video_osd-uclass.o obj-$(CONFIG_SANDBOX_OSD) += sandbox_osd.o -obj-$(CONFIG_SCF0403_LCD) += scf0403_lcd.o obj-$(CONFIG_VIDEO_ARM_MALIDP) += mali_dp.o obj-$(CONFIG_VIDEO_BCM2835) += bcm2835.o obj-$(CONFIG_VIDEO_BROADWELL_IGD) += broadwell_igd.o diff --git a/drivers/video/exynos/Makefile b/drivers/video/exynos/Makefile index 0f58954e49c..45067f562cb 100644 --- a/drivers/video/exynos/Makefile +++ b/drivers/video/exynos/Makefile @@ -7,4 +7,3 @@ obj-$(CONFIG_EXYNOS_DP) += exynos_dp.o exynos_dp_lowlevel.o obj-$(CONFIG_EXYNOS_FB) += exynos_fb.o obj-$(CONFIG_EXYNOS_MIPI_DSIM) += exynos_mipi_dsi.o exynos_mipi_dsi_common.o \ exynos_mipi_dsi_lowlevel.o -obj-$(CONFIG_EXYNOS_PWM_BL) += exynos_pwm_bl.o diff --git a/drivers/video/lg4573.c b/drivers/video/lg4573.c deleted file mode 100644 index dd87fc461b9..00000000000 --- a/drivers/video/lg4573.c +++ /dev/null @@ -1,331 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * LCD: LG4573, TFT 4.3", 480x800, RGB24 - * LCD initialization via SPI - * - */ -#include <common.h> -#include <backlight.h> -#include <command.h> -#include <display.h> -#include <dm.h> -#include <log.h> -#include <dm/read.h> -#include <dm/uclass-internal.h> -#include <errno.h> -#include <spi.h> -#include <asm/gpio.h> -#include <linux/delay.h> - -#define PWR_ON_DELAY_MSECS 120 - -static int lb043wv_spi_write_u16(struct spi_slave *slave, u16 val) -{ - unsigned short buf16 = htons(val); - int ret = 0; - - ret = spi_xfer(slave, 16, &buf16, NULL, - SPI_XFER_BEGIN | SPI_XFER_END); - if (ret) - debug("%s: Failed to send: %d\n", __func__, ret); - - return ret; -} - -static void lb043wv_spi_write_u16_array(struct spi_slave *slave, u16 *buff, - int size) -{ - int i; - - for (i = 0; i < size; i++) - lb043wv_spi_write_u16(slave, buff[i]); -} - -static void lb043wv_display_mode_settings(struct spi_slave *slave) -{ - static u16 display_mode_settings[] = { - 0x703A, - 0x7270, - 0x70B1, - 0x7208, - 0x723B, - 0x720F, - 0x70B2, - 0x7200, - 0x72C8, - 0x70B3, - 0x7200, - 0x70B4, - 0x7200, - 0x70B5, - 0x7242, - 0x7210, - 0x7210, - 0x7200, - 0x7220, - 0x70B6, - 0x720B, - 0x720F, - 0x723C, - 0x7213, - 0x7213, - 0x72E8, - 0x70B7, - 0x7246, - 0x7206, - 0x720C, - 0x7200, - 0x7200, - }; - - debug("transfer display mode settings\n"); - lb043wv_spi_write_u16_array(slave, display_mode_settings, - ARRAY_SIZE(display_mode_settings)); -} - -static void lb043wv_power_settings(struct spi_slave *slave) -{ - static u16 power_settings[] = { - 0x70C0, - 0x7201, - 0x7211, - 0x70C3, - 0x7207, - 0x7203, - 0x7204, - 0x7204, - 0x7204, - 0x70C4, - 0x7212, - 0x7224, - 0x7218, - 0x7218, - 0x7202, - 0x7249, - 0x70C5, - 0x726F, - 0x70C6, - 0x7241, - 0x7263, - }; - - debug("transfer power settings\n"); - lb043wv_spi_write_u16_array(slave, power_settings, - ARRAY_SIZE(power_settings)); -} - -static void lb043wv_gamma_settings(struct spi_slave *slave) -{ - static u16 gamma_settings[] = { - 0x70D0, - 0x7203, - 0x7207, - 0x7273, - 0x7235, - 0x7200, - 0x7201, - 0x7220, - 0x7200, - 0x7203, - 0x70D1, - 0x7203, - 0x7207, - 0x7273, - 0x7235, - 0x7200, - 0x7201, - 0x7220, - 0x7200, - 0x7203, - 0x70D2, - 0x7203, - 0x7207, - 0x7273, - 0x7235, - 0x7200, - 0x7201, - 0x7220, - 0x7200, - 0x7203, - 0x70D3, - 0x7203, - 0x7207, - 0x7273, - 0x7235, - 0x7200, - 0x7201, - 0x7220, - 0x7200, - 0x7203, - 0x70D4, - 0x7203, - 0x7207, - 0x7273, - 0x7235, - 0x7200, - 0x7201, - 0x7220, - 0x7200, - 0x7203, - 0x70D5, - 0x7203, - 0x7207, - 0x7273, - 0x7235, - 0x7200, - 0x7201, - 0x7220, - 0x7200, - 0x7203, - }; - - debug("transfer gamma settings\n"); - lb043wv_spi_write_u16_array(slave, gamma_settings, - ARRAY_SIZE(gamma_settings)); -} - -static void lb043wv_display_on(struct spi_slave *slave) -{ - static u16 sleep_out = 0x7011; - static u16 display_on = 0x7029; - - lb043wv_spi_write_u16(slave, sleep_out); - mdelay(PWR_ON_DELAY_MSECS); - lb043wv_spi_write_u16(slave, display_on); -} - -static int lg4573_spi_startup(struct spi_slave *slave) -{ - int ret; - - ret = spi_claim_bus(slave); - if (ret) - return ret; - - lb043wv_display_mode_settings(slave); - lb043wv_power_settings(slave); - lb043wv_gamma_settings(slave); - lb043wv_display_on(slave); - - spi_release_bus(slave); - return 0; -} - -static int do_lgset(struct cmd_tbl *cmdtp, int flag, int argc, - char *const argv[]) -{ - struct spi_slave *slave; - struct udevice *dev; - int ret; - - ret = uclass_get_device_by_driver(UCLASS_DISPLAY, - DM_DRIVER_GET(lg4573_lcd), &dev); - if (ret) { - printf("%s: Could not get lg4573 device\n", __func__); - return ret; - } - slave = dev_get_parent_priv(dev); - if (!slave) { - printf("%s: No slave data\n", __func__); - return -ENODEV; - } - lg4573_spi_startup(slave); - - return 0; -} - -U_BOOT_CMD( - lgset, 2, 1, do_lgset, - "set lgdisplay", - "" -); - -static int lg4573_bind(struct udevice *dev) -{ - return 0; -} - -static int lg4573_probe(struct udevice *dev) -{ - return 0; -} - -static const struct udevice_id lg4573_ids[] = { - { .compatible = "lg,lg4573" }, - { } -}; - -struct lg4573_lcd_priv { - struct display_timing timing; - struct udevice *backlight; - struct gpio_desc enable; - int panel_bpp; - u32 power_on_delay; -}; - -static int lg4573_lcd_read_timing(struct udevice *dev, - struct display_timing *timing) -{ - struct lg4573_lcd_priv *priv = dev_get_priv(dev); - - memcpy(timing, &priv->timing, sizeof(struct display_timing)); - - return 0; -} - -static int lg4573_lcd_enable(struct udevice *dev, int bpp, - const struct display_timing *edid) -{ - struct spi_slave *slave = dev_get_parent_priv(dev); - struct lg4573_lcd_priv *priv = dev_get_priv(dev); - int ret = 0; - - dm_gpio_set_value(&priv->enable, 1); - ret = backlight_enable(priv->backlight); - - mdelay(priv->power_on_delay); - lg4573_spi_startup(slave); - - return ret; -}; - -static const struct dm_display_ops lg4573_lcd_ops = { - .read_timing = lg4573_lcd_read_timing, - .enable = lg4573_lcd_enable, -}; - -static int lg4573_of_to_plat(struct udevice *dev) -{ - struct lg4573_lcd_priv *priv = dev_get_priv(dev); - int ret; - - ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, dev, - "backlight", &priv->backlight); - if (ret) { - debug("%s: Cannot get backlight: ret=%d\n", __func__, ret); - return log_ret(ret); - } - ret = gpio_request_by_name(dev, "enable-gpios", 0, &priv->enable, - GPIOD_IS_OUT); - if (ret) { - debug("%s: Warning: cannot get enable GPIO: ret=%d\n", - __func__, ret); - if (ret != -ENOENT) - return log_ret(ret); - } - - priv->power_on_delay = dev_read_u32_default(dev, "power-on-delay", 10); - - return 0; -} - -U_BOOT_DRIVER(lg4573_lcd) = { - .name = "lg4573", - .id = UCLASS_DISPLAY, - .ops = &lg4573_lcd_ops, - .of_to_plat = lg4573_of_to_plat, - .of_match = lg4573_ids, - .bind = lg4573_bind, - .probe = lg4573_probe, - .priv_auto = sizeof(struct lg4573_lcd_priv), -}; diff --git a/drivers/video/scf0403_lcd.c b/drivers/video/scf0403_lcd.c deleted file mode 100644 index 54f0f88b4c9..00000000000 --- a/drivers/video/scf0403_lcd.c +++ /dev/null @@ -1,297 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * scf0403.c -- support for DataImage SCF0403 LCD - * - * Copyright (c) 2013 Adapted from Linux driver: - * Copyright (c) 2012 Anders Electronics plc. All Rights Reserved. - * Copyright (c) 2012 CompuLab, Ltd - * Dmitry Lifshitz <lifshitz@compulab.co.il> - * Ilya Ledvich <ilya@compulab.co.il> - * Inspired by Alberto Panizzo <maramaopercheseimorto@gmail.com> & - * Marek Vasut work in l4f00242t03.c - * - * U-Boot port: Nikita Kiryanov <nikita@compulab.co.il> - */ - -#include <common.h> -#include <malloc.h> -#include <asm/gpio.h> -#include <spi.h> -#include <linux/delay.h> - -struct scf0403_cmd { - u16 cmd; - u16 *params; - int count; -}; - -struct scf0403_initseq_entry { - struct scf0403_cmd cmd; - int delay_ms; -}; - -struct scf0403_priv { - struct spi_slave *spi; - unsigned int reset_gpio; - u32 rddid; - struct scf0403_initseq_entry *init_seq; - int seq_size; -}; - -struct scf0403_priv priv; - -#define SCF0403852GGU04_ID 0x000080 - -/* SCF0403526GGU20 model commands parameters */ -static u16 extcmd_params_sn20[] = {0xff, 0x98, 0x06}; -static u16 spiinttype_params_sn20[] = {0x60}; -static u16 bc_params_sn20[] = { - 0x01, 0x10, 0x61, 0x74, 0x01, 0x01, 0x1B, - 0x12, 0x71, 0x00, 0x00, 0x00, 0x01, 0x01, - 0x05, 0x00, 0xFF, 0xF2, 0x01, 0x00, 0x40, -}; -static u16 bd_params_sn20[] = {0x01, 0x23, 0x45, 0x67, 0x01, 0x23, 0x45, 0x67}; -static u16 be_params_sn20[] = { - 0x01, 0x22, 0x22, 0xBA, 0xDC, 0x26, 0x28, 0x22, 0x22, -}; -static u16 vcom_params_sn20[] = {0x74}; -static u16 vmesur_params_sn20[] = {0x7F, 0x0F, 0x00}; -static u16 powerctl_params_sn20[] = {0x03, 0x0b, 0x00}; -static u16 lvglvolt_params_sn20[] = {0x08}; -static u16 engsetting_params_sn20[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x20}; -static u16 dispfunc_params_sn20[] = {0xa0}; -static u16 dvddvolt_params_sn20[] = {0x74}; -static u16 dispinv_params_sn20[] = {0x00, 0x00, 0x00}; -static u16 panelres_params_sn20[] = {0x82}; -static u16 framerate_params_sn20[] = {0x00, 0x13, 0x13}; -static u16 timing_params_sn20[] = {0x80, 0x05, 0x40, 0x28}; -static u16 powerctl2_params_sn20[] = {0x17, 0x75, 0x79, 0x20}; -static u16 memaccess_params_sn20[] = {0x00}; -static u16 pixfmt_params_sn20[] = {0x66}; -static u16 pgamma_params_sn20[] = { - 0x00, 0x03, 0x0b, 0x0c, 0x0e, 0x08, 0xc5, 0x04, - 0x08, 0x0c, 0x13, 0x11, 0x11, 0x14, 0x0c, 0x10, -}; -static u16 ngamma_params_sn20[] = { - 0x00, 0x0d, 0x11, 0x0c, 0x0c, 0x04, 0x76, 0x03, - 0x08, 0x0b, 0x16, 0x10, 0x0d, 0x16, 0x0a, 0x00, -}; -static u16 tearing_params_sn20[] = {0x00}; - -/* SCF0403852GGU04 model commands parameters */ -static u16 memaccess_params_sn04[] = {0x08}; -static u16 pixfmt_params_sn04[] = {0x66}; -static u16 modectl_params_sn04[] = {0x01}; -static u16 dispfunc_params_sn04[] = {0x22, 0xe2, 0xFF, 0x04}; -static u16 vcom_params_sn04[] = {0x00, 0x6A}; -static u16 pgamma_params_sn04[] = { - 0x00, 0x07, 0x0d, 0x10, 0x13, 0x19, 0x0f, 0x0c, - 0x05, 0x08, 0x06, 0x13, 0x0f, 0x30, 0x20, 0x1f, -}; -static u16 ngamma_params_sn04[] = { - 0x1F, 0x20, 0x30, 0x0F, 0x13, 0x06, 0x08, 0x05, - 0x0C, 0x0F, 0x19, 0x13, 0x10, 0x0D, 0x07, 0x00, -}; -static u16 dispinv_params_sn04[] = {0x02}; - -/* Common commands */ -static struct scf0403_cmd scf0403_cmd_slpout = {0x11, NULL, 0}; -static struct scf0403_cmd scf0403_cmd_dison = {0x29, NULL, 0}; - -/* SCF0403852GGU04 init sequence */ -static struct scf0403_initseq_entry scf0403_initseq_sn04[] = { - {{0x36, memaccess_params_sn04, ARRAY_SIZE(memaccess_params_sn04)}, 0}, - {{0x3A, pixfmt_params_sn04, ARRAY_SIZE(pixfmt_params_sn04)}, 0}, - {{0xB6, dispfunc_params_sn04, ARRAY_SIZE(dispfunc_params_sn04)}, 0}, - {{0xC5, vcom_params_sn04, ARRAY_SIZE(vcom_params_sn04)}, 0}, - {{0xE0, pgamma_params_sn04, ARRAY_SIZE(pgamma_params_sn04)}, 0}, - {{0xE1, ngamma_params_sn04, ARRAY_SIZE(ngamma_params_sn04)}, 20}, - {{0xB0, modectl_params_sn04, ARRAY_SIZE(modectl_params_sn04)}, 0}, - {{0xB4, dispinv_params_sn04, ARRAY_SIZE(dispinv_params_sn04)}, 100}, -}; - -/* SCF0403526GGU20 init sequence */ -static struct scf0403_initseq_entry scf0403_initseq_sn20[] = { - {{0xff, extcmd_params_sn20, ARRAY_SIZE(extcmd_params_sn20)}, 0}, - {{0xba, spiinttype_params_sn20, ARRAY_SIZE(spiinttype_params_sn20)}, 0}, - {{0xbc, bc_params_sn20, ARRAY_SIZE(bc_params_sn20)}, 0}, - {{0xbd, bd_params_sn20, ARRAY_SIZE(bd_params_sn20)}, 0}, - {{0xbe, be_params_sn20, ARRAY_SIZE(be_params_sn20)}, 0}, - {{0xc7, vcom_params_sn20, ARRAY_SIZE(vcom_params_sn20)}, 0}, - {{0xed, vmesur_params_sn20, ARRAY_SIZE(vmesur_params_sn20)}, 0}, - {{0xc0, powerctl_params_sn20, ARRAY_SIZE(powerctl_params_sn20)}, 0}, - {{0xfc, lvglvolt_params_sn20, ARRAY_SIZE(lvglvolt_params_sn20)}, 0}, - {{0xb6, dispfunc_params_sn20, ARRAY_SIZE(dispfunc_params_sn20)}, 0}, - {{0xdf, engsetting_params_sn20, ARRAY_SIZE(engsetting_params_sn20)}, 0}, - {{0xf3, dvddvolt_params_sn20, ARRAY_SIZE(dvddvolt_params_sn20)}, 0}, - {{0xb4, dispinv_params_sn20, ARRAY_SIZE(dispinv_params_sn20)}, 0}, - {{0xf7, panelres_params_sn20, ARRAY_SIZE(panelres_params_sn20)}, 0}, - {{0xb1, framerate_params_sn20, ARRAY_SIZE(framerate_params_sn20)}, 0}, - {{0xf2, timing_params_sn20, ARRAY_SIZE(timing_params_sn20)}, 0}, - {{0xc1, powerctl2_params_sn20, ARRAY_SIZE(powerctl2_params_sn20)}, 0}, - {{0x36, memaccess_params_sn20, ARRAY_SIZE(memaccess_params_sn20)}, 0}, - {{0x3a, pixfmt_params_sn20, ARRAY_SIZE(pixfmt_params_sn20)}, 0}, - {{0xe0, pgamma_params_sn20, ARRAY_SIZE(pgamma_params_sn20)}, 0}, - {{0xe1, ngamma_params_sn20, ARRAY_SIZE(ngamma_params_sn20)}, 0}, - {{0x35, tearing_params_sn20, ARRAY_SIZE(tearing_params_sn20)}, 0}, -}; - -static void scf0403_gpio_reset(unsigned int gpio) -{ - if (!gpio_is_valid(gpio)) - return; - - gpio_set_value(gpio, 1); - mdelay(100); - gpio_set_value(gpio, 0); - mdelay(40); - gpio_set_value(gpio, 1); - mdelay(100); -} - -static int scf0403_spi_read_rddid(struct spi_slave *spi, u32 *rddid) -{ - int error = 0; - u8 ids_buf = 0x00; - u16 dummy_buf = 0x00; - u16 cmd = 0x04; - - error = spi_set_wordlen(spi, 9); - if (error) - return error; - - /* Here 9 bits required to transmit a command */ - error = spi_xfer(spi, 9, &cmd, NULL, SPI_XFER_ONCE); - if (error) - return error; - - /* - * Here 8 + 1 bits required to arrange extra clock cycle - * before the first data bit. - * According to the datasheet - first parameter is the dummy data. - */ - error = spi_xfer(spi, 9, NULL, &dummy_buf, SPI_XFER_ONCE); - if (error) - return error; - - error = spi_set_wordlen(spi, 8); - if (error) - return error; - - /* Read rest of the data */ - error = spi_xfer(spi, 8, NULL, &ids_buf, SPI_XFER_ONCE); - if (error) - return error; - - *rddid = ids_buf; - - return 0; -} - -static int scf0403_spi_transfer(struct spi_slave *spi, struct scf0403_cmd *cmd) -{ - int i, error; - u32 command = cmd->cmd; - u32 msg; - - error = spi_set_wordlen(spi, 9); - if (error) - return error; - - error = spi_xfer(spi, 9, &command, NULL, SPI_XFER_ONCE); - if (error) - return error; - - for (i = 0; i < cmd->count; i++) { - msg = (cmd->params[i] | 0x100); - error = spi_xfer(spi, 9, &msg, NULL, SPI_XFER_ONCE); - if (error) - return error; - } - - return 0; -} - -static void scf0403_lcd_init(struct scf0403_priv *priv) -{ - int i; - - /* reset LCD */ - scf0403_gpio_reset(priv->reset_gpio); - - for (i = 0; i < priv->seq_size; i++) { - if (scf0403_spi_transfer(priv->spi, &priv->init_seq[i].cmd) < 0) - puts("SPI transfer failed\n"); - - mdelay(priv->init_seq[i].delay_ms); - } -} - -static int scf0403_request_reset_gpio(unsigned gpio) -{ - int err = gpio_request(gpio, "lcd reset"); - - if (err) - return err; - - err = gpio_direction_output(gpio, 0); - if (err) - gpio_free(gpio); - - return err; -} - -int scf0403_init(int reset_gpio) -{ - int error; - - if (gpio_is_valid(reset_gpio)) { - error = scf0403_request_reset_gpio(reset_gpio); - if (error) { - printf("Failed requesting reset GPIO%d: %d\n", - reset_gpio, error); - return error; - } - } - - priv.reset_gpio = reset_gpio; - priv.spi = spi_setup_slave(3, 0, 1000000, SPI_MODE_0); - error = spi_claim_bus(priv.spi); - if (error) - goto bus_claim_fail; - - /* reset LCD */ - scf0403_gpio_reset(reset_gpio); - - error = scf0403_spi_read_rddid(priv.spi, &priv.rddid); - if (error) { - puts("IDs read failed\n"); - goto readid_fail; - } - - if (priv.rddid == SCF0403852GGU04_ID) { - priv.init_seq = scf0403_initseq_sn04; - priv.seq_size = ARRAY_SIZE(scf0403_initseq_sn04); - } else { - priv.init_seq = scf0403_initseq_sn20; - priv.seq_size = ARRAY_SIZE(scf0403_initseq_sn20); - } - - scf0403_lcd_init(&priv); - - /* Start operation */ - scf0403_spi_transfer(priv.spi, &scf0403_cmd_dison); - mdelay(100); - scf0403_spi_transfer(priv.spi, &scf0403_cmd_slpout); - spi_release_bus(priv.spi); - - return 0; - -readid_fail: - spi_release_bus(priv.spi); -bus_claim_fail: - if (gpio_is_valid(priv.reset_gpio)) - gpio_free(priv.reset_gpio); - - return error; -} |