Merge branch '2022-07-25-assorted-platform-updates'

- Assorted TI, Apple, Snapdragon and Xen updates.

7 files changed, 175 insertions, 64 deletions

diff --git a/drivers/dma/ti/Makefile b/drivers/dma/ti/Makefile
index 56f348700d4..6807eb8e8b2 100644
--- a/drivers/dma/ti/Makefile
+++ b/drivers/dma/ti/Makefile
@@ -3,7 +3,7 @@
 obj-$(CONFIG_TI_K3_NAVSS_UDMA) += k3-udma.o
 obj-$(CONFIG_TI_K3_PSIL) += k3-psil-data.o
 k3-psil-data-y += k3-psil.o
-k3-psil-data-$(CONFIG_SOC_K3_AM6) += k3-psil-am654.o
+k3-psil-data-$(CONFIG_SOC_K3_AM654) += k3-psil-am654.o
 k3-psil-data-$(CONFIG_SOC_K3_J721E) += k3-psil-j721e.o
 k3-psil-data-$(CONFIG_SOC_K3_J721S2) += k3-psil-j721s2.o
 k3-psil-data-$(CONFIG_SOC_K3_AM642) += k3-psil-am64.o
diff --git a/drivers/dma/ti/k3-psil.c b/drivers/dma/ti/k3-psil.c
index f1330bf4b03..f23c8ca2b74 100644
--- a/drivers/dma/ti/k3-psil.c
+++ b/drivers/dma/ti/k3-psil.c
@@ -16,7 +16,7 @@ struct psil_endpoint_config *psil_get_ep_config(u32 thread_id)
 	int i;
 
 	if (!soc_ep_map) {
-		if (IS_ENABLED(CONFIG_SOC_K3_AM6))
+		if (IS_ENABLED(CONFIG_SOC_K3_AM654))
 			soc_ep_map = &am654_ep_map;
 		else if (IS_ENABLED(CONFIG_SOC_K3_J721E))
 			soc_ep_map = &j721e_ep_map;
diff --git a/drivers/iommu/apple_dart.c b/drivers/iommu/apple_dart.c
index f2e17009607..2faacb8f3b6 100644
--- a/drivers/iommu/apple_dart.c
+++ b/drivers/iommu/apple_dart.c
@@ -24,6 +24,12 @@
 #define  DART_TTBR_VALID	BIT(31)
 #define  DART_TTBR_SHIFT	12
 
+#define DART_T8110_TCR(sid)	(0x1000 + 4 * (sid))
+#define  DART_T8110_TCR_BYPASS_DAPF		BIT(2)
+#define  DART_T8110_TCR_BYPASS_DART		BIT(1)
+#define  DART_T8110_TCR_TRANSLATE_ENABLE	BIT(0)
+#define DART_T8110_TTBR(sid)	(0x1400 + 4 * (sid))
+
 static int apple_dart_probe(struct udevice *dev)
 {
 	void *base;
@@ -34,7 +40,16 @@ static int apple_dart_probe(struct udevice *dev)
 		return -EINVAL;
 
 	u32 params2 = readl(base + DART_PARAMS2);
-	if (params2 & DART_PARAMS2_BYPASS_SUPPORT) {
+	if (!(params2 & DART_PARAMS2_BYPASS_SUPPORT))
+		return 0;
+
+	if (device_is_compatible(dev, "apple,t8112-dart")) {
+		for (sid = 0; sid < 256; sid++) {
+			writel(DART_T8110_TCR_BYPASS_DART | DART_T8110_TCR_BYPASS_DAPF,
+			       base + DART_T8110_TCR(sid));
+			writel(0, base + DART_T8110_TTBR(sid));
+		}
+	} else {
 		for (sid = 0; sid < 16; sid++) {
 			writel(DART_TCR_BYPASS_DART | DART_TCR_BYPASS_DAPF,
 			       base + DART_TCR(sid));
@@ -49,6 +64,7 @@ static int apple_dart_probe(struct udevice *dev)
 static const struct udevice_id apple_dart_ids[] = {
 	{ .compatible = "apple,t8103-dart" },
 	{ .compatible = "apple,t6000-dart" },
+	{ .compatible = "apple,t8112-dart" },
 	{ /* sentinel */ }
 };
 
diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c
index d63d7b3a2c1..604f9c3ff99 100644
--- a/drivers/mmc/msm_sdhci.c
+++ b/drivers/mmc/msm_sdhci.c
@@ -22,18 +22,17 @@
 #define SDCC_MCI_POWER_SW_RST BIT(7)
 
 /* This is undocumented register */
-#define SDCC_MCI_VERSION             0x50
-#define SDCC_MCI_VERSION_MAJOR_SHIFT 28
-#define SDCC_MCI_VERSION_MAJOR_MASK  (0xf << SDCC_MCI_VERSION_MAJOR_SHIFT)
-#define SDCC_MCI_VERSION_MINOR_MASK  0xff
+#define SDCC_MCI_VERSION		0x50
+#define SDCC_V5_VERSION			0x318
+
+#define SDCC_VERSION_MAJOR_SHIFT	28
+#define SDCC_VERSION_MAJOR_MASK		(0xf << SDCC_VERSION_MAJOR_SHIFT)
+#define SDCC_VERSION_MINOR_MASK		0xff
 
 #define SDCC_MCI_STATUS2 0x6C
 #define SDCC_MCI_STATUS2_MCI_ACT 0x1
 #define SDCC_MCI_HC_MODE 0x78
 
-/* Offset to SDHCI registers */
-#define SDCC_SDHCI_OFFSET 0x900
-
 /* Non standard (?) SDHCI register */
 #define SDHCI_VENDOR_SPEC_CAPABILITIES0  0x11c
 
@@ -47,6 +46,10 @@ struct msm_sdhc {
 	void *base;
 };
 
+struct msm_sdhc_variant_info {
+	bool mci_removed;
+};
+
 DECLARE_GLOBAL_DATA_PTR;
 
 static int msm_sdc_clk_init(struct udevice *dev)
@@ -85,25 +88,8 @@ static int msm_sdc_clk_init(struct udevice *dev)
 	return 0;
 }
 
-static int msm_sdc_probe(struct udevice *dev)
+static int msm_sdc_mci_init(struct msm_sdhc *prv)
 {
-	struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
-	struct msm_sdhc_plat *plat = dev_get_plat(dev);
-	struct msm_sdhc *prv = dev_get_priv(dev);
-	struct sdhci_host *host = &prv->host;
-	u32 core_version, core_minor, core_major;
-	u32 caps;
-	int ret;
-
-	host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_BROKEN_R1B;
-
-	host->max_clk = 0;
-
-	/* Init clocks */
-	ret = msm_sdc_clk_init(dev);
-	if (ret)
-		return ret;
-
 	/* Reset the core and Enable SDHC mode */
 	writel(readl(prv->base + SDCC_MCI_POWER) | SDCC_MCI_POWER_SW_RST,
 	       prv->base + SDCC_MCI_POWER);
@@ -126,12 +112,45 @@ static int msm_sdc_probe(struct udevice *dev)
 	/* Enable host-controller mode */
 	writel(1, prv->base + SDCC_MCI_HC_MODE);
 
-	core_version = readl(prv->base + SDCC_MCI_VERSION);
+	return 0;
+}
 
-	core_major = (core_version & SDCC_MCI_VERSION_MAJOR_MASK);
-	core_major >>= SDCC_MCI_VERSION_MAJOR_SHIFT;
+static int msm_sdc_probe(struct udevice *dev)
+{
+	struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
+	struct msm_sdhc_plat *plat = dev_get_plat(dev);
+	struct msm_sdhc *prv = dev_get_priv(dev);
+	const struct msm_sdhc_variant_info *var_info;
+	struct sdhci_host *host = &prv->host;
+	u32 core_version, core_minor, core_major;
+	u32 caps;
+	int ret;
 
-	core_minor = core_version & SDCC_MCI_VERSION_MINOR_MASK;
+	host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_BROKEN_R1B;
+
+	host->max_clk = 0;
+
+	/* Init clocks */
+	ret = msm_sdc_clk_init(dev);
+	if (ret)
+		return ret;
+
+	var_info = (void *)dev_get_driver_data(dev);
+	if (!var_info->mci_removed) {
+		ret = msm_sdc_mci_init(prv);
+		if (ret)
+			return ret;
+	}
+
+	if (!var_info->mci_removed)
+		core_version = readl(prv->base + SDCC_MCI_VERSION);
+	else
+		core_version = readl(host->ioaddr + SDCC_V5_VERSION);
+
+	core_major = (core_version & SDCC_VERSION_MAJOR_MASK);
+	core_major >>= SDCC_VERSION_MAJOR_SHIFT;
+
+	core_minor = core_version & SDCC_VERSION_MINOR_MASK;
 
 	/*
 	 * Support for some capabilities is not advertised by newer
@@ -161,9 +180,13 @@ static int msm_sdc_probe(struct udevice *dev)
 static int msm_sdc_remove(struct udevice *dev)
 {
 	struct msm_sdhc *priv = dev_get_priv(dev);
+	const struct msm_sdhc_variant_info *var_info;
+
+	var_info = (void *)dev_get_driver_data(dev);
 
-	 /* Disable host-controller mode */
-	writel(0, priv->base + SDCC_MCI_HC_MODE);
+	/* Disable host-controller mode */
+	if (!var_info->mci_removed)
+		writel(0, priv->base + SDCC_MCI_HC_MODE);
 
 	return 0;
 }
@@ -195,8 +218,17 @@ static int msm_sdc_bind(struct udevice *dev)
 	return sdhci_bind(dev, &plat->mmc, &plat->cfg);
 }
 
+static const struct msm_sdhc_variant_info msm_sdhc_mci_var = {
+	.mci_removed = false,
+};
+
+static const struct msm_sdhc_variant_info msm_sdhc_v5_var = {
+	.mci_removed = true,
+};
+
 static const struct udevice_id msm_mmc_ids[] = {
-	{ .compatible = "qcom,sdhci-msm-v4" },
+	{ .compatible = "qcom,sdhci-msm-v4", .data = (ulong)&msm_sdhc_mci_var },
+	{ .compatible = "qcom,sdhci-msm-v5", .data = (ulong)&msm_sdhc_v5_var },
 	{ }
 };
 
diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c
index 686cdc6f7c2..fb6b6cf3fff 100644
--- a/drivers/phy/ti/phy-j721e-wiz.c
+++ b/drivers/phy/ti/phy-j721e-wiz.c
@@ -221,6 +221,44 @@ enum wiz_type {
 	AM64_WIZ_10G,
 };
 
+struct wiz_data {
+	enum wiz_type type;
+	const struct reg_field *pll0_refclk_mux_sel;
+	const struct reg_field *pll1_refclk_mux_sel;
+	const struct reg_field *refclk_dig_sel;
+	const struct reg_field *pma_cmn_refclk1_dig_div;
+	const struct wiz_clk_mux_sel *clk_mux_sel;
+	unsigned int clk_div_sel_num;
+};
+
+static const struct wiz_data j721e_16g_data = {
+	.type = J721E_WIZ_16G,
+	.pll0_refclk_mux_sel = &pll0_refclk_mux_sel,
+	.pll1_refclk_mux_sel = &pll1_refclk_mux_sel,
+	.refclk_dig_sel = &refclk_dig_sel_16g,
+	.pma_cmn_refclk1_dig_div = &pma_cmn_refclk1_dig_div,
+	.clk_mux_sel = clk_mux_sel_16g,
+	.clk_div_sel_num = WIZ_DIV_NUM_CLOCKS_16G,
+};
+
+static const struct wiz_data j721e_10g_data = {
+	.type = J721E_WIZ_10G,
+	.pll0_refclk_mux_sel = &pll0_refclk_mux_sel,
+	.pll1_refclk_mux_sel = &pll1_refclk_mux_sel,
+	.refclk_dig_sel = &refclk_dig_sel_10g,
+	.clk_mux_sel = clk_mux_sel_10g,
+	.clk_div_sel_num = WIZ_DIV_NUM_CLOCKS_10G,
+};
+
+static struct wiz_data am64_10g_data = {
+	.type = AM64_WIZ_10G,
+	.pll0_refclk_mux_sel = &pll0_refclk_mux_sel,
+	.pll1_refclk_mux_sel = &pll1_refclk_mux_sel,
+	.refclk_dig_sel = &refclk_dig_sel_10g,
+	.clk_mux_sel = clk_mux_sel_10g,
+	.clk_div_sel_num = WIZ_DIV_NUM_CLOCKS_10G,
+};
+
 #define WIZ_TYPEC_DIR_DEBOUNCE_MIN	100	/* ms */
 #define WIZ_TYPEC_DIR_DEBOUNCE_MAX	1000
 
@@ -253,6 +291,7 @@ struct wiz {
 	u32			lane_phy_type[WIZ_MAX_LANES];
 	struct clk		*input_clks[WIZ_MAX_INPUT_CLOCKS];
 	unsigned int		id;
+	const struct wiz_data	*data;
 };
 
 struct wiz_div_clk {
@@ -667,7 +706,7 @@ static int wiz_regfield_init(struct wiz *wiz)
 	struct regmap *regmap = wiz->regmap;
 	int num_lanes = wiz->num_lanes;
 	struct udevice *dev = wiz->dev;
-	enum wiz_type type;
+	const struct wiz_data *data = wiz->data;
 	int i;
 
 	wiz->por_en = devm_regmap_field_alloc(dev, regmap, por_en);
@@ -704,36 +743,31 @@ static int wiz_regfield_init(struct wiz *wiz)
 		return PTR_ERR(wiz->div_sel_field[CMN_REFCLK]);
 	}
 
-	wiz->div_sel_field[CMN_REFCLK1] =
-		devm_regmap_field_alloc(dev, regmap, pma_cmn_refclk1_dig_div);
-	if (IS_ERR(wiz->div_sel_field[CMN_REFCLK1])) {
-		dev_err(dev, "PMA_CMN_REFCLK1_DIG_DIV reg field init failed\n");
-		return PTR_ERR(wiz->div_sel_field[CMN_REFCLK1]);
+	if (data->pma_cmn_refclk1_dig_div) {
+		wiz->div_sel_field[CMN_REFCLK1] =
+			devm_regmap_field_alloc(dev, regmap, *data->pma_cmn_refclk1_dig_div);
+		if (IS_ERR(wiz->div_sel_field[CMN_REFCLK1])) {
+			dev_err(dev, "PMA_CMN_REFCLK1_DIG_DIV reg field init failed\n");
+			return PTR_ERR(wiz->div_sel_field[CMN_REFCLK1]);
+		}
 	}
 
 	wiz->mux_sel_field[PLL0_REFCLK] =
-		devm_regmap_field_alloc(dev, regmap, pll0_refclk_mux_sel);
+		devm_regmap_field_alloc(dev, regmap, *data->pll0_refclk_mux_sel);
 	if (IS_ERR(wiz->mux_sel_field[PLL0_REFCLK])) {
 		dev_err(dev, "PLL0_REFCLK_SEL reg field init failed\n");
 		return PTR_ERR(wiz->mux_sel_field[PLL0_REFCLK]);
 	}
 
 	wiz->mux_sel_field[PLL1_REFCLK] =
-		devm_regmap_field_alloc(dev, regmap, pll1_refclk_mux_sel);
+		devm_regmap_field_alloc(dev, regmap, *data->pll1_refclk_mux_sel);
 	if (IS_ERR(wiz->mux_sel_field[PLL1_REFCLK])) {
 		dev_err(dev, "PLL1_REFCLK_SEL reg field init failed\n");
 		return PTR_ERR(wiz->mux_sel_field[PLL1_REFCLK]);
 	}
 
-	type = dev_get_driver_data(dev);
-	if (type == J721E_WIZ_10G || type == AM64_WIZ_10G)
-		wiz->mux_sel_field[REFCLK_DIG] =
-			devm_regmap_field_alloc(dev, regmap,
-						refclk_dig_sel_10g);
-	else
-		wiz->mux_sel_field[REFCLK_DIG] =
-			devm_regmap_field_alloc(dev, regmap,
-						refclk_dig_sel_16g);
+	wiz->mux_sel_field[REFCLK_DIG] =
+		devm_regmap_field_alloc(dev, regmap, *data->refclk_dig_sel);
 	if (IS_ERR(wiz->mux_sel_field[REFCLK_DIG])) {
 		dev_err(dev, "REFCLK_DIG_SEL reg field init failed\n");
 		return PTR_ERR(wiz->mux_sel_field[REFCLK_DIG]);
@@ -1059,14 +1093,12 @@ static int j721e_wiz_probe(struct udevice *dev)
 	wiz->num_lanes = num_lanes;
 	wiz->dev = dev;
 	wiz->clk_div_sel = clk_div_sel;
-	wiz->type = dev_get_driver_data(dev);
-	if (wiz->type == J721E_WIZ_10G || wiz->type == AM64_WIZ_10G) {
-		wiz->clk_mux_sel = clk_mux_sel_10g;
-		wiz->clk_div_sel_num = WIZ_DIV_NUM_CLOCKS_10G;
-	} else {
-		wiz->clk_mux_sel = clk_mux_sel_16g;
-		wiz->clk_div_sel_num = WIZ_DIV_NUM_CLOCKS_16G;
-	}
+
+	wiz->data = (struct wiz_data *)dev_get_driver_data(dev);
+	wiz->type = wiz->data->type;
+
+	wiz->clk_mux_sel = (struct wiz_clk_mux_sel *)wiz->data->clk_mux_sel;
+	wiz->clk_div_sel_num = wiz->data->clk_div_sel_num;
 
 	rc = wiz_get_lane_phy_types(dev, wiz);
 	if (rc) {
@@ -1133,13 +1165,13 @@ static int j721e_wiz_remove(struct udevice *dev)
 
 static const struct udevice_id j721e_wiz_ids[] = {
 	{
-		.compatible = "ti,j721e-wiz-16g", .data = J721E_WIZ_16G,
+		.compatible = "ti,j721e-wiz-16g", .data = (ulong)&j721e_16g_data,
 	},
 	{
-		.compatible = "ti,j721e-wiz-10g", .data = J721E_WIZ_10G,
+		.compatible = "ti,j721e-wiz-10g", .data = (ulong)&j721e_10g_data,
 	},
 	{
-		.compatible = "ti,am64-wiz-10g", .data = AM64_WIZ_10G,
+		.compatible = "ti,am64-wiz-10g", .data = (ulong)&am64_10g_data,
 	},
 	{}
 };
diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig
index 7c346180bae..86857c06272 100644
--- a/drivers/ram/Kconfig
+++ b/drivers/ram/Kconfig
@@ -45,7 +45,7 @@ config MPC83XX_SDRAM
 
 config K3_AM654_DDRSS
 	bool "Enable AM654 DDRSS support"
-	depends on RAM && SOC_K3_AM6
+	depends on RAM && SOC_K3_AM654
 	help
 	  K3 based AM654 devices has DDR memory subsystem that comprises
 	  Synopys DDR controller, Synopsis DDR phy and wrapper logic to
diff --git a/drivers/xen/hypervisor.c b/drivers/xen/hypervisor.c
index 25608948323..16c7c96c94e 100644
--- a/drivers/xen/hypervisor.c
+++ b/drivers/xen/hypervisor.c
@@ -144,6 +144,36 @@ struct shared_info *map_shared_info(void *p)
 	return HYPERVISOR_shared_info;
 }
 
+void unmap_shared_info(void)
+{
+	xen_pfn_t shared_info_pfn = virt_to_pfn(HYPERVISOR_shared_info);
+	struct xen_remove_from_physmap xrfp = {0};
+	struct xen_memory_reservation reservation = {0};
+	xen_ulong_t nr_exts = 1;
+
+	xrfp.domid = DOMID_SELF;
+	xrfp.gpfn = shared_info_pfn;
+	if (HYPERVISOR_memory_op(XENMEM_remove_from_physmap, &xrfp) != 0)
+		panic("Failed to unmap HYPERVISOR_shared_info\n");
+
+	/*
+	 * After removing from physmap there will be a hole in address space on
+	 * HYPERVISOR_shared_info address, so to free memory allocated with
+	 * memalign and prevent exceptions during access to this page we need to
+	 * fill this 4KB hole with XENMEM_populate_physmap before jumping to Linux.
+	 */
+	reservation.domid = DOMID_SELF;
+	reservation.extent_order = 0;
+	reservation.address_bits = 0;
+	set_xen_guest_handle(reservation.extent_start, &shared_info_pfn);
+	reservation.nr_extents = nr_exts;
+	if (HYPERVISOR_memory_op(XENMEM_populate_physmap, &reservation) != nr_exts)
+		panic("Failed to populate memory on HYPERVISOR_shared_info addr\n");
+
+	/* Now we can return this to memory allocator */
+	free(HYPERVISOR_shared_info);
+}
+
 void do_hypervisor_callback(struct pt_regs *regs)
 {
 	unsigned long l1, l2, l1i, l2i;
@@ -251,4 +281,5 @@ void xen_fini(void)
 	fini_gnttab();
 	fini_xenbus();
 	fini_events();
+	unmap_shared_info();
 }