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authorJudith Mendez <jm@ti.com>2025-04-17 18:43:32 -0500
committerTom Rini <trini@konsulko.com>2025-04-24 10:44:52 -0600
commit02c6913a97934c3b68629739b9c6273539e37a96 (patch)
treea0154e6f281697cd01b3e25944c40ffa38212a06 /tools/u_boot_pylib/test_util.py
parentc511c708aaf00d850f2c8eee7d083466a04109b7 (diff)
mmc: am654_sdhci: Fix HIGH_SPEED_ENA
High Speed enable bit switches data launch from the falling clock edge (half cycle timing) to the rising clock edge (full cycle timing). For all SD UHS modes, data launch must happen at the rising clock edge, so set HIGH_SPEED_ENA for SDR12 and SDR25 modes. For all HS modes, data launch must happen at the falling clock edge, so do not set HIGH_SPEED_ENA for MMC_HS_52. Signed-off-by: Judith Mendez <jm@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com>
Diffstat (limited to 'tools/u_boot_pylib/test_util.py')
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