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authorPatrick Delaunay <patrick.delaunay@foss.st.com>2024-10-11 17:31:49 +0200
committerPatrick Delaunay <patrick.delaunay@foss.st.com>2024-10-16 20:18:56 +0200
commitf9e94edab49188ee9aefe6979825defff20b151e (patch)
tree9a509fa5f162584f28b9f94d5c4004d342d8e0ef /tools/u_boot_pylib/test_util.py
parent5cb33c70b2c57248eb552e57fba8af305fa3b2c8 (diff)
ARM: stm32mp: enable data cache after LMB configuration for STM32MP1
Move the stm32mp1 data cache reconfiguration after the lmb init call board_r::initr_lmb to allow parsing of the reserved region with no-map tag. After this patch the DDR is not fully mapped up to arch_early_init_r() call, only the relocation region is mapped, but it is enough for the first board_r initialization phases; later, when arch_early_init_r() is called, the LMB is already initialized and the function lmb_is_reserved_flags() function is functional, this LMB function is called in the weak function dram_bank_mmu_setup() when dcache_enable() is executed. Without this change, as LMB is not initialized when it is used in dram_bank_mmu_setup, the OP-TEE region is mapped cache-able by U-Boot and we have some firewall violation since "LMB memory map global and persistent" series. Fixes: ed17a33fed29 ("lmb: make LMB memory map persistent and global") Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Diffstat (limited to 'tools/u_boot_pylib/test_util.py')
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