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Diffstat (limited to 'arch/arm/mach-socfpga/system_manager_soc64.c')
-rw-r--r--arch/arm/mach-socfpga/system_manager_soc64.c24
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/system_manager_soc64.c b/arch/arm/mach-socfpga/system_manager_soc64.c
index 4b42158be9d..913f93c8f94 100644
--- a/arch/arm/mach-socfpga/system_manager_soc64.c
+++ b/arch/arm/mach-socfpga/system_manager_soc64.c
@@ -8,9 +8,29 @@
#include <asm/arch/system_manager.h>
#include <asm/global_data.h>
#include <asm/io.h>
+#include <linux/bitfield.h>
DECLARE_GLOBAL_DATA_PTR;
+#if IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX5)
+/*
+ * Setting RESET_PULSE_OVERRIDE bit for successful reset staggering pulse
+ * generation and setting PORT_OVERCURRENT bit so that until we turn on the
+ * Vbus, it doesn't give false information about Vbus to the HPS controller.
+ */
+static void sysmgr_config_usb3(void)
+{
+ u32 reg_val = 0;
+
+ reg_val = readl(socfpga_get_sysmgr_addr() + SYSMGR_SOC64_USB3_MISC_CTRL_REG0);
+ reg_val |= FIELD_PREP(SYSMGR_SOC64_USB3_MISC_CTRL_REG0_RESET_PUL_OVR,
+ SET_USB3_MISC_CTRL_REG0_PORT_RESET_PUL_OVR);
+ reg_val |= FIELD_PREP(SYSMGR_SOC64_USB3_MISC_CTRL_REG0_PORT_OVR_CURR,
+ SET_USB3_MISC_CTRL_REG0_PORT_OVR_CURR_BIT_1);
+ writel(reg_val, socfpga_get_sysmgr_addr() + SYSMGR_SOC64_USB3_MISC_CTRL_REG0);
+}
+#endif
+
/*
* Configure all the pin muxes
*/
@@ -18,6 +38,10 @@ void sysmgr_pinmux_init(void)
{
populate_sysmgr_pinmux();
populate_sysmgr_fpgaintf_module();
+
+#if IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX5)
+ sysmgr_config_usb3();
+#endif
}
/*