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The logic was updated without modifying the comment above it
Fixes: 72b8c6d1ebf ("pinctrl: don't fall back to pinctrl_select_state_simple()")
Signed-off-by: Philip Molloy <philip.molloy@analog.com>
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Rasmus Villemoes <ravi@prevas.dk> says:
I was bitten by our limit macros not being usable in #if conditionals
when building a standalone app. It turns out that the work to fix that
had already been started by the inclusion of the mbedtls library, so
it's something that people do hit.
Let's finish the job by providing suitable limit macros for all three families:
- Standard C types, char, short, ...
- Kernel-style fixed-width types s8, u64, ...
- POSIX/C99 fixed-width types int16_t, uint32_t, ...
Please note that a naive approach like spelling out the full decimal
value for the constants doesn't really work, as there is no such thing
as a "negative integer constant". That is, doing
#define LLONG_MIN -9223372036854775808LL
would lead to the compiler complaining
warning: integer constant is so large that it is unsigned
and the type of that LLONG_MIN would actually be "unsigned long long", so e.g.
#if LLONG_MIN >= 0
#warning "LLONG_MIN is not negative?"
#endif
would fire.
Link: https://lore.kernel.org/r/20250707203655.613340-1-ravi@prevas.dk
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Currently, we only have UINT32_MAX and UINT64_MAX in limits.h, and
then stdint.h and kernel.h somewhat randomly define UINT8_MAX and
INT32_MAX, respectively.
Provide a full set of definitions in terms of the min/max macros for
the types that [u]intNN_t are defined in terms of, namely the {s,u}NN
ones.
Try to avoid breaking whatever depended on getting UINT8_MAX from our
compat stdint.h by replacing it with an include of limits.h.
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
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Since we define the {s,u}{8,16,32,64} types the same way on all
architectures, i.e. everybody uses asm-generic/int-ll64.h, we can just
define the associated limit macros in terms of those for the
corresponding types. This eliminates another set of limit macros that
are not usable in #if conditionals.
These type names and macros are not C or POSIX, so there's no language
violation, but certainly a violation of developers' reasonable
expectations.
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
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In a customer project that was building a stand-alone application, I
hit a problem related to the fact that our LONG_MAX and friends are
not standards-compliant, in that they are not "suitable for use in #if
preprocessing directives"
... /toolchain_none/arm-cortexa8-eabi/sys-include/machine/_default_types.h:25:31: error: missing binary operator before token "long"
25 | || ( defined(LLONG_MAX) && (LLONG_MAX > 0x7fffffff) )
| ^~~~~~~~~
So following up on commit 13de8483388 ("mbedtls: add mbedtls into the
build system"), move the rest of the macros associated to the standard
C types {signed,unsigned} {char, short, int, long, long long} (and of
course bare 'char') to limits.h.
Make use of the fact that both gcc and clang provide suitable
predefined __FOO_MAX__ macros for the signed types, and use a standard
scheme for defining the FOO_MIN and UFOO_MAX macros in terms of
FOO_MAX.
Note that suffixes like L and ULL are allowed for preprocessor
integers; it is (casts) which are not. And using appropriate suffixes,
we can arrange for the type of e.g. UINT_MAX to be "unsigned int" due
to integer promotion rules.
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
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https://source.denx.de/u-boot/custodians/u-boot-snapdragon
CI: https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/pipelines/27056
- Fix unused access in ufetch
- Add missing clock for SM8650
- Port the Linux SPMI GPIO driver and port over SM8550 (other platforms
should follow)
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Commit [0] introduced, correctly, the bubble of qcom clock errors to
make it easy to spot missing clocks in the platforms, and this is a case
of that, add the GCC_CFG_NOC_USB3_PRIM_AXI_CLK clock to sm8650 clock
pool.
0: 7c5460afec3f ("clk/qcom: bubble up qcom_gate_clk_en() errors")
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250618093253.225929-1-rui.silva@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
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On some Qualcomm platforms, such as Dragonwing boards, the WDT_EN
register is write-only. Reading it back after enabling the watchdog
can return invalid data or cause unexpected behavior.
In particular, the check:
if (readl(wdt_addr(wdt, WDT_EN)) != 1)
may fail even though the watchdog is correctly enabled and running.
This leads to misleading error messages and unnecessary failures.
Removing the read check ensures compatibility and avoids false
negatives on platforms where WDT_EN is not readable.
This work builds upon this previous submission:
https://lore.kernel.org/u-boot/20250625094607.1348494-1-gopinath.sekar@oss.qualcomm.com/
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Link: https://lore.kernel.org/r/20250701065738.1644669-1-balaji.selvanathan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
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Enable the USB mass storage gadget to make it easy to access the
internal storage on the board.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250626132550.353332-1-casey.connolly@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
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The local variable size is not assigned to before it is used
for the first time. Correct this.
This issue was found by Smatch.
Fixes: 86d462c05d57 (cmd: add a fetch utility)
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Link: https://lore.kernel.org/r/20250626-ufetch_fix-v1-1-025afdb85dc2@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
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Move support of the pm8550 gpios to the newly introduced
driver and drop the compatible entry and the read-only quirk
at the same time from the old driver.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Rui Miguel Silva <rui.silva@linaro.org>
Acked-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250630-topic-sm8x50-pmic-gpio-pinctrl-new-v2-2-cc1512931197@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
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The current qcom_pmic_gpio driver is too limited and doesn't
support state tracking for all pins like the Linux driver.
Adding full pinconf support would require adding the state
and it's much simpler to restart from scratch with a new
driver based on the Linux one adapted to the U-Boot GPIO
and Pinctrl APIs.
For now only the PMICs I've been able to validate are
added in the compatible list but we should be able to
add the entire list from the Linux driver.
There's a few difference from the Linux driver:
- no IRQ support
- uses the U-Boot GPIO flags that maps very well
- uses the gpio-ranges to get the pins count
- no debugfs but prints the pin state via pinmux callback
It uses the same CONFIG entry as the old one, since
the ultimate goal is to migrate entirely on this new
driver once we verify it doesn't break the older
platforms.
Tested-by: Alexey Minnekhanov <alexeymin@postmarketos.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Rui Miguel Silva <rui.silva@linaro.org>
Acked-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250630-topic-sm8x50-pmic-gpio-pinctrl-new-v2-1-cc1512931197@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
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Stranges errors are observed when building U-Boot master for almost any
RISC-V board, the messages are in two types, one is about duplicated
symbols,
u-boot/arch/riscv/cpu//mtrap.S:32: multiple definition of `trap_entry';
arch/riscv/cpu/mtrap.o: u-boot/arch/riscv/cpu//mtrap.S:32: first defined here
and the other is fixdep's complaint about missing dependency files,
fixdep: error opening file: arch/riscv/cpu/.mtrap.o.d: No such file or directory
fixdep: error opening file: arch/riscv/cpu//.start.o.d: No such file or directory
where the latter could only be reproduced when building parallelly.
Both the two types of errors are about files in arch/riscv/cpu, and
there's a suspicious slash character in the reported path. Looking
through RISC-V-specific Makefiles, there's only one place that may
expand to such a path,
libs-y += arch/riscv/cpu/$(CPU)/
The right hand expands to "arch/riscv/cpu//" if $(CPU) isn't defined at
the time of including. With some debug statement added to
arch/riscv/Makefile, the output proves that arch/riscv/Makefile is
included twice, once with $(CPU) undefined and once defined correctly
according to CONFIG_SYS_CPU.
Futher bisecting shows an extra include statement against
arch/$(SRCARCH)/Makefile is added in earlier bump of Kbuild system. But
the statement is evaluated before config.mk is included and definition
of $(CPU), causing objects in arch/riscv/cpu/ are built and linked twice
(once as "arch/riscv/cpu/*", and once as "arch/riscv/cpu//*"), resulting
in the error.
Let's simply remove the extra include to fix these nasty errors. For
config targets, bumping Kbuild also introduced a new include to
arch/$(SRCARCH)/Makefile, which is removed as well for consistency.
Fixes: 5f520875bdf ("kbuild: Bump the build system to 5.1")
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Bryan Brattlof <bb@ti.com>
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In order to use SYS_64BIT_LBA with this driver we need for "start" to
also be of type lbaint_t and to then use the correct printf format
characters.
Reviewed-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
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We have a few options that we cannot enable in a "allyesconfig" type
build because we cannot use zero as a default value.
- The logic around HAS_BOARD_SIZE_LIMIT assumes that if we have set this
then we compare with it. Similarly, we need to set SPL_NO_BSS_LIMIT as
the default there.
- Both SYS_CUSTOM_LDSCRIPT and ENV_USE_DEFAULT_ENV_TEXT_FILE then prompt
for a file name to use.
- The SYS_I2C_SOFT driver is a legacy driver which requires a lot of
configuration within the board config. file instead, so disable it.
Signed-off-by: Tom Rini <trini@konsulko.com>
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Take the COMPILE_TEST option from the Linux Kernel v6.15 and since the
wording there is OK for us too, use it verbatim. Also update the default
for WERROR to be COMPILE_TEST which again matches the Linux Kernel.
This is the first big step needed to allow for "allyesconfig" to be
possible as it then lets us then disable things that aren't valid for a
compile only test.
Signed-off-by: Tom Rini <trini@konsulko.com>
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This symbol is not something that the user should be enabling or
disabling but rather the developer for a particular board should select
it when required.
This is mostly size neutral, however a few places do have changes. In
the case of i.MX6ULL systems, it is always the case that
arch_misc_init() could call setup_serial_number() and do useful work,
but was not enabled widely, but now is. In the case of i.MX23/28
systems, we should be able to call mx28_fixup_vt() again here, so do so.
Finally, some platforms were calling arch_misc_init() and then not doing
anything and this results in removing the option.
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
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The hook arch_misc_init was not intended to be used for per-board hooks.
This can be done with misc_init_r instead, which is what follows
immediately after arch_misc_init. Switch a few platforms.
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
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The assignments to sect and off use the pointer from ctxt.cur_dev but
that has not been NULL checked before this is done. So instead move the
assignments after the NULL check.
This issue found by Smatch
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Gao Xiang <xiang@kernel.org>
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Move to using the latest generated RM YAML configuration files generated
by the K3 Resource Partitioning Tool which updates them to have standard
formatting with respect to indentation.
These files were generated from the untagged commit 41718bd5f915 ("docs: Update
docs and move them to docs folder") of the K3 Resource Partitioning tool. This
tool is packaged as a part of the public SDK and is not otherwise
publicly available.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
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Andrew Goodbody <andrew.goodbody@linaro.org> says:
Smatch reported some issues in the ext4fs code. This includes a
suggestion to use an unwind goto, to not negate a return value and to
ensure that a NULL check happens before the pointer is dereferenced.
Link: https://lore.kernel.org/r/20250704-ext4fs_fix-v1-0-5c6acf4bf839@linaro.org
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Svyatoslav Ryhel <clamor95@gmail.com> says:
Add uclass for HW AES cryptographic devices found on some devices, like
Tegra20/Tegra30 SoC AES engine.
Link: https://lore.kernel.org/r/20250629105711.24687-1-clamor95@gmail.com
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Emanuele Ghidoli <emanuele.ghidoli@toradex.com> says:
This patch series enables RNG support to automatically populate
/chosen/kaslr-seed on the following Toradex arm64 TI System on Modules:
- Verdin AM62
- Verdin AM62P
This improves kernel security by supporting Kernel Address Space Layout
Randomization (KASLR) using a runtime-provided seed.
Link: https://lore.kernel.org/r/20250702134942.1483436-1-ghidoliemanuele@gmail.com
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Enable DM_RNG in U-Boot to populate /chosen/kaslr-seed automatically.
Enable OP-TEE, which supports RNG, to provide entropy.
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
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Enable DM_RNG in U-Boot to populate /chosen/kaslr-seed automatically.
Enable OP-TEE, which supports RNG, to provide entropy.
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
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In the function put_ext4 there is a NULL check for fs->dev_desc but this
has already been derefenced twice before this happens. Refactor the code
a bit to put the NULL check first.
This issue found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
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Ensure that allocated memory is freed on error exit replace the direct
return calls with 'goto fail'.
This issue found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
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In ext4fs_readdir it calls ext4fs_read_file and checks the return value
for non-zero to detect an error. This return value should be returned as
is rather than being negated.
This issue found by Smatch
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
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Create a basic test suit for AES DM uclass that covers all available
operations.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
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This adds new aes subcommands to use interface provided by AES UCLASS which
can be used to expose HW AES engines.
Signed-off-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
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This adds AES crypto engine using the AES Uclass implemented in software,
serves as example implementation and for uclass tests.
Those implementing HW AES crypto engine drivers can use this as basis and
replace software parts with the HW specifics of their device.
Signed-off-by: Ion Agorria <ion@agorria.com>
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Create a basic framework for a group of devices that perform AES
cryptographic operations.
Signed-off-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/27010
- Fix the i.MX8M Nano GPU path.
- Enable RNG support for KASLR on Toradex i.MX8 boards.
- Enable watchdog and clock driver for imx6ulz_smm_m2b.
- Tighten dependencies on CMD_BLOB.
- Remove the rest of i.MX31 support.
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- SH Ether clean ups, RZ/A1 clean ups, RZ/A1 Genmai support
- Gen3 EEPROM DT node clean up
- V4H SA0 BootROM compatible binman etype, SCIF compatible SREC
generation for Gen4
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Add r7s72100 Genmai board support. Serial console, NOR Flash and
Ethernet are known to work however on-board SDRAM is not yet enabled.
Signed-off-by: Magnus Damm <damm@opensource.se>
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Break out SoC specific code from the GR-Peach board and put it into the
board/renesas/common directory so it can be easily shared between the
GR-Peach and Genmai boards.
Signed-off-by: Magnus Damm <damm@opensource.se>
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Split the RZ/A1 GR-PEACH defconfig into board-specific defconfig
and common RZ/A1 SoC defconfig. This is a preparatory patch for
new RZ/A1 boards, no functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
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Replace current ad-hoc generation of SA0 header with renesas_rcar4_sa0 binman
etype on Renesas R-Car V4H. The new binman etype generates header which is
almost identical to the current ad-hoc SA0 header, with one difference, the
load length matches the actual payload size, which slightly improves boot time.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
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Add new etype which generates the Renesas R-Car Gen4 SA0 header.
This header is placed at the beginning of SPI NOR and describes
where should data from SPI NOR offset 0x40000 be loaded to, and
how much data should be loaded there. In case of U-Boot, this is
used to load SPL and possibly other payload(s) into RT-VRAM.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
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Most of the sysinfo EEPROM node eeprom@50 is now part of the core DTs,
remove duplicate DT properties from *-u-boot.dtsi . Adjust the phandle
reference to i2c-eeprom in sysinfo node using <&{i2c_*/eeprom@50}> to
avoid need for DT label. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
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Remove various deprecated code comments, no functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
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Drop CFG_SH_ETHER_PHY_MODE from configuration files, this value
is never used. No functional change intended.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
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Drop CFG_SH_ETHER_PHY_ADDR from README and configuration files, this
value is never used, PHY address is extracted from control DT instead.
No functional change intended.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
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Drop unused struct sh_eth_info *port_info .phy_addr member assignment.
PHY address is extracted from control DT. No functional change intended.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
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Drop CFG_SH_ETHER_CACHE_WRITEBACK and CFG_SH_ETHER_CACHE_INVALIDATE,
which are now always enabled in the sh_eth driver, because those cache
operations are always available. On architectures which do not implement
cache operations yet, cache operations have to be implemented first.
CFG_SH_ETHER_ALIGNE_SIZE now set as SH_ETHER_ALIGN_SIZE in sh_eth.h
based on architecture and no longer configured on board level.
Remove CFG_SH_ETHER_CACHE_WRITEBACK configuration option from README.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
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Turn the current cache operation macros into static functions to improve
compiler coverage checking. This does change the driver behavior slightly,
the driver now expects those cache operation functions to be available on
all architectures on which it is used. This should pose no problem, as the
driver is only used on 32bit and 64bit ARM, which both have those operations.
The CFG_SH_ETHER_ALIGNE_SIZE is converted to SH_ETHER_ALIGN_SIZE and defined
as either 64 on ARM or 16 on SH.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
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The CFG_SH_ETHER_USE_PORT configuration option is a remnant from
before U-Boot DM existed and SH Ethernet made full use of it, and
is no longer used, remove it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
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The struct sh_eth_dev .port member is always set to 0, therefore only
single-ported SH Ethernet is ever used. Support for multiple SH Ethernet
ports implemented on driver level is a remnant from before U-Boot DM
existed.
Pass struct sh_eth_info port_info around directly and remove the
struct sh_eth_dev entirely. Handling of multiple ports should be done
by U-Boot DM and multiple per-driver-instance private data.
No functional change intended.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
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Add Renesas R-Car Gen4 SCIF/HSCIF loader compatible SREC generation.
This is a regular U-Boot SPL SREC augmented with a short header which
describes where to store the received data and how much data to store.
This header is interpreted by the R-Car Gen4 BootROM SCIF/HSCIF loader.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
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Convert u-boot-spl.bin instead of u-boot-spl ELF into SCIF loader
compatible SREC. The u-boot-spl.bin includes SPL DT, while the ELF
does not, which leads to failure to start SPL via SCIF loader due
to missing SPL DT. Fix this by using u-boot-spl.bin which includes
the DT.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
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