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2025-04-23test: lib: add initjmp() testJerome Forissier
Test the initjmp() function when HAVE_INITJMP is set. Use the test as an example in the API documentation. Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-04-23sandbox: add initjmp()Jerome Forissier
Add initjm[() to sandbox, a non-standard extension to setjmp()/ longjmp() allowing to initialize a jump buffer with a function pointer and a stack pointer. This will be useful to later introduce threads. With this new function it becomes possible to longjmp() to a particular function pointer (rather than to a point previously reached during program execution as is the case with setjmp()), and with a custom stack. Both things are needed to spin off a new thread. Then the usual setjmp()/longjmp() pair is enough to save and restore a context, i.e., switch thread. The implementation is taken verbatim from barebox [1] with the exception of the additional stack_sz argument. It is quite complex because contrary to U-Boot platform code we don't know how the system's C library implements the jump buffer, so we can't just write the function and stack pointers into it. [1] https://github.com/barebox/barebox/blob/b2a15c383ddc/arch/sandbox/os/setjmp.c Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
2025-04-23riscv: add initjmp()Jerome Forissier
Implement initjmp() for RISC-V, a non-standard extension to setjmp()/ longjmp() allowing to initialize a jump buffer with a function pointer and a stack pointer. This will be useful to later introduce threads. With this new function it becomes possible to longjmp() to a particular function pointer (rather than to a point previously reached during program execution as is the case with setjmp()), and with a custom stack. Both things are needed to spin off a new thread. Then the usual setjmp()/longjmp() pair is enough to save and restore a context, i.e., switch thread. Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
2025-04-23arm: add initjmp()Jerome Forissier
Implement initjmp() for Arm. a non-standard extension to setjmp()/ longjmp() allowing to initialize a jump buffer with a function pointer and a stack pointer. This will be useful to later introduce threads. With this new function it becomes possible to longjmp() to a particular function pointer (rather than to a point previously reached during program execution as is the case with setjmp()), and with a custom stack. Both things are needed to spin off a new thread. Then the usual setjmp()/longjmp() pair is enough to save and restore a context, i.e., switch thread. Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-04-23arch: introduce initjmp() and Kconfig symbol HAVE_INITJMPJerome Forissier
Add the HAVE_INIJMP symbol to be set by architectures that support initjmp(), a non-standard extension to setjmp()/longjmp() allowing to initialize a jump buffer with a function pointer and a stack pointer. This will be useful to later introduce threads. With this new function it becomes possible to longjmp() to a particular function pointer (rather than to a point previously reached during program execution as is the case with setjmp()), and with a custom stack. Both things are needed to spin off a new thread. Then the usual setjmp()/longjmp() pair is enough to save and restore a context, i.e., switch thread. Add the initjmp() prototype to <include/setjmp.h> since it is common to all architectures. Add an entry to the API documentation: doc/api/setjmp.rst. Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-04-17Merge tag 'xilinx-for-v2025.07-rc1' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-microblaze AMD/Xilinx/FPGA changes for v2025.07-rc1 AMD/Xilinx: - Synchronize enums around tcm_mode - Access bootmode registers via firmware interface - Setup default values for DEBUG_UART - Fix dfu alt buffer clearing - Convert loadpdi command to fpga - Fix board detection code - Minor defconfig updates Versal: - Wire multi_boot register Versal Gen 2: - Enable missing drivers - Wire i2c FRU decoding at start - Wire saving variables to different locations - Disable default DEBUG_UART - Wire USB/UFS boot and fix access via firmware interface - Minor fixes ZynqMP/Kria: - Enable mkfwumdata - Topic board update - Enhance binman configurations - Kria usb update BuR: - Add multiple Zynq based boards cadence_ospi: - Enable device reset fpga: - Add support for loading bitstream for Altera SoCs
2025-04-17Merge patch series "airoha: add support spi/mmc/ethernet"Tom Rini
Christian Marangi <ansuelsmth@gmail.com> says: This is continuation of the initial patchset for airoha support. Some are trivial fix for spi. A new concept to setup SPI from detected NAND. Sadly DTS node still need to be merged upstream so we are currently adding them to u-boot dtsi and it's planned to be dropped once they are accepted in upstream kernel. Link: https://lore.kernel.org/r/20250407200208.25594-1-ansuelsmth@gmail.com
2025-04-17configs: airoha: an7581_evb: Enable Airoha SNFI SPI configChristian Marangi
Enable Airoha SNFI SPI config to enable support for SNAND flash. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2025-04-17arm: dts: an7581: Add SNAND nodeChristian Marangi
Add SNAND node to Airoha AN7581 EVB DTS to enable support for attached SNAND flash. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2025-04-17spi: airoha: Add Airoha SPI NAND driverChristian Marangi
Add Airoha SPI NAND driver to permit usage of attached SNAND on the Airoha AN7581 SoC. While SPI controller supports DMA transation, due to U-Boot limitation we currently limit it to single command in Manual mode. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2025-04-16spinand: call SPI setup_for_spinand if supportedChristian Marangi
Call SPI setup_for_spinand() if supported and defined to configure the SPI slave for the attached NAND. This is needed to configure the SPI with the NAND page size and spare size for correct configuration of the device. Call it as soon as the NAND is detected to correctly handle SPI controller with select_op_variant detection. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2025-04-16spi: Introduce setup_for_spinand()Christian Marangi
A common device attached to SPI are SPI NAND and some device might require to have info on the attached NAND to know the flash page size and spare size. To support this, introduce setup_for_spinand() that pass the attached spinand info from manufacturer. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> [trini: Switch to forward declaration of struct spinand_info] Signed-off-by: Tom Rini <trini@konsulko.com>
2025-04-16spi: drop unneeded spi.h header include from spinand.hChristian Marangi
Drop unneeded spi.h header include from spinand.h, nothing included by spi.h is actually used in this header and .c should correctly included spi.h if actually needed. Replace spi.h with linux/bitops.h as this is what is actually required for spinand.h Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2025-04-16regmap: Add regmap_set/clear_bits shorthandsChristian Marangi
Port Linux kernel regmap_set/clear_bits shorthands to set and clear bits in a regmap. These are handy if only specific bits needs to be applied or cleared and makes it easier to port regmap based driver from kernel upstream. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2025-04-16airoha: Add eMMC config to defconfigChristian Marangi
Enable Mediatek MMC driver in Airoha AN7581 EVB defconfig to add support for it in default images. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2025-04-16arch: arm: dts: an7581: Add eMMC nodesChristian Marangi
Add eMMC nodes with the fixed regulator and fixed clock. It's also needed to assign the clock and set it to 200MHz as it's set to 150Mhz by default. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2025-04-16mmc: mediatek: permit to also build for Airoha archChristian Marangi
Airoha new SoC implement the same Mediatek driver for MMC. Permit to also build for Airoha arch. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2025-04-16arch: arm: dts: an7581: Add Ethernet nodesChristian Marangi
Add Ethrnet nodes for Airoha AN7581 EVB board. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2025-04-16airoha: Add Ethernet config to defconfigChristian Marangi
Add Ethrnet config to defconfig to enable Ethernet support. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2025-04-16net: airoha: Add Airoha Ethernet driverChristian Marangi
Add airoha Ethernet driver for Airoha AN7581 SoC. This is a majorly rewritten and simplified version of the Linux airoha_eth.c driver. It's has been modified to support a single RX/TX ring to reflect U-Boot implementation with recv and send API. The struct and the define are kept as similar as possible to upstream one to not diverge too much. The AN7581 SoC include an Ethernet Switch based on the Mediatek MT753x but doesn't require any modification aside from setting the CPU port and applying the Flood configuration hence it can be handled entirely in the Ethernet driver. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2025-04-16arch: arm: dts: an7581: add Chip SCU nodeChristian Marangi
Add pending Chip SCU node for clock node. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2025-04-16net: phy: Add the Airoha EN8811H PHY driverLucien.Jheng
Add the driver for the Airoha EN8811H 2.5 Gigabit PHY. The PHY supports 100/1000/2500 Mbps with auto negotiation only. The driver uses two firmware files, for which updated versions are added to linux-firmware already. Based on the Linux upstream 8811 driver code(air_en8811h.c), I have modified the relevant process to align with the U-Boot boot sequence. and have validated this on Banana Pi BPI-R3 Mini. The MD32 FW is currently stored in eMMC partition 1 on Banana Pi BPI-R3 Mini, and it is loaded from there. Signed-off-by: Lucien.Jheng <lucienzx159@gmail.com>
2025-04-16Merge tag 'u-boot-marvell-20250516' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-marvell CI: https://dev.azure.com/sr0718/u-boot/_build/results?buildId=390&view=results - mvebu_espressobin_ultra-88f3720_defconfig: disable SATA - helios4: enable ddr odt0 on write for both chip-select - clearfog,helios4: disable sdhci sdma - mvebu/bubt: Correct usage of IS_ENABLED() macro - mvebu: Correct SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR usage
2025-04-16board/BuR/zynq: initial commitBernhard Messerklinger
This commit adds support for the brcp1, brsmarc2, brcp150 and brcp170 boards. This boards are based on the Xilinx Zynq SoC. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Acked-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20250404072819.69642-5-bernhard.messerklinger@br-automation.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-04-16board/BuR/common: split br_resetc_bmode functionBernhard Messerklinger
Split br_resetc_bmode function to add support for reading of reset reason in board code with br_resetc_bmode_get. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Link: https://lore.kernel.org/r/20250404072819.69642-4-bernhard.messerklinger@br-automation.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-04-16board/BuR/common: add parameter for reset controller I2C bus selectionBernhard Messerklinger
Normally B&R reset controllers are located at I2C bus 0. This patch adds the possibility to change this bus number with the kconfig option BR_RESETC_I2CBUS. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Link: https://lore.kernel.org/r/20250404072819.69642-3-bernhard.messerklinger@br-automation.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-04-16board/BuR/common: use strlcpy instead of strncpyBernhard Messerklinger
Now strlcpy is used to copy the defip string to the corresponding environment variable. This preserves memory for the NULL termination. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Link: https://lore.kernel.org/r/20250404072819.69642-2-bernhard.messerklinger@br-automation.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-04-16board: amd: Read an eeprom after relocationPadmarao Begari
Read an eeprom after relocation which also shows information from eeprom wired via nvmem aliases. When DTB reselection is enabled eeprom is read before relocation too but information is not showed. The issue about two i2c reads in this case will be address separately. Signed-off-by: Padmarao Begari <padmarao.begari@amd.com> Link: https://lore.kernel.org/r/20250409162639.588487-3-padmarao.begari@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-04-16arm64: versal2: Remove dtb reselect and multi dtbPadmarao Begari
Presently the multi dtb's are not using on versal Gen 2 platform, so remove CONFIG_DTB_RESELECT and CONFIG_MULTI_DTB_FIT from defconfig. Signed-off-by: Padmarao Begari <padmarao.begari@amd.com> Link: https://lore.kernel.org/r/20250409162639.588487-2-padmarao.begari@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-04-16board: xilinx: Store board info data in data sectionPadmarao Begari
Line 171 in README is describing that before relocation no code should use global variable because global variables are placed to BSS section which is initialized to 0 after relocation. In the case of ZynqMP, where DTB reselection is enabled, the EEPROM is read again after relocation. This prevents the issue from being observed. However, in Versal Gen 2, where DTB reselection is also enabled, the EEPROM is not read after relocation because it is not yet wired in board_init(). This leads to a situation where the code accesses an incorrect memory location, because none is really checking the board_info is valid or not. To fix, move the board_info into the data section and also check whether it is valid or not. Signed-off-by: Padmarao Begari <padmarao.begari@amd.com> Link: https://lore.kernel.org/r/20250409162553.588285-1-padmarao.begari@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-04-16amd: versal2: Add support for saving env based on bootmodeVenkatesh Yadav Abbarapu
Enable saving variables to MMC(FAT) and SPI based on primary bootmode. If bootmode is JTAG, dont save env anywhere(NOWHERE). Enable ENV_FAT_DEVICE_AND_PART="0:auto" for Versal Gen 2 platform. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20250411154612.107136-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-04-16arm64: versal2: Update the number of DRAM banks to 36Venkatesh Yadav Abbarapu
HBM stands for high bandwidth memory and is a type of memory interface used in 3D-stacked DRAM (dynamic random access memory) in some AMD GPUs (aka graphics cards), as well as the server, high-performance computing (HPC) and networking and client space. High Bandwidth Memory(HBM) has total 16 channels, one channel is divided into two pseudo channels which makes its 32 banks each with some amount of memory. And then we have DDR_LOW PS low, DDR_HIGH0 PS high, DDR_HIGH1 PS very high and pretty much there should be also place for PL DDR. So maximum number of memory banks will be 36, updating the CONFIG_NR_DRAM_BANKS to 36. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20250410092528.3713904-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-04-16arm64: versal2: Add usb distro boot commandVenkatesh Yadav Abbarapu
Adding support for the usb distro boot command. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/121b6879efde0b83d3933852442895631c4cb24f.1744273853.git.michal.simek@amd.com
2025-04-16arm64: versal2: Add ufs distro boot commandVenkatesh Yadav Abbarapu
Adding support for the ufs distro boot command. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c0e6737ae4119963afc8ea19b49b998a013d06c4.1744273853.git.michal.simek@amd.com
2025-04-16arm64: zynqmp: Start usb automatically via preboot on KriaVenkatesh Yadav Abbarapu
U-Boot configures the USB config object which enables power for the IP, without this the linux usb driver won't work. So add "usb start" as part of preboot command. Fixes: dd4a82201694 ("arm64: zynqmp: Introduce kria SOM defconfig") Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/180c9776b03d57d8218d161924363906ef354394.1744272843.git.michal.simek@amd.com
2025-04-16xilinx: Free memory when variable is saved in boot_targets_setup()Michal Simek
When boot_targets variable is saved there is no reason to keep string in malloc area that's why free it. This change is already done in ZynqMP code. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/fa10fc22193a1a23258466056b3d02f7496fccfe.1744270729.git.michal.simek@amd.com
2025-04-16xilinx: Remove UARTLITE from defconfigsMichal Simek
Remove uartlite serial driver from defconfigs because is not tested or used on ARM based platform as console. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/86b100692101089dd8d9a8eed45461e8855384bc.1744270698.git.michal.simek@amd.com
2025-04-16amd: versal2: Enable NVMEM frameworkMichal Simek
Enable NVMEM framework to be able to for example read MAC address from eeprom. For more information please look at commit 5db5b7e2a336 ("xilinx: Enable NVMEM framework for all platforms"). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/b6714165aee393528812ddbfc3cd18a3bbcf202e.1744270647.git.michal.simek@amd.com
2025-04-16amd: versal2: Enable SMBIOS commandMichal Simek
Enabel SMBIOS command as was done by commit aa815e6c7603 ("xilinx: Enable SMBIOS command") for our other platforms. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c1e236003c6ec250dbcc5178c873c171fffccd29.1744270535.git.michal.simek@amd.com
2025-04-16arm64: zynqmp: Use CONFIG_SPL_FS_LOAD_PAYLOAD_NAME in binmanMichal Simek
u-boot.itb name is coming via CONFIG_SPL_FS_LOAD_PAYLOAD_NAME and it's change will affect SD boot mode that's why start to use it. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/0f037e62e2d8486c0f68f204b45705be9e996ba7.1744039048.git.michal.simek@amd.com
2025-04-16configs: versal: Fix initial stack pointerPadmarao Begari
The mini u-boot is getting exception because of an initial stack pointer address is used at near the top of memory, and while executing u-boot is assigned pre-malloc and global_data memory after initial stack pointer and updated the stack pointer. Serial driver is used pre-malloc area for serial operations before relocation. But pre-malloc area is cleared while doing BSS at relocation time. The u-boot is called board_init() function and doing printf, relocation serial driver is not initialized yet, so it is using before relocation serial operations but it is cleared by BSS and got the exception. To fix, change an initial stack pointer address from near the top of memory to near the relocation memory. Fixes: 685874939a5e ("configs: versal: update initial stack pointer") Signed-off-by: Padmarao Begari <padmarao.begari@amd.com> Link: https://lore.kernel.org/r/20250407134544.3951763-1-padmarao.begari@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-04-16xilinx: versal: remove versal loadpdi commandPrasad Kummari
The source code for the versal loadpdi command and the CONFIG_CMD_VERSAL configuration has been removed. It now utilizes the fpga load <dev> <address> <length> command to load secure & non-secure pdi images. Signed-off-by: Prasad Kummari <prasad.kummari@amd.com> Link: https://lore.kernel.org/r/20250327105200.1262615-4-prasad.kummari@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-04-16arm64: versal2: Add PL bit stream load supportPrasad Kummari
Add support for loading the secure & non-secure pdi images and PL bitstream on the Versal Gen2 platform. The FPGA driver is enabled to load the bitstream in PDI format on the AMD Versal Gen2 device. PDI is the new programmable device image format for Versal Gen2, and the bitstream for the Versal Gen2 platform is generated exclusively in this format. With the enhanced SMC format in TF-A ensuring transparent payload forwarding for Versal Gen2, the u-boot driver must now handle the word swapping of PDI address that was previously done in TF-A for this API. The source code for the Versal2 loadpdi command and the CONFIG_CMD_VERSAL2 configuration has been removed. It now utilizes the fpga load <dev> <address> <length> command to load secure & non-secure pdi images. Signed-off-by: Prasad Kummari <prasad.kummari@amd.com> Link: https://lore.kernel.org/r/20250327105200.1262615-3-prasad.kummari@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-04-16arm64: versal-net: Add PL bit stream load supportPrasad Kummari
Add support for loading the secure & non-secure pdi images and PL bitstream on the Versal NET platform. The FPGA driver is enabled to load the bitstream in PDI format on the AMD Versal NET device. PDI is the new programmable device image format for Versal NET, and the bitstream for the Versal NET platform is generated exclusively in this format. The source code for the versalnet loadpdi command and the CONFIG_CMD_VERSAL_NET configuration has been removed. It now utilizes the fpga load <dev> <address> <length> command to load secure & non-secure pdi images. Signed-off-by: Prasad Kummari <prasad.kummari@amd.com> Link: https://lore.kernel.org/r/20250327105200.1262615-2-prasad.kummari@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-04-16drivers: fpga: Follow mainline to pass compatible flags to fpga_loadMuhammad Hazim Izzat Zamri
Introducing additional flag to check whether an FPGA driver is able to load a particular FPGA bitstream image. Generally, flag variable is used to enable or disable certain features, specify additional parameters (such as error handling), or modify how the function operates. Hence, in this function flags is an integer that can be used to pass configuration options to the fpga_load function. Here, it's initialized to 0, meaning no special options are enabled, but it could modify the flags to influence the function's behavior. Signed-off-by: Muhammad Hazim Izzat Zamri <muhammad.hazim.izzat.zamri@altera.com> Link: https://lore.kernel.org/r/20250314021953.18379-3-muhammad.hazim.izzat.zamri@altera.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-04-16drivers: fpga: Add FPGA configuration during bootm for Intel SOCFPGAMuhammad Hazim Izzat Zamri
Enabling the capability to automatically perform FPGA configuration when booting Linux FIT image via bootm command. The FPGA configuration bitstream shall be packed within the FIT image. The FPGA data (full or partial) is checked by the SDM hardware, for Intel SDM Mailbox based devices. Hence always return full bitstream. Second function is to enable the HPS to FPGA bridges when FPGA load is completed successfully. This is to ensure the FPGA is accessible by the HPS. Signed-off-by: Muhammad Hazim Izzat Zamri <muhammad.hazim.izzat.zamri@altera.com> Link: https://lore.kernel.org/r/20250314021953.18379-2-muhammad.hazim.izzat.zamri@altera.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-04-16arm64: zynqmp: fix dfu alt buffer clearingVincent Stehlé
The set_dfu_alt_info() function calls the ALLOC_CACHE_ALIGN_BUFFER() macro to declare a `buf' variable pointer into an array allocated on the stack. It then calls the memset() function to clear the useable portion of the array using the idiomatic expression `sizeof(buf)'. While this would indeed work fine for an array, in the present case we end up clearing only the size of a pointer. Fix this by specifying the explicit size `DFU_ALT_BUF_LEN' instead. Fixes: b86f43de0be0 ("xilinx: zynqmp: Add support for runtime dfu_alt_info setup") Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com> Cc: Michal Simek <michal.simek@amd.com> Cc: Tom Rini <trini@konsulko.com> Acked-by: Padmarao Begari <padmarao.begari@amd.com> Link: https://lore.kernel.org/r/20250407170529.893307-6-vincent.stehle@arm.com
2025-04-16xilinx: zynq: fix dfu alt buffer clearingVincent Stehlé
The set_dfu_alt_info() function calls the ALLOC_CACHE_ALIGN_BUFFER() macro to declare a `buf' variable pointer into an array allocated on the stack. It then calls the memset() function to clear the useable portion of the array using the idiomatic expression `sizeof(buf)'. While this would indeed work fine for an array, in the present case we end up clearing only the size of a pointer. Fix this by specifying the explicit size `DFU_ALT_BUF_LEN' instead. Fixes: c67fecd2125b ("ARM: zynq: Enable capsule update for qspi and mmc") Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com> Cc: Michal Simek <michal.simek@amd.com> Cc: Tom Rini <trini@konsulko.com> Acked-by: Padmarao Begari <padmarao.begari@amd.com> Link: https://lore.kernel.org/r/20250407170529.893307-5-vincent.stehle@arm.com
2025-04-16arm64: versal: fix dfu alt buffer clearingVincent Stehlé
The set_dfu_alt_info() function calls the ALLOC_CACHE_ALIGN_BUFFER() macro to declare a `buf' variable pointer into an array allocated on the stack. It then calls the memset() function to clear the useable portion of the array using the idiomatic expression `sizeof(buf)'. While this would indeed work fine for an array, in the present case we end up clearing only the size of a pointer. Fix this by specifying the explicit size `DFU_ALT_BUF_LEN' instead. Fixes: 064c8978b44f ("arm64: versal: Enable capsule update (SD)") Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com> Cc: Michal Simek <michal.simek@amd.com> Cc: Tom Rini <trini@konsulko.com> Acked-by: Padmarao Begari <padmarao.begari@amd.com> Link: https://lore.kernel.org/r/20250407170529.893307-4-vincent.stehle@arm.com
2025-04-16arm64: versal2: Update the text base and dtb addressVenkatesh Yadav Abbarapu
Update the TEXT_BASE and DTB address as per the new memory map. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/3ffb6f1f7ff418f01ccc2eccf8a834441f9f0b74.1742461498.git.michal.simek@amd.com