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2024-07-31Kconfig: Unify endian support optionJiaxun Yang
Move SUPPORT_BIG_ENDIAN, SUPPORT_LITTLE_ENDIAN to top-level arch Kconfig and let architectures select them as necessary. Remove if guard for Endianness selection choice so we can have one of SYS_BIG_ENDIAN, SYS_LITTLE_ENDIAN config symbol defined even on single endian system. Default endian to SYS_BIG_ENDIAN for MIPS || MICROBLAZE and LITTLE_ENDIAN for the rest to retain old config behaviour. Note: PPC, SH, Xtensa are technically bi-endian, but I checked compiled u-boot image with readelf, U-Boot currently only support little endian for SH and Xtensa, Big Endian for PPC. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2024-04-22common: Convert *.c/h from UTF-8 to ASCII enconfingMichal Simek
Convert UTF-8 chars to ASCII in cases where make sense. No Copyright or names are converted. Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Marek Behún <kabel@kernel.org>
2023-10-24mips: Remove common.h usageTom Rini
We can remove common.h from most cases of the code here, and only a few places need an additional header instead. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05global: Move remaining CONFIG_SYS_SDRAM_* to CFG_SYS_SDRAM_*Tom Rini
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_SDRAM namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-31Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASESimon Glass
The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE and this makes it imposible to use CONFIG_VAL(). Rename it to resolve this problem. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-03mscc: Drop dm.h header fileSimon Glass
This header file should not be included in other header files. Remove it from each one and use a forward declaration instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop linux/bitops.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop log.h from common headerSimon Glass
Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop init.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-09mips: vcoreiii: Fix cache coherency issuesLars Povlsen
This patch fixes an stability issue seen on some vcoreiii targets, which was root caused to a cache inconsistency situation. The inconsistency was caused by having kuseg pointing to NOR area but used as a stack/gd/heap area during initialization, while only relatively late remapping the RAM area into kuseg position. The fix is to initialize the DDR right after the TLB setup, and then remapping it into position before gd/stack/heap usage. Reported-by: Ramin Seyed-Moussavi <ramin.moussavi@yacoub.de> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Reviewed-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
2019-05-03net: mscc: ocelot: Update network driver for pcb120Horatiu Vultur
Update Ocelot network driver to have support also for pcb120. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-05-03MSCC: delete obsolete reference to MSCC_BITBANG_SPI_GPIORobert P. J. Day
Remove "select MSCC_BITBANG_SPI_GPIO" since Kbuild option was deleted back in commit ace9c103df2875d2b435dbd7b36618020edfd1c0: commit ace9c103df2875d2b435dbd7b36618020edfd1c0 Author: Lars Povlsen <lars.povlsen@microchip.com> Date: Tue Jan 8 10:38:35 2019 +0100 mips: gpio: mscc: Obsoleted gpio-mscc-bitbang-spi.c
2019-05-03mips: mscc: serval: Fix resetHoratiu Vultur
In case the ddr training was failing, it couldn't reset, it was just hanging. Therefore reimplement it, so when ddr training is failing it would call _machine_restart, which power downs the DDR and does a force reset. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-04-12net: Add MSCC ServalT network driver.Horatiu Vultur
Add network driver for Microsemi Ethernet switch. It is present on ServalT SoCs. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-23MSCC: Add board support for Serval SoC family.Horatiu Vultur
Add board support and configuration for Jaguar2 SoC family. The detection of the board type is based on the phy ids. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-23MSCC: Add support for Serval SoC family.Horatiu Vultur
As Ocelot, Servalt, Luton and Jaguar2, this family of SoCs are found in Microsemi Switches solution. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-23MSCC: Add support for Servalt SoC family.Horatiu Vultur
As Ocelot, Luton and Jaguar2, this family of SoCs are found in Microsemi Switches solution. Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-16MSCC: Add board support for Jaguar2 SOC familyHoratiu Vultur
Add board support and configuration for Jaguar2 SOC family. The detection of the board type in this family is based on the phy ids. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-16MSCC: Add support for Jaguar2 SOC familyHoratiu Vultur
As the Ocelot and Luton SoCs, this family of SoCs are found in Microsemi Switches solution. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-16mips: spi: mscc: Add fast bitbang SPI driverLars Povlsen
This patch add a new SPI driver for MSCC SOCs that does not sport the designware SPI hardware controller. Performance gain: 7.664 seconds vs. 17.633 for 1 Mbyte write. Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-16mips: mscc: luton+ocelot: Remove board config options, do probingLars Povlsen
As we are moving to multi-dtb and board detection, remove static board config options, and introduce board probing instead. Luton: This add single-binary support for the two MSCC luton-based reference boards - pcb090 and pcb091. The SoC chip ID is used to determine the board type. Ocelot: This add single-binary support for the two MSCC ocelot-based reference boards - pcb120 and pcb123. The PHY ids on specific ports are used to determine the board type. Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
2019-01-16mips: mscc: Add generic GPIO control utility functionLars Povlsen
The GPIO control function can be used for controlling alternate functions associated with a GPIO. Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
2019-01-16mips: mscc: Add generic PHY MIIM utility functionsLars Povlsen
The PHY MIIM utility functions can/will be used for board detection purposes. Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
2018-12-19MSCC: add board support for the Luton based evaluation boardGregory CLEMENT
Adding the support for the Luton boards PCB91 which share common code with the Ocelots boards, including board code, device tree and configuration. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-12-19MSCC: add board support for the Ocelots based evaluation boardsGregory CLEMENT
Adding the support for 2 boards sharing common code for Ocelot chip: PCB120 and PCB123 Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-12-19MSCC: add support for Luton SoCsGregory CLEMENT
As the Ocelots SoCs, this family of SoCs are found in the Microsemi Switches solution. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-12-19MSCC: add support for Ocelot SoCsGregory CLEMENT
This family of SoCs are found in the Microsemi Switches solution and have already a support in the linux kernel. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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