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2025-06-13x86: Move Intel GNVS file into the common include directorySimon Glass
Move this so we can include it from sandbox, needed since it is in a bloblist and must have a check. Signed-off-by: Simon Glass <sjg@chromium.org>
2025-05-09x86: spl: Add support for NVMe boot deviceNaresh Solanki
This change adds `BOOT_DEVICE_NVME` to the `enum` list in `arch/x86/include/asm/spl.h`, enabling NVMe as a recognized boot device for SPL (Secondary Program Loader). Tested x86 hardware with coreboot + U-Boot payload. Verified successful boot to NVMe drive. Signed-off-by: Naresh Solanki <naresh.solanki@9elements.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2025-05-09gpio: x86: Correct usage of IS_ENABLED() macro in intel_pinctrl_defs.hTom Rini
This file was using IS_ENABLED() to test for CONFIG flags but omitted the CONFIG_ prefix and so did not work as expected. Signed-off-by: Tom Rini <trini@konsulko.com>
2025-05-09x86: cpu: Describe board final hooks in the headerAndy Shevchenko
The new two declarations board_final_init() and board_final_cleanup() need a description. Add it here. Suggested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2025-04-07Revert "Merge patch series "pxe: Precursor series for supporting read_all() ↵Tom Rini
in extlinux / PXE"" This reverts commit 8bc3542384e3a1219e5ffb62b79d16dddc1b1fb9, reversing changes made to 698edd63eca090a2e299cd3facf90a0b97bed677. There are still problems with this series to work out. Link: https://lore.kernel.org/u-boot/CAFLszTjw_MJbK9tpzVYi3XKGazcv55auBAdgVzcAVUta7dRqcg@mail.gmail.com/ Signed-off-by: Tom Rini <trini@konsulko.com>
2025-04-03x86: Support a 64-bit ramdisk addressSimon Glass
Add some missing pieces to bootparams so that a 64-bit ramdisk address can be used. Tidy up the logging while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03x86: Add a new API for e820Simon Glass
The existing mechanism is pretty painful as it requires manual calculations for anything but a trivial setup. Add a new API for adding e820 entries. Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03x86: e820: Add a function to dump the e820 tableSimon Glass
There is already code for this in zimage. Move it to the e820 file so it can be used elsewhere. Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03x86: Correct msr operation on amd64Simon Glass
The CONFIG option is no-longer correct since we can have SPL and PPL with different bitness. Fix this and sync up with Linux 6.13 in this area, since this is where the code came from many years ago. Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03x86: Update cpuid_eax et al to work on amd64Simon Glass
The existing functions work but the register clobbers are wrong, so strange bugs results. The original functions were taken from a very old version of Linux. Update them from Linux 6.13 Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03x86: Add functions to convert between mtrr size and maskSimon Glass
Rather than repeating the same code in several places, add some functions which can do the conversion. Use the cpu_phys_address_size() function to obtain the physical-address size, since it is more reliable with kvm, where the host CPU may have a different value from the emulation CPU. Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03x86: Support CPU functions in long modeSimon Glass
At present it is not possible to find out the physical-address size in long mode, so a predefined value is used. Update the macros to support this properly, since it is important when programming MTRRs. Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03x86: Include stdbool.h in interrupt headerSimon Glass
This makes use of a 'bool' type, so include the required header. Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03x86: Add 64-bit entries to the GDTSimon Glass
At present it is not possible to execution 64-bit code without installing an entire new Global Descriptor Table. This is inconvenient since kvm does not seem to like switching into long mode with a new table. It isn't actually necessary, since we can just extend the existing table. Add some new entries to this effect. Signed-off-by: Simon Glass <sjg@chromium.org>
2025-03-18Merge patch series "pxe: Precursor series for supporting read_all() in ↵Tom Rini
extlinux / PXE" Simon Glass <sjg@chromium.org> says: This series includes some patches related to allowing read_all() to be used with the extlinux / PXE bootmeths. These patches were split out from the stb4 series, since it will need to have additional patches for LWIP, to avoid breaking PXE booting when LWIP is used. Link: https://lore.kernel.org/r/20250306002533.2380866-1-sjg@chromium.org
2025-03-18x86: Move the bootm state for zimage into cmd/Simon Glass
Rather than holding the state in the implementation code, move it to the command code. The state is now passed to the implementation functions and can there (with future work) be pass in from bootstd, without going through the commands. Signed-off-by: Simon Glass <sjg@chromium.org>
2025-03-18x86: Rename state to bmiSimon Glass
Use the common name for the struct, in preparation for passing it around between functions. Signed-off-by: Simon Glass <sjg@chromium.org>
2025-03-18x86: Move x86 zboot state into struct bootm_infoSimon Glass
This structure is supposed to handle any type of booting programmatically, i.e. without needing a command to be executed. Move the x86-specific members into it and use it instead of struct zboot_state. Provide a macro so access is possible without adding lots of #ifdefs to the code. This will allow the struct to be used for all four types of booting (bootm, bootz, booti and zboot). Call bootm_init() to init the state, to match other boot methods. Note that some rationalisation could be performed on this. But this is tricky since addresses are stored as strings in several places. Also some strings combine multiple arguments into one. So to keep this task somewhat manageable, we content ourselves with just getting everything into the same struct Signed-off-by: Simon Glass <sjg@chromium.org>
2025-03-18x86: Drop duplicate definition of zimage_dump()Simon Glass
This is now defined in bootm.h so drop the duplicate in the x86 code. Signed-off-by: Simon Glass <sjg@chromium.org>
2025-03-10common: clean up setjmp.hHeinrich Schuchardt
Separate setjmp.h into an architecture independent part and an architecture specific part. This simplifies moving from using struct jmp_buf_data directly to using type jmp_buf in our code which is the C compliant way. Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-01-22cpu: Provide a way to get the physical-address sizeSimon Glass
This concept exists on x86. Declare it as a generic function so that the value can be accessed by UPL. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-27Merge patch series "Implement ACPI on aarch64"Tom Rini
Patrick Rudolph <patrick.rudolph@9elements.com> says: Based on the existing work done by Simon Glass this series adds support for booting aarch64 devices using ACPI only. As first target QEMU SBSA support is added, which relies on ACPI only to boot an OS. As secondary target the Raspberry Pi4 was used, which is broadly available and allows easy testing of the proposed solution. The series is split into ACPI cleanups and code movements, adding Arm specific ACPI tables and finally SoC and mainboard related changes to boot a Linux on the QEMU SBSA and RPi4. Currently only the mandatory ACPI tables are supported, allowing to boot into Linux without errors. The QEMU SBSA support is feature complete and provides the same functionality as the EDK2 implementation. The changes were tested on real hardware as well on QEMU v9.0: qemu-system-aarch64 -machine sbsa-ref -nographic -cpu cortex-a57 \ -pflash secure-world.rom \ -pflash unsecure-world.rom qemu-system-aarch64 -machine raspi4b -kernel u-boot.bin -cpu cortex-a72 \ -smp 4 -m 2G -drive file=raspbian.img,format=raw,index=0 \ -dtb bcm2711-rpi-4-b.dtb -nographic Tested against FWTS V24.03.00. Known issues: - The QEMU rpi4 support is currently limited as it doesn't emulate PCI, USB or ethernet devices! - The SMP bringup doesn't work on RPi4, but works in QEMU (Possibly cache related). - PCI on RPI4 isn't working on real hardware since the pcie_brcmstb Linux kernel module doesn't support ACPI yet. Link: https://lore.kernel.org/r/20241023132116.970117-1-patrick.rudolph@9elements.com
2024-10-27acpi: Move function prototypePatrick Rudolph
Allow other architectures to use acpi_create_mcfg_mmconfig as well by moving the function prototype to common code. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Simon Glass <sjg@chromium.org>
2024-10-27acpi: x86: Move MADT to common codePatrick Rudolph
Write MADT in common code and let the SoC fill out the body by calling acpi_fill_madt() which must be implemented at SoC level. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2024-10-27acpi: x86: Write FADT in common codeMaximilian Brune
Write the FADT in common code since it's used on all architectures. Since the FADT is mandatory all SoCs or mainboards must implement the introduced function acpi_fill_fadt() and properly update the FADT. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2024-10-27acpi: x86: Move SPCR and DBG2 into common codeMaximilian Brune
This moves the SPCR and DBG2 table generation into common code, so that they can be used by architectures other than x86. Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com> Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2024-10-18x86: cpu: Add a few prototypes to the header fileAndy Shevchenko
The compiler is not happy to have no prototypes for the functions that are not defined static. Add them. This helps avoiding the compiler warnings: arch/x86/cpu/cpu.c:197:13: warning: no previous prototype for ‘board_final_init’ [-Wmissing-prototypes] arch/x86/cpu/cpu.c:205:13: warning: no previous prototype for ‘board_final_cleanup’ [-Wmissing-prototypes] arch/x86/cpu/cpu.c:307:5: warning: no previous prototype for ‘reserve_arch’ [-Wmissing-prototypes] Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2024-10-18x86: cpu: Use default print_cpuinfo() for allAndy Shevchenko
Most of the copies of the print_cpuinfo() call the default method. Remove all of those in order to have only the default one when no `cpu` command is compiled. This also helps avoiding compiler warning, e.g.: arch/x86/cpu/tangier/tangier.c:23:5: warning: no previous prototype for ‘print_cpuinfo’ [-Wmissing-prototypes] Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2024-10-18x86: Ensure the CPU identity exists for timer initSimon Glass
When bootstage is used the timer can be inited before the CPU identity is set up, resulting in the checks for the vendor not working. Add a special call to work around this. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-18x86: Show the CPU vendor in bdinfoSimon Glass
Refactor the cpu code and use it to show the CPU vendor, e.g. AuthenticAMD or GenuineIntel Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11arch: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILDSimon Glass
Use the new symbol to refer to any 'SPL' build, including TPL and VPL Signed-off-by: Simon Glass <sjg@chromium.org>
2024-09-03Merge patch series "net: dwc_eth_qos: Add glue driver for Intel MAC"Tom Rini
Philip Oberfichtner <pro@denx.de> says: This patch series implements the dwc_eth_qos glue driver for Intel SOCs. Before doing that, a few general adaptions to the dwc_eth_qos.c main driver are required. Most notably, the preparation for PCI based driver instances, which do not necessarily use a device tree.
2024-09-03x86: provide mb() macroPhilip Oberfichtner
Implement a x86 memory barrier mb(). Furthermore, remove the previously used mfence() function, which does the same thing. The mb() macro is now equivalent to Linux (v6.9): linux/arch/x86/include/asm/barrier.h Signed-off-by: Philip Oberfichtner <pro@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2024-08-15x86: Fix ptrdiff_t for x86_64Richard Weinberger
sbrk() assumes ptrdiff_t is large enough to enlarge/shrink the heap by LONG_MIN/LONG_MAX. So, use the long type, also to match the rest of the Linux ecosystem. Signed-off-by: Richard Weinberger <richard@nod.at> Reviewed-by: Simon Glass <sjg@chromium.org>
2024-07-15x86: Remove duplicate newlinesMarek Vasut
Drop all duplicate newlines. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-05-20Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"Tom Rini
As part of bringing the master branch back in to next, we need to allow for all of these changes to exist here. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-19Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""Tom Rini
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-07x86: Add missing <linux/types.h>Tom Rini
This file has many "Linux" style types in it, add <linux/types.h> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-06global: Make <asm/global_data.h> include <asm/u-boot.h>Tom Rini
This follows the example of RISC-V where <asm/global_data.h> includes <asm/u-boot.h> directly as "gd" includes a reference to bd_info already and so the first must include the second anyhow. We then remove <asm/u-boot.h> from all of the places which include references to "gd" an so have <asm/global_data.h> already. Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-06x86: Remove <common.h> and add needed includesTom Rini
Remove <common.h> from all x86 architecture files and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com>
2024-04-10Merge patch series "Complete decoupling of zboot logic from commands"Tom Rini
Simon Glass <sjg@chromium.org> says: This series refactors the zboot code to allow it to be used with CONFIG_COMMAND disabled. A new zboot_run() function is used to boot a zimage.
2024-04-10x86: zboot: Separate logic functions from commandsSimon Glass
Move zboot_start() and zboot_info() in with the other logic functions. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2024-04-10x86: zboot: Move command code into its own fileSimon Glass
Much of the code in zimage.c deals with the zboot command. Move it into a sepatate zboot.c file within the cmd/ directory. This will eventually allow use of the zimage logic without the command being enabled. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-04-10x86: zboot: Move zimage definitions to the header fileSimon Glass
In preparation for splitting the zboot-command code into a separate file, move the definitions into the header file. While we are here, mention when load_address and base_ptr are set up and explain bzimage_addr better. Make cmdline const since it cannot be changed. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-12-21global: Rework architecture global_data.h to include <linux/types.h>Tom Rini
In most cases, the architecture global data currently makes use of assorted linux types, but does not include <linux/types.h> to provide them. Add <linux/types.h> instead of relying on indirect inclusion. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2023-12-13acpi: move acpi_get_rsdp_addr() to acpi/acpi_table.hHeinrich Schuchardt
Function acpi_get_rsdp_addr() is needed on all architectures which write ACPI tables. Move the definition from the x86 include to an architecture independent one. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-11-28Merge patch series "Import "string" I/O functions from Linux"Tom Rini
To quote the author: This series imports generic versions of ioread_rep/iowrite_rep and reads/writes from Linux. Some cleanup is done to make sure that all platforms have proper defines for implemented functions and there are no redefinitions.
2023-11-28x86: Add defines for ins/outs functionsIgor Prusov
Add defines for {in,out}s{b,w,l}() functions to make sure that they will be used by asm-generic/io.h Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
2023-11-07x86: Drop <common.h> from remaining header filesTom Rini
None of these header files need to include <common.h> so we can just drop that entirely. Signed-off-by: Tom Rini <trini@konsulko.com>
2023-09-22Record the position of the SMBIOS tablesSimon Glass
Remember where these end up so that we can pass this information on to the EFI layer. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>