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path: root/drivers/clk/clk_zynqmp.c
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2025-07-08clk: zynqmp: Add support for dpll clock sourcePadmarao Begari
The clock driver fails to correctly calculate the PLL clock rate for peripherals when using the DPLL as the clock source. The DPLL operates within the full power domain, while peripheral clocks reside in the low power domain. To ensure accurate PLL clock rate computation when the peripheral clock source is set to DPLL, the DPLL-to-LPD cross divisor is used. Signed-off-by: Padmarao Begari <padmarao.begari@amd.com> Link: https://lore.kernel.org/r/20250618094329.296731-1-padmarao.begari@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2024-08-05clk: zynqmp: Add set_rate support for display clocksVenkatesh Yadav Abbarapu
If "assigned-clock-rates" property is included in the device tree, display driver probe is getting failed, as dp_video_ref till dp_stc_ref clocks are missing from set rate function, adding them to fix the probe failure. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20240711082939.29260-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2024-07-22drivers: clk: Remove duplicate newlinesMarek Vasut
Drop all duplicate newlines. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-05-20Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"Tom Rini
As part of bringing the master branch back in to next, we need to allow for all of these changes to exist here. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-19Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""Tom Rini
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-07clk: Remove <common.h> and add needed includesTom Rini
Remove <common.h> from this driver directory and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com>
2024-01-29treewide: Remove clk_freeSean Anderson
This function is a no-op. Remove it. Signed-off-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20231216193843.2463779-3-seanga2@gmail.com
2023-12-15clk: treewide: switch to clock dump from clk_opsIgor Prusov
Switch to using new dump operation in clock provider drivers instead of overriding soc_clk_dump. Tested-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Signed-off-by: Igor Prusov <ivprusov@sberdevices.ru> Link: https://lore.kernel.org/r/20231109105516.24892-8-ivprusov@sberdevices.ru
2023-12-13clk: zynqmp: enable topsw_lsbus clockVenkatesh Yadav Abbarapu
Display port is using topsw_lsbus clock, it is failing while enabling the clock, so enable the topsw_lsbus clock. Signed-off-by: Sreekanth Sunnam <sreekanth.sunnam@amd.com> Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20231204084515.9488-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-07-21clk: zynqmp: Add gem rx and tsu clocks to return registerAshok Reddy Soma
Add gem_tsu and gem0_rx till gem3_rx to return proper register from zynqmp_clk_get_register. Otherwise firmware won't be able to set clock for these due to incorrect register address. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230720072859.3724-1-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-07-21clk: zynqmp: Add set_rate support for gem rx and tsu clksAshok Reddy Soma
gem0_rx till gem3_rx and gem_tsu are missing from set rate function. Add them, so that they can be set from pmu firmware via clock framework. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230719084912.30209-1-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-07-21xilinx: Consolidate zynqmp_mmio_read/write in zynqmp_firmware.hMichal Simek
zynqmp_mmio_read/write() are firmware provided hooks that's why use only zynqmp_firmware.h for function declaration. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e7489556f9e447c737a578c169d7e1e43586a273.1687524706.git.michal.simek@amd.com
2023-06-12clk: zynqmp: Add fallthrough statement in the switch caseAlgapally Santosh Sagar
Add fallthrough statement in switch case to fix the sparse warning. In function 'zynqmp_clk_get_rate': warning: this statement may fall through [-Wimplicit-fallthrough=] Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20230519113816.22083-2-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-04-05clk: zynqmp: Add support for for DP audio/video clocksMichal Simek
Add support for getting rate for DP audio and video clocks. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/8792efe1fd9715f7c8a2e1e24f0454fb5b25d833.1648552434.git.michal.simek@xilinx.com
2022-01-05clk: zynqmp: Fix gem tx/rx/ref clock handlingMichal Simek
gemX_ref clock IDs starts at number 104. Till now it was at gemX_tx location which wasn't correct. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/d073e159b6316707306092a62bccb876cd89a602.1635506016.git.michal.simek@xilinx.com
2022-01-05clk: zynqmp: Add support for setting up clock for USBMichal Simek
USB range is not enabled but for setting up frequency it is needed. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/c55c423f48ca8f953a2dfbdcb25068278d8e5ad6.1635506016.git.michal.simek@xilinx.com
2021-07-26clk: zynqmp: Add support for enabling clock on lpd_lsbusMichal Simek
lpd_lsbus is clock which is used by many IPs like dmas, gems, gpio, sdhcis, spis, ttcs, uarts, watchdog that's why make sense to also enable access to change this clock. For this clock you already get the rate. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-03-30clk: zynqmp: Fix clk dump valuesT Karthik Reddy
With "clk dump" command, few clocks are showing up incorrect values and some clocks are displayed as "unknown". Add missing clocks to zynqmp clock driver to display proper clocks rates. Implement a simple way to get clock source, instead of calling functions. Change existing functions to this simple mechanism. Fix gem clock name "gem_rx" to "gem_tx" which was incorrect. Change dbf_fpd & dbf_lpd clk names to dbg_fpd & dbg_lpd. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
2021-02-23clk: zynqmp: Add support to enable clocksT Karthik Reddy
Add clock enable functionality in zynqmp clock driver to enable clocks from peripheral drivers using clk_ops. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-05dm: Rename DM_GET_DRIVER() to DM_DRIVER_GET()Simon Glass
In the spirit of using the same base name for all of these related macros, rename this to have the operation at the end. This is not widely used so the impact is fairly small. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass
This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-23xilinx: drivers: Use '_' instead of '-' in driver nameMichal Simek
The most of drivers are using '_' instead of '-' in driver name. That's why sync up these names to be aligned. It looks quite bad to see both in use. It is visible via dm tree command. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop log.h from common headerSimon Glass
Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05dm: core: Create a new header file for 'compat' featuresSimon Glass
At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05dm: core: Require users of devres to include the headerSimon Glass
At present devres.h is included in all files that include dm.h but few make use of it. Also this pulls in linux/compat which adds several more headers. Drop the automatic inclusion and require files to include devres themselves. This provides a good indication of which files use devres. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2019-10-24arm64: zynqmp: Switch to xlnx-zynqmp-clk headerMichal Simek
Use prepared header instead of hardcoded values. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19clk: zynqmp: Fixed the same if/else part error reported by coverityVipul Kumar
This patch fixed the same if/else part error by adding the required source select on the basis of is_pre_src check. Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTRTom Rini
We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-09clk: zynqmp: Add new compatible string for clock driverMichal Simek
New and old clk drivers are sharing IDs and descriptions. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23arm64: zynqmp: Print the value of pl clocks and wdt clock using clk dumpVipul Kumar
This patch print pl clocks (pl0...pl3) and watchdog clock using clk dump. Signed-off-by: Vipul Kumar <vipulk@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-02clk: zynqmp: Remove unused macros/variablesMichal Simek
These macros and one variable is not used anywhere that's why they should be removed. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-02clk: zynqmp: Dont panic incase of mmio write/read failuresSiva Durga Prasad Paladugu
Dont panic incase of mmio write/read failures instead return error and let the peripheral driver take care of clock get and set failures. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-02clk: zynqmp: Add support for CCF driverSiva Durga Prasad Paladugu
Add support for CCF, this CCF reads the ref clocks from dt and checks all the required clock control registers for its source , divisors and calculates the clock from them. This supports clock and set functions. Panic when read/write fails. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-01dm: Use dm.h header when driver mode is usedSimon Glass
This header includes things that are needed to make driver build. Adjust existing users to include that always, even if other dm/ includes are present Signed-off-by: Simon Glass <sjg@chromium.org>
2017-01-10clk: zynqmp: Add clock driver support for zynqmpSiva Durga Prasad Paladugu
Add basic clock driver support for zynqmp which sets the required clock for GEM controller Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.2.3 (git 2.0.4) at 2025-08-07 22:33:50 +0000