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path: root/drivers/fpga/zynqmppl.c
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2024-05-20Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"Tom Rini
As part of bringing the master branch back in to next, we need to allow for all of these changes to exist here. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-19Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""Tom Rini
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-07fpga: Remove <common.h> and add needed includesTom Rini
Remove <common.h> from this driver directory and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com>
2023-10-09arm64: zynqmp: Fix Siva's email address formatMichal Simek
Some patches didn't have his full name and also there was one more ">" at the end of email address. That's why correct both of these issues. Fixes: 174d728471d5 ("arm64: zynqmp: Switch to amd.com emails") Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e970cc0dfabe293c2baf6b231d34f3af0386f1eb.1695378830.git.michal.simek@amd.com
2023-07-21arm64: zynqmp: Switch to amd.com emailsMichal Simek
Update my and DPs email address to match current setup. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/aba5b19b9c5a95608829e86ad5cc4671c940f1bb.1688992543.git.michal.simek@amd.com
2023-03-09fpga: zynqmppl: fix fpga loads command for unencrypted use caseNeal Frager
When using the fpga loads command, the driver is passing the AES encryption key address is all cases. However, for the authenticated, but not encrypted use case, there is no AES encryption key, and this value is 0. When AES encryption is not used on the fpga bitstream, the pmufw assumes that the AES key address is a bitstream size value like what is used by the unsecure fpga load command. To fix the problem, this patch checks to see if the AES key address is zero. If the AES key address is zero, it means that AES is not being used on the bitstream and the bitstream size should be passed instead. Thus, matching the fpga load functionality. Signed-off-by: Neal Frager <neal.frager@amd.com> Acked-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230214131959.40298-1-neal.frager@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26fpga: zynqmp: support loading encrypted bitfilesAdrian Fiergolski
Add supporting new compatible string "u-boot,zynqmp-fpga-enc" to handle loading encrypted bitfiles. This feature requires encrypted FSBL, as according to UG1085: "The CSU automatically locks out the AES key, stored in either BBRAM or eFUSEs, as a key source to the AES engine if the FSBL is not encrypted. This prevents using the BBRAM or eFUSE as the key source to the AES engine during run-time applications." Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Co-developed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Link: https://lore.kernel.org/r/20220722141614.297383-14-oleksandr.suvorov@foundries.io Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26fpga: zynqmp: support loading authenticated imagesOleksandr Suvorov
Add supporting new compatible string "u-boot,zynqmp-fpga-ddrauth" to handle loading authenticated images (DDR). Based on solution by Jorge Ramirez-Ortiz <jorge@foundries.io> Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Tested-by: Ricardo Salveti <ricardo@foundries.io> Link: https://lore.kernel.org/r/20220722141614.297383-13-oleksandr.suvorov@foundries.io Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26fpga: zynqmp: add bitstream compatible checkingOleksandr Suvorov
Check whether the FPGA ZynqMP driver supports the given bitstream image type. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Tested-by: Ricardo Salveti <ricardo@foundries.io> Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Link: https://lore.kernel.org/r/20220722141614.297383-12-oleksandr.suvorov@foundries.io Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26fpga: zynqmp: reduce zynqmppl_load() codeOleksandr Suvorov
Reduce the function code by calling xilinx_pm_request() once only. Use the same variable bsize_req to store either bstream size in bytes or an address of bstream size according to a type required by the firmware version. Remove obsolete debug(). Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Tested-by: Ricardo Salveti <ricardo@foundries.io> Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Link: https://lore.kernel.org/r/20220722141614.297383-11-oleksandr.suvorov@foundries.io Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26fpga: xilinx: pass compatible flags to load() callbackOleksandr Suvorov
These flags may be used to check whether an FPGA driver is able to load a particular FPGA bitstream image. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Tested-by: Ricardo Salveti <ricardo@foundries.io> Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Link: https://lore.kernel.org/r/20220722141614.297383-10-oleksandr.suvorov@foundries.io Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26fpga: zynqmp: add str2flags callOleksandr Suvorov
Add a call to convert FPGA "compatible" string to a binary flag. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Tested-by: Ricardo Salveti <ricardo@foundries.io> Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Link: https://lore.kernel.org/r/20220722141614.297383-5-oleksandr.suvorov@foundries.io Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26fpga: add option for loading FPGA secure bitstreamsOleksandr Suvorov
It allows using this feature without enabling the "fpga loads" command. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Co-developed-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Tested-by: Ricardo Salveti <ricardo@foundries.io> Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Link: https://lore.kernel.org/r/20220722141614.297383-2-oleksandr.suvorov@foundries.io Signed-off-by: Michal Simek <michal.simek@amd.com>
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2020-09-23fpga: zynqmp: Protect zynqmp_loads() for SPLMichal Simek
if conditions should match. Fixes: a18d09ea384f ("fpga: zynqmp: Add secure bitstream loading for ZynqMP") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23fpga: zynqmp: Get rid of ZYNQMP_SIP_SVC* macrosMichal Simek
There is no need to use these macros because enum pm_api_id can be used instead. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24arm64: xilinx: Print fpga error value in hexT Karthik Reddy
Fpga returns error value when fails, error status should be printed in hex format. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-05-18common: Drop linux/bitops.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop log.h from common headerSimon Glass
Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop net.h from common headerSimon Glass
Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org>
2019-12-02common: Move ARM cache operations out of common.hSimon Glass
These functions are CPU-related and do not use driver model. Move them to cpu_func.h Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-10-24arm64: zynqmp: Convert invoke_smc() to xilinx_pm_request()Michal Simek
Remove macros which use PM_SIP_SVC offset and convert invoke_smc() to xilinx_pm_request() which do calculation with PM_SIP_SVC already. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: zynqmp: use firmware driver to get versionIbai Erkiaga
Use the new function from firmware version to get the firmware version. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08firmware: zynqmp: create firmware headerIbai Erkiaga
New firmware header to place firmware specific macro and function declarations. The patch also moves the macros defining PM operations as well as some helper macros. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08fpga: zynqmp: Fix second local variable declarationMichal Simek
No reason to define new_buf again. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24fpga: zynqmp: show an error message when FPGA programming failsLuca Ceresoli
When FPGA programming fails, it does so silently, unless debugging code is enabled. This makes it hard to detect problems in production environments. Print the error message unconditionally so the error doesn't go unnoticed. Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-09-26fpga: zynqmp: Modify PL bitstream loading sequenceSiva Durga Prasad Paladugu
This patch modifies PL bitstream loading sequence as per latest Xilfpga which supports all variants of bitstream images generated from vivado and from bootgen. With this new change in Xilfpga, uboot doesn't need to validate and swap bitstream as it will be taken care inside Xilfpga. ZynqMP PL driver now checks for supporting PMUFW version before skipping the validation and swap sequence as there can be old PMUFW which doesn't supports this feature. In this case, driver uses old way of PL bitstream loading sequence. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-01fpga: zynqmp: Add secure bitstream loading for ZynqMPSiva Durga Prasad Paladugu
This patch adds support for loading secure bitstreams on ZynqMP platforms. The secure bitstream images has to be generated using Xilinx bootgen tool. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-09fpga: zynqmp: Fix the nonsecure bitstream loading issueSiva Durga Prasad Paladugu
Xilfpga library expects the size of bitstream in a pointer but currenly we are passing the size as a value. This patch fixes this issue. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Nava kishore Manne <navam@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09fpga: zynqmp: Update zynqmp_load() as per latest xilfpgaSiva Durga Prasad Paladugu
Latest xilfpga expects to set BIT5 of flags for nonsecure bitsream and also expects length in bytes instead of words This patch does the same. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-04-09fpga: zynqmp: Add support to get the PCAP status for fpga info commandNitin Jain
This patch adds support for ZynqMP platform to print FPGA PCAP status for "fpga status" command. Signed-off-by: Nitin Jain <nitinj@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-20fpga: zynqmppl: Reuse invoke_smc routineSiva Durga Prasad Paladugu
Reuse invoke_smc() routine which is already defined instead of duplicating same at multiple places. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-09-22fpga: xilinx: zynqmp: Add PL bitstream download support for ZynqMPSiva Durga Prasad Paladugu
Add PL bitstream dowload support for ZynqMP Bitstream will be validated by uboot and loaded to PL by invoking an smc instruction to ATF which route this request to PMU FW which will take care of loading it to PL Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
generated by cgit v1.2.3 (git 2.0.4) at 2025-07-21 04:27:00 +0000