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path: root/drivers/spi/renesas_rpc_spi.c
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2024-12-11spi: renesas: Fix R-Car spellingMarek Vasut
The correct spelling is R-Car, including the dash, update the usage. Kconfig strings and comment changes only, no functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-09-09mtd: spi: renesas: Add R-Car Gen4 DT compatibleMarek Vasut
Add device tree compatible string "renesas,rcar-gen4-rpc-if" to the driver to match on upstream RPC DT node in R-Car Gen4 DTs. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-09-09mtd: spi: renesas: Configure RPC PHY timing registersMarek Vasut
Make sure RPC PHY timing registers are configured before performing bus access. These registers might have been left unconfigured or may have been configured by a prior stage bootloader and leaving them unconfigured or misconfigured would interfere with U-Boot operation. Set PHYOFFSET1 DDRTMG field to 3 which enables DDR timing adjustment when SPIDRE or DRDRE = 0 and set PHYOFFSET2 OCTTMG field to 4 which makes the interface operate in Serial flash or HyperFlash mode. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-09-09mtd: spi: renesas: Configure DRDRENR registerMarek Vasut
Make sure DRDRENR register is configured before performing external address space read. This register might have been configured by a prior stage bootloader and leaving it unconfigured would interfere with U-Boot operation. Since U-Boot RPC SPI driver does not support DDR data transfer mode yet, set this register unconditionally to 0. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-09-09mtd: spi: renesas: Write DRDMCR register onceMarek Vasut
Instead of writing DRDMCR with 0 first and then overwriting DRDMCR again in case any dummy bytes have to be sent out, write DRDMCR in every case with the amount of dummy bytes that have to be sent out. In case no dummy bytes have to be sent out, the value written into DRDMCR is zero, so no dummy bytes are sent out. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-09-09mtd: spi: renesas: Write DREAR register onceMarek Vasut
Instead of writing DREAR with 0 first and then overwriting DREAR again in case of 4 byte addressing mode, write DREAR in every case once with the correct content right away. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-05-20Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"Tom Rini
As part of bringing the master branch back in to next, we need to allow for all of these changes to exist here. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-19Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""Tom Rini
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-07spi: Remove <common.h> and add needed includesTom Rini
Remove <common.h> from this driver directory and when needed add missing include files directly. Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-03-02ARM: renesas: Rename RMOBILE_CPU_TYPE_* to RENESAS_CPU_TYPE_*Marek Vasut
Rename RMOBILE_CPU_TYPE_* to RENESAS_CPU_TYPE_* because all the chips are made by Renesas, while only a subset of them is from the R-Mobile line. Use the following command to perform the rename: " $ git grep -l '\<RMOBILE_CPU_TYPE_[A-Z0-9]\+\>' | \ xargs -I {} sed -i 's@\<RMOBILE\(_CPU_TYPE_[A-Z0-9]\+\)\>@RENESAS\1@g' {} " Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2024-03-02ARM: renesas: Rename rmobile_get_cpu_rev_*() to renesas_get_cpu_rev_*()Marek Vasut
Rename rmobile_get_cpu_rev_*() to renesas_get_cpu_rev_*() because all the chips are made by Renesas, while only a subset of them is from the R-Mobile line. Use the following command to perform the rename: " $ git grep -l '\<rmobile_get_cpu_rev_\(integer\|fraction\)\>' | \ xargs -I {} sed -i 's@\<rmobile_get_cpu_rev_\(integer\|fraction\)\>@renesas_get_cpu_rev_\1@g' {} " Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2024-03-02ARM: renesas: Rename rmobile_get_cpu_type() to renesas_get_cpu_type()Marek Vasut
Rename rmobile_get_cpu_type() to renesas_get_cpu_type() because all the chips are made by Renesas, while only a subset of them is from the R-Mobile line. Use the following command to perform the rename: " $ git grep -l '\<rmobile_get_cpu_type\>' | \ xargs -I {} sed -i 's@\<rmobile_get_cpu_type\>@renesas_get_cpu_type@g' {} " Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2024-02-10mtd: spi: renesas: Add R8A779H0 V4M supportHai Pham
Support RPC SPI on R8A779H0 V4M SoC. Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-06-10mtd: spi: renesas: Add 4 bytes address mode supportCong Dang
This patch adds 4-byte address mode support. Because traditional access based on FIFO/shift register, it's complex to specify information like opcode, address length, dummy bytes etc to flash. Replace the traditional access by spi-mem layer which is essential to make 4-byte address mode support possible. Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Cong Dang <cong.dang.xn@renesas.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-06-10mtd: spi: renesas: Add R-Car Gen4 supportHai Pham
Support RPC SPI on R-Car Gen4 R8A779F0 S4 and R8A779G0 V4H SoCs. Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> [Marek: Squash S4 and V4H patches, fix brackets around STRTIM2]
2023-06-10mtd: spi: renesas: Extract strobe delay setting code into separate functionHai Pham
Move strobe delay setting code into extra function and reflect the latest setting in datasheet (R-Car Gen3 v2.20, R-Car V3U v0.50). i.e. STRTIM[2:0] should be set to 110 (RCar M3-W) or 111 (Other products) This is also a preparation for new R-Car Gen4 SoC which has 4-bits STRTIM Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Fix for RZ/A1
2022-09-02renesas: Fix RPC-IF compatible valuesGeert Uytterhoeven
The compatible values used for device nodes representing Renesas Reduced Pin Count Interfaces were based on preliminary versions of the Device Tree Bindings. Correct them in both DTSi files and drivers, to match the final DT Bindings. Note that there are no DT bindings for RPC-IF on RZ/A1 yet, hence the most logical SoC-specific value is used, without specifying a family-specific value. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2020-12-13dm: treewide: Rename ..._platdata variables to just ..._platSimon Glass
Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename ofdata_to_platdata() to of_to_plat()Simon Glass
This name is far too long. Rename it to remove the 'data' bits. This makes it consistent with the platdata->plat rename. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename dev_get_platdata() to dev_get_plat()Simon Glass
Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename 'platdata' variables to just 'plat'Simon Glass
We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass
This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-20spi: renesas_rpc_spi: Add R-Car Gen3 and RZ/G2 fallback compatibility stringBiju Das
Add fallback compatibility string for R-Car Gen3 and RZ/G2. Also sorted the compatible string as per SoC ID. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
2020-05-18common: Drop linux/bitops.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop linux/bug.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2019-05-07spi: rpc: Add support for operation without clock frameworkMarek Vasut
Add ifdeffery to allow operation without the clock framework enabled. This is required on RZ/A1, as it does not have clock driver yet. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-11mtd: spi: Add Renesas RPC SPI-flash driverMarek Vasut
Add driver for the RPC block in SPI-flash mode. This driver allows access to a SPI NOR flash attached to the RPC block and does not support RPC in Hyperflash mode. Note that this block is extremely selective when communicating with the SPI NOR. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>