diff options
Diffstat (limited to 'arch/riscv/include')
| -rw-r--r-- | arch/riscv/include/asm/arch-th1520/cpu.h | 9 | ||||
| -rw-r--r-- | arch/riscv/include/asm/arch-th1520/iopmp.h | 42 | ||||
| -rw-r--r-- | arch/riscv/include/asm/arch-th1520/spl.h | 10 | ||||
| -rw-r--r-- | arch/riscv/include/asm/global_data.h | 19 | ||||
| -rw-r--r-- | arch/riscv/include/asm/insn-def.h | 6 | ||||
| -rw-r--r-- | arch/riscv/include/asm/u-boot.h | 4 |
6 files changed, 87 insertions, 3 deletions
diff --git a/arch/riscv/include/asm/arch-th1520/cpu.h b/arch/riscv/include/asm/arch-th1520/cpu.h new file mode 100644 index 00000000000..837f0b8d06b --- /dev/null +++ b/arch/riscv/include/asm/arch-th1520/cpu.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright (c) 2025 Yao Zi <ziyao@disroot.org> + */ + +#ifndef _ASM_TH1520_CPU_H_ +#define _ASM_TH1520_CPU_H_ +void th1520_invalidate_pmp(void); +#endif /* _ASM_TH1520_CPU_H_ */ diff --git a/arch/riscv/include/asm/arch-th1520/iopmp.h b/arch/riscv/include/asm/arch-th1520/iopmp.h new file mode 100644 index 00000000000..3dc766b5bff --- /dev/null +++ b/arch/riscv/include/asm/arch-th1520/iopmp.h @@ -0,0 +1,42 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2025 Yao Zi <ziyao@disroot.org> + */ +#ifndef _ASM_ARCH_TH1520_IOPMP_H_ +#define _ASM_ARCH_TH1520_IOPMP_H_ + +#define TH1520_IOPMP_EMMC (void *)0xfffc0280c0 +#define TH1520_IOPMP_SDIO0 (void *)0xfffc0290c0 +#define TH1520_IOPMP_SDIO1 (void *)0xfffc02a0c0 +#define TH1520_IOPMP_USB0 (void *)0xfffc02e0c0 +#define TH1520_IOPMP_AO (void *)0xffffc210c0 +#define TH1520_IOPMP_AUD (void *)0xffffc220c0 +#define TH1520_IOPMP_CHIP_DBG (void *)0xffffc370c0 +#define TH1520_IOPMP_EIP120I (void *)0xffff2200c0 +#define TH1520_IOPMP_EIP120II (void *)0xffff2300c0 +#define TH1520_IOPMP_EIP120III (void *)0xffff2400c0 +#define TH1520_IOPMP_ISP0 (void *)0xfff40800c0 +#define TH1520_IOPMP_ISP1 (void *)0xfff40810c0 +#define TH1520_IOPMP_DW200 (void *)0xfff40820c0 +#define TH1520_IOPMP_VIPRE (void *)0xfff40830c0 +#define TH1520_IOPMP_VENC (void *)0xfffcc600c0 +#define TH1520_IOPMP_VDEC (void *)0xfffcc610c0 +#define TH1520_IOPMP_G2D (void *)0xfffcc620c0 +#define TH1520_IOPMP_FCE (void *)0xfffcc630c0 +#define TH1520_IOPMP_NPU (void *)0xffff01c0c0 +#define TH1520_IOPMP_DPU0 (void *)0xffff5200c0 +#define TH1520_IOPMP_DPU1 (void *)0xffff5210c0 +#define TH1520_IOPMP_GPU (void *)0xffff5220c0 +#define TH1520_IOPMP_GMAC1 (void *)0xfffc0010c0 +#define TH1520_IOPMP_GMAC2 (void *)0xfffc0020c0 +#define TH1520_IOPMP_DMAC (void *)0xffffc200c0 +#define TH1520_IOPMP_TEE_DMAC (void *)0xffff2500c0 +#define TH1520_IOPMP_DSP0 (void *)0xffff0580c0 +#define TH1520_IOPMP_DSP1 (void *)0xffff0590c0 +#define TH1520_IOPMP_AUDIO (void *)0xffffc220c0 +#define TH1520_IOPMP_AUDIO0 (void *)0xffcb02e0c0 +#define TH1520_IOPMP_AUDIO1 (void *)0xffcb02f0c0 + +#define TH1520_IOPMP_DEFAULT_ATTR 0xffffffff + +#endif // _ASM_ARCH_TH1520_IOPMP_H_ diff --git a/arch/riscv/include/asm/arch-th1520/spl.h b/arch/riscv/include/asm/arch-th1520/spl.h new file mode 100644 index 00000000000..59aed8cad62 --- /dev/null +++ b/arch/riscv/include/asm/arch-th1520/spl.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2025 Yao Zi <ziyao@disroot.org> + */ +#ifndef _ASM_ARCH_TH1520_SPL_H_ +#define _ASM_ARCH_TH1520_SPL_H_ + +void spl_dram_init(void); + +#endif // _ASM_ARCH_TH1520_SPL_H_ diff --git a/arch/riscv/include/asm/global_data.h b/arch/riscv/include/asm/global_data.h index d356752a56a..47b5e2cfc8f 100644 --- a/arch/riscv/include/asm/global_data.h +++ b/arch/riscv/include/asm/global_data.h @@ -14,6 +14,7 @@ #include <asm/smp.h> #include <asm/u-boot.h> #include <compiler.h> +#include <config.h> /* Architecture-specific global data */ struct arch_global_data { @@ -47,8 +48,26 @@ struct arch_global_data { #include <asm-generic/global_data.h> +#if defined(__clang__) || CONFIG_IS_ENABLED(LTO) + +#define DECLARE_GLOBAL_DATA_PTR +#define gd get_gd() + +static inline gd_t *get_gd(void) +{ + gd_t *gd_ptr; + + __asm__ volatile ("mv %0, gp\n" : "=r" (gd_ptr)); + + return gd_ptr; +} + +#else + #define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("gp") +#endif + static inline void set_gd(volatile gd_t *gd_ptr) { #ifdef CONFIG_64BIT diff --git a/arch/riscv/include/asm/insn-def.h b/arch/riscv/include/asm/insn-def.h index 19a10cad84c..1869342b167 100644 --- a/arch/riscv/include/asm/insn-def.h +++ b/arch/riscv/include/asm/insn-def.h @@ -5,8 +5,8 @@ * Ported from linux insn-def.h. */ -#ifndef _ASM_RISCV_BARRIER_H -#define _ASM_RISCV_BARRIER_H +#ifndef _ASM_RISCV_INSN_DEF_H +#define _ASM_RISCV_INSN_DEF_H #define INSN_I_SIMM12_SHIFT 20 #define INSN_I_RS1_SHIFT 15 @@ -36,4 +36,4 @@ __INSN_I(RV_##opcode, RV_##func3, RV_##rd, \ RV_##rs1, RV_##simm12) -#endif /* _ASM_RISCV_BARRIER_H */ +#endif /* _ASM_RISCV_INSN_DEF_H */ diff --git a/arch/riscv/include/asm/u-boot.h b/arch/riscv/include/asm/u-boot.h index d5e1d5f3231..a90cc4c21cf 100644 --- a/arch/riscv/include/asm/u-boot.h +++ b/arch/riscv/include/asm/u-boot.h @@ -23,6 +23,10 @@ #include <asm/u-boot-riscv.h> /* For image.h:image_check_target_arch() */ +#ifdef CONFIG_64BIT +#define IH_ARCH_DEFAULT IH_ARCH_RISCV64 +#else #define IH_ARCH_DEFAULT IH_ARCH_RISCV +#endif #endif /* _U_BOOT_H_ */ |