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3 daysarmv8: ls1043a: make some erratas dependent from USBHolger Brunck
These erratas are only useful if USB is enabled. If it is disabled these erratas might cause issues. Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com>
9 daysglobal: Make ARCH_MISC_INIT a selected symbolTom Rini
This symbol is not something that the user should be enabling or disabling but rather the developer for a particular board should select it when required. This is mostly size neutral, however a few places do have changes. In the case of i.MX6ULL systems, it is always the case that arch_misc_init() could call setup_serial_number() and do useful work, but was not enabled widely, but now is. In the case of i.MX23/28 systems, we should be able to call mx28_fixup_vt() again here, so do so. Finally, some platforms were calling arch_misc_init() and then not doing anything and this results in removing the option. Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-24sunxi: add support for the Allwinner A100/A133 SoCAndre Przywara
The Allwinner A100 SoC has been around for a while, mostly on cheap tablets, but didn't generate much interest in the community so far. There were some efforts by two Allwinner employees in 2020, which led to basic upstream Linux support for that SoC, although this momentum dried up pretty quickly, leaving a lot of peripherals unsupported. The A100 was silently replaced with the seemingly identical Allwinner A133, which is reportedly a better bin of the A100. So far we assume that both are compatible from a software perspective. There are some more devices with the A133 out there now, so people are working on filling the gaps, and adding U-Boot (and TF-A) support. Based on the just added pinctrl, clock and DRAM support, this adds the missing bits, mostly addresses and values for the SPL. The A133 seems to be an predecessor to the H6, so we can share a lot of code with that (and the H616 code), and just need to adjust some details. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2025-06-20Merge patch series "Consistent Kconfig environment options CONFIG_ENV_ prefix"Tom Rini
Marek Vasut <marek.vasut+renesas@mailbox.org> says: Rename the environment related variables and add ENV_ prefix, so that all configuration options which are related to environment would have an CONFIG_ENV_ prefix. No functional change. Link: https://lore.kernel.org/r/20250609192701.20260-1-marek.vasut+renesas@mailbox.org
2025-06-20env: Rename SYS_MMC_ENV_DEV to ENV_MMC_DEVICE_INDEXMarek Vasut
Rename the variable and add ENV_ prefix, so that all configuration options which are related to environment would have an CONFIG_ENV_ prefix. No functional change. Use ENV_MMC_DEVICE_INDEX to clarify this is the SD/MMC device index, a number, as enumerated by U-Boot. Update the help text accordingly. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-06-11ARM: stm32: Fix SYSRAM size on STM32MP13xxMarek Vasut
The STM32MP13xx has only 128 kiB of SYSRAM starting at address 0x2ffe0000 . The STM32MP15xx has 256 kiB of SYSRAM starting at address 0x2ffc0000 . Make sure both SoCs configure ARMV7_SECURE_BASE correctly . Define the SYSRAM base in stm32.h to be consistent with the STM32MP15xx macro. Signed-off-by: Marek Vasut <marek.vasut@mailbox.org> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-06-09Merge tag 'v2025.07-rc4' into nextTom Rini
Prepare v2025.07-rc4
2025-06-09arm: armv7: restore section to .text after saved_argsYang Xiwen
when CONFIG_BLOBLIST is enabled, the section is switched to .data but is not switched back to .text. It makes all the code below placed in .data section, also breaks CONFIG_POSITION_INDEPENDENT. Fix it by adding `.section .text` to switch the section back to .text. Fixes: 5103e69344d6 ("arm: armv7: save boot arguments") Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
2025-06-05armv8: fix Clang warning on writing 32-bit variable to a 64-bit registerRaymond Mao
Clang is stricter than GCC when it comes to inline assembly and expects the register to be written with explicitly same type of variable. Fixes: c0e1775a867c ("armv8: Add arch-specific sysinfo platform driver") Signed-off-by: Raymond Mao <raymond.mao@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-06-02ARM: Align image end to 8 bytes to fit DT alignmentMarek Vasut
Align U-Boot image end to 8 bytes to make sure DT alignment requirement is fulfilled. This fixes a possible failure in fdt_find_separate() in case the U-Boot image is aligned to 4 Bytes and DT is appended at the end at already 8 Byte aligned offset. Link: https://source.denx.de/u-boot/u-boot/-/issues/30 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
2025-05-29Merge patch series "Start removing <env.h> from headers when not required"Tom Rini
Tom Rini <trini@konsulko.com> says: Given Simon's series at [1] I started looking in to what brings in <env.h> when not strictly required and in turn has some unintended implicit includes. This series takes care of the places where, commonly, <linux/string.h> or <env.h> itself were required along with a few other less common cases. This sets aside for the moment what to do about net-common.h and env_get_ip() as I'm not entirely sure what's best there. [1]: https://patchwork.ozlabs.org/project/uboot/list/?series=454939&state=* Link: https://lore.kernel.org/r/20250514225002.15361-1-trini@konsulko.com
2025-05-29global: Avoid indirect inclusion of <env.h> from <command.h>Tom Rini
The include file <command.h> does not need anything from <env.h>. Furthermore, include/env.h itself includes other headers which can lead to longer indirect inclusion paths. To prepare to remove <env.h> from <command.h> fix all of the places which had relied on this indirect inclusion to instead include <env.h> directly. Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org> # android, bcb Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> # spawn Signed-off-by: Tom Rini <trini@konsulko.com>
2025-05-22arm: cpu: armv7m: add ENTRY/ENDPROC macrosJohannes Krottmayer
Since GNU binutils version 2.44, assembly functions must include the assembler directive .type name, %function. If not a call to these functions fails with the error message 'Unknown destination type (ARM/Thumb)' and the error message 'dangerous relocation: unsupported relocation' at linking. The macros ENTRY/ENDPROC includes this directive and should be used for all assembly functions. Signed-off-by: Johannes Krottmayer <johannes@krotti42.com> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2025-04-28sunxi: armv8: FEL: save and restore SP_IRQAndre Przywara
Thanks for Jernej's JTAG debugging effort, it turns out that the BROM expects SP_IRQ to be saved and restored, when we want to enter back into FEL after the SPL's AArch64 stint. Save and restore SP_IRQ as part of the FEL state handling. The banked MRS/MSR access to SP_IRQ, without actually being in IRQ mode, was introduced with the ARMv7 virtualisation extensions. The Arm Cortex-A8 cores used in the A10/A13s or older F1C100s SoCs would not support that, but this code here is purely in the ARMv8/AArch64 code path, so it's safe to use unconditionally. Reported-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2025-04-28sunxi: armv8: FEL: save and restore GICv3 registersAndre Przywara
To be able to return to the BootROM FEL USB debug code, we must restore the core's state as accurately as possible after the SPL has been run. Since the BootROM runs in AArch32, but the SPL uses AArch64, this requires a core reset, which clears the core's state. So far we were saving and restoring the required registers like SCTLR and VBAR, but could ignore the interrupt controller's state (GICC), since that lives in MMIO registers, unaffected by a core reset. Newer Allwinner SoCs now feature a GICv3 interrupt controller, which keeps some GIC state in architected system registers, and those are cleared when we switch back to AArch32. To enable FEL operation on the Allwinner A523 SoC, Add AArch32 assembly code to save and restore the ICC_PMR and ICC_IGRPEN1 system registers. The other GICv3 sysregs are either not relevant for the BROM operation, or haven't been changed from their reset defaults by the BROM anyway. This enables FEL operation on the Allwinner A523 family of SoCs. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2025-04-15spin_table: add missing header for ENODEV and ENOSPC symbolsyan wang
Add the necessary header as <common.h> is removed Signed-off-by: yan wang <yan.wang@softathome.com>
2025-04-11Merge patch series "Switch to using $(PHASE_) in Makefiles"Tom Rini
Tom Rini <trini@konsulko.com> says: This series switches to always using $(PHASE_) in Makefiles when building rather than $(PHASE_) or $(XPL_). It also starts on documenting this part of the build, but as a follow-up we need to rename doc/develop/spl.rst and expand on explaining things a bit. Link: https://lore.kernel.org/r/20250401225851.1125678-1-trini@konsulko.com
2025-04-11Kbuild: Always use $(PHASE_)Tom Rini
It is confusing to have both "$(PHASE_)" and "$(XPL_)" be used in our Makefiles as part of the macros to determine when to do something in our Makefiles based on what phase of the build we are in. For consistency, bring this down to a single macro and use "$(PHASE_)" only. Signed-off-by: Tom Rini <trini@konsulko.com>
2025-04-10armv8: start.S: Subordinate CPUs psci setup vectorXu Zhang
As current design, only Manager CPU called armv8_setup_psci() before jump to next stage(such as Linux Kernel), Subordinate CPUs also need setup psci vector to handle trap request which comes from higher EL level. Signed-off-by: Xu Zhang <423756212@qq.com> [trini: Guard with !CONFIG_XPL_BUILD check]
2025-04-04arm64: Fix page permissions for platforms running at EL2Ilias Apalodimas
We currently set both and print both PXN and UXN bits when removing execution for pages. This happens even in the existing per platform definitions of 'struct mm_region'. That's not entirely correct though. For stage-1 translations, if a platform runs on a translation regime with a single privilege level or the the translation regime supports two privilege levels and we are not in EL1&0 with HCR_EL2.{NV, NV1} = {1, 1} only BIT54 (XN) is needed and BIT53(PXN) is reserved 0. Currently we support Non-Secure EL2, Non-secure EL2&0 and Non-secure EL1&0. We already have get_effective_el() which returns 1 if we are - Running in EL1 so we assume an EL1 translation regime but without checking HCR_EL2.{NV, NV1} != {1,1} - Running in EL2 with HCR_EL2.E2H = 1 The only problem with the above is that if we are in EL1&0 and HCR_EL2.{NV1, NV} == {1, 1}, then - Bit[54] holds the PXN instead of the UXN - The Effective value of UXN is 0 - Bit[53] is RES0 So let's re-use that function and set PXN only when we are in and EL[2|1]&0 translation regime. Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-04-02Merge patch series "Various toolchain compatibility fixes/improvements"Tom Rini
Sam Edwards <cfsworks@gmail.com> says: This is v2 of my "misc. fixes" series, sent to prepare the codebase for more direct LLVM support in the near future. This series contains several fixes that I found in the process of preparing that support and which address issues independent of any future feature or enhancement. I am sending these now, both so that their inclusion is not delayed by discussion on my upcoming series and to make the latter more manageable. Link: https://lore.kernel.org/r/20250315221813.1265193-1-CFSworks@gmail.com
2025-04-02arm: Discard unwanted sections in linker scriptSam Edwards
There are a handful of sections that are not useful in the U-Boot output binary. At present, the linker script moves these to the end of the binary, after the _image_binary_end marker symbol, so that they don't get loaded. The linker script syntax supports discarding sections that shouldn't be included in the output. Switch to this instead, to make the intention clearer and reduce the ELF sections that have to be handled later in the build. This is also consistent with the other architectures' linker scripts. Signed-off-by: Sam Edwards <CFSworks@gmail.com> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-04-02arm: Remove stray .mmutable reference in linker scriptSam Edwards
The .mmutable section was deprecated in 2012 [1] and finally removed entirely from U-Boot in 2022 [2], so this special handling is no longer necessary. Remove it to tidy up the linker script. [1]: dde3b70dcf3d ("arm: add a common .lds link script") [2]: 3135ba642f9a ("arm: pxa: Remove CONFIG_CPU_PXA25X") Signed-off-by: Sam Edwards <CFSworks@gmail.com> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-03-27sunxi: armv8: fel: move fel_stash variable to the frontAndre Przywara
To return a 64-bit Allwinner chip back to the 32-bit BootROM code, we have some embedded AArch32 code that restores the CPU state, before branching back to the BootROM. At the moment the pointer to the buffer with that state is located *after* the code, which makes the PC relative code fragile: adding or removing instructions will change the distance to that pointer variable. The "new" Allwinner A523 SoC requires more state to be restored (GICv3 system registers), but we must do that *only* on that SoC. Conditional compilation sounds like the easiest solution, but would mean that the distance to that pointer would change. Solve this rather easily by moving the pointer to the *front* of the code: we load that pointer in the first instruction, so the distance would always stay the same. Later in the code we won't need PC relative addressing anymore, so this code can grow or shrink easily, for instance due to conditional compilation. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2025-03-14treewide: Add a function to change page permissionsIlias Apalodimas
For armv8 we are adding proper page permissions for the relocated U-Boot binary. Add a weak function that can be used across architectures to change the page permissions Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on AML-S905X-CC Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-03-14arm64: mmu_change_region_attr() add an option not to break PTEsIlias Apalodimas
The ARM ARM (Rev L.a) on section 8.17.1 describes the cases where break-before-make is required when changing live page tables. Since we can use a function to tweak block and page permissions, where BBM is not required split the existing mmu_change_region_attr() into two functions and create one that doesn't require BBM. Subsequent patches will use the new function to map the U-Boot binary with proper page permissions. While at it add function descriptions in their header files. Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-03-14arm: Prepare linker scripts for memory permissionsIlias Apalodimas
Upcoming patches are switching the memory mappings to RW, RO, RX after the U-Boot binary and its data are relocated. Add annotations in the linker scripts to and mark text, data, rodata sections and align them to a page boundary. It's worth noting that .efi_runtime memory permissions are left untouched for now. There's two problems with EFI currently. The first problem is that we bundle data, rodata and text in a single .efi_runtime section which also must be close to .text for now. As a result we also dont change the permissions for anything contained in CPUDIR/start.o. In order to fix that we have to decoule .text_rest, .text and .efi_runtime and have the runtime services on their own section with proper memory permission annotations (efi_rodata etc). The efi runtime regions (.efi_runtime_rel) can be relocated by the OS when the latter is calling SetVirtualAddressMap. Which means we have to configure those pages as RX for U-Boot but convert them to RWX just before ExitBootServices. It also needs extra code in efi_tuntime relocation code since R_AARCH64_NONE are emitted as well if we page align the section. Due to the above ignore EFI for now and fix it later once we have the rest in place. Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on AML-S905X-CC Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-03-14meminfo: add memory details for armv8Ilias Apalodimas
Upcoming patches are mapping memory with RO, RW^X etc permsissions. Fix the meminfo command to display them properly Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-03-13Merge patch series "xPL-stack cleanup"Tom Rini
Simon Glass <sjg@chromium.org> says: This series was split from the VBE part H series. It adjusts the logic for selecting the top of the stack so that it is more consistent across xPL phases. Link: https://lore.kernel.org/r/20250228122042.1277079-1-sjg@chromium.org
2025-03-13spl: Use CONFIG_VAL() to obtain the SPL stackSimon Glass
Now that we have the same option for SPL and TPL, simplify the logic for determining the initial stack. Note that this changes behaviour as current SPL_STACK is a fallback for TPL. However, that was likely unintended and can be handled with Kconfig defaults if needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Suggested-by: Tom Rini <trini@konsulko.com>
2025-03-13spl: Add an SPL_HAVE_INIT_STACK optionSimon Glass
At present there is a hex value SPL_STACK which both determines whether SPL has its own initial stack and the hex value of that stack. Split off the former into SPL_HAVE_INIT_STACK with SPL_STACK depending on that and only providing the latter. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Resync defconfig files]
2025-03-10arm: use type jmp_buf instead of struct jmp_buf_dataHeinrich Schuchardt
Instead of using the implementation specific struct jmp_buf_data use the standard compliant type jmp_buf when switching exception levels. Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-03-10common: clean up setjmp.hHeinrich Schuchardt
Separate setjmp.h into an architecture independent part and an architecture specific part. This simplifies moving from using struct jmp_buf_data directly to using type jmp_buf in our code which is the C compliant way. Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-02-25arm: armv8: Improve SPL data save and restore implementationAlif Zakuan Yuslaimi
Introduce a new symbol in the beginning of .data section in the common ARMv8 linker script and use that as a reference for data save and restore. Previously, the code would rely on calculating the start of the .data section address via data size, however, we observed that the data size does not really reflect the SPL mapped addresses. In our case, the binman_sym section size was not included in the data size, which will result in a wrong address for the .data start section, which prevents us from properly saving and restoring SPL data. This approach skips the calculation for the starting address of the .data section, and instead just defines the beginning address of the .data section and calling the symbol as needed, in which we think as a simpler and much more robust method. Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2025-02-15arm64: Add late jump to kernel board hookMarek Vasut
Add empty weak assembler function armv8_switch_to_el2_prep() which is jumped to just before U-Boot determines which EL it is running in and decides which path to take to boot the Linux kernel. This weak function is meant to be used by architecture specific code to implement jump to a firmware blob, which then returns right past this weak function and continues execution of U-Boot code which then boots the Linux kernel. One example of such use case is when U-Boot jump tp TFA BL31, which switches from EL3 to EL2 and then returns to U-Boot code newly running in EL2 and starts the Linux kernel. The weak function is called with caches already disabled and DM shut down. Any preparatory work or even loading of more data must be done in board_prep_linux(), this hook is meant only for the final jump to the firmware and return to U-Boot before booting Linux. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-01-14armv8: Add arch-specific sysinfo platform driverRaymond Mao
Add sysinfo platform driver for all armv8 platforms to retrieve hardware information on processor and cache. Signed-off-by: Raymond Mao <raymond.mao@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2024-11-17armv8: cpu: Implement allow_unaligned()Sam Protsenko
Usually ARMv8 platforms allow unaligned access for Normal memory. But some chips might not allow it by default, having SCTLR.A bit set to 1 before U-Boot execution. One such example is Exynos850 SoC. As allow_unaligned() is not implemented for ARMv8 at the moment, its __weak implementation is used, which does nothing. That might lead to unaligned access abort, for example when running EFI selftest. Fix that by implementing allow_unaligned() for ARMv8. The issue was found when running EFI selftest on E850-96 board (Exynos850 based): => bootefi selftest $fdtcontroladdr ... Executing 'HII database protocols' "Synchronous Abort" handler, esr 0x96000021, far 0xbaac0991 ... resetting ... Unaligned abort happens in u16_strnlen(), which is called from efi_hii_sibt_string_ucs2_block_next(): u16_strlen(blk->string_text) where 'blk' type is struct efi_hii_sibt_string_ucs2_block. Because this struct is packed, doing "->string_text" makes 'blk' address incremented by 1 byte, which makes it unaligned. Although allow_unaligned() was called in efi_init_early() before EFI selftest execution, it wasn't implemented for ARMv8 CPUs, so data abort happened. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2024-11-17armv8: Fix get_sctlr() return typeSam Protsenko
SCTLR_EL2 is a 64-bit register [1]. Return its value as long (64 bit) instead of int (32 bit) in get_sctlr() to make sure it's not trimmed. [1] https://developer.arm.com/documentation/ddi0595/2021-06/AArch64-Registers/SCTLR-EL2--System-Control-Register--EL2-?lang=en Fixes: 0ae7653128c8 ("arm64: core support") Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-10-27Merge patch series "Implement ACPI on aarch64"Tom Rini
Patrick Rudolph <patrick.rudolph@9elements.com> says: Based on the existing work done by Simon Glass this series adds support for booting aarch64 devices using ACPI only. As first target QEMU SBSA support is added, which relies on ACPI only to boot an OS. As secondary target the Raspberry Pi4 was used, which is broadly available and allows easy testing of the proposed solution. The series is split into ACPI cleanups and code movements, adding Arm specific ACPI tables and finally SoC and mainboard related changes to boot a Linux on the QEMU SBSA and RPi4. Currently only the mandatory ACPI tables are supported, allowing to boot into Linux without errors. The QEMU SBSA support is feature complete and provides the same functionality as the EDK2 implementation. The changes were tested on real hardware as well on QEMU v9.0: qemu-system-aarch64 -machine sbsa-ref -nographic -cpu cortex-a57 \ -pflash secure-world.rom \ -pflash unsecure-world.rom qemu-system-aarch64 -machine raspi4b -kernel u-boot.bin -cpu cortex-a72 \ -smp 4 -m 2G -drive file=raspbian.img,format=raw,index=0 \ -dtb bcm2711-rpi-4-b.dtb -nographic Tested against FWTS V24.03.00. Known issues: - The QEMU rpi4 support is currently limited as it doesn't emulate PCI, USB or ethernet devices! - The SMP bringup doesn't work on RPi4, but works in QEMU (Possibly cache related). - PCI on RPI4 isn't working on real hardware since the pcie_brcmstb Linux kernel module doesn't support ACPI yet. Link: https://lore.kernel.org/r/20241023132116.970117-1-patrick.rudolph@9elements.com
2024-10-27armv8: cpu: Enable ACPI parking protocolPatrick Rudolph
Update the generic entry point code to support the ACPI parking protocol. The ACPI parking protocol can be used when PSCI is not available to bring up secondary CPU cores. When enabled secondary CPUs will enter U-Boot proper and spin in their own 4KiB reserved memory page, which also acts as mailbox with the OS to release the CPU. TEST: Boots all CPUs on qemu-system-aarch64 -machine raspi4b Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2024-10-27arm: cpu: Add ACPI parking protocol supportPatrick Rudolph
On Arm platforms that use ACPI they cannot rely on the "spin-table" CPU bringup usually defined in the FDT. Thus implement the 'ACPI Multi-processor Startup for ARM Platforms', also referred to as 'ACPI parking protocol'. The ACPI parking protocol works similar to the spin-table mechanism, but the specification also covers lots of shortcomings of the spin-table implementations. Every CPU defined in the ACPI MADT table has it's own 4K page where the spinloop code and the OS mailbox resides. When selected the U-Boot board code must make sure that the secondary CPUs enter u-boot after relocation as well, so that they can enter the spinloop code residing in the ACPI parking protocol pages. The OS will then write to the mailbox and generate an IPI to release the CPUs from the spinloop code. For now it's only implemented on ARMv8, but can easily be extended to other platforms, like ARMv7. TEST: Boots all CPUs on qemu-system-aarch64 -machine raspi4b Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
2024-10-15layerscape: use the lmb API's to add RAM memorySughosh Ganu
The EFI memory allocations are now being done through the LMB module, and hence the memory map is maintained by the LMB module. Use the lmb_arch_add_memory() API function to add the usable RAM memory to the LMB's memory map. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2024-10-11Merge patch series "Tidy up use of 'SPL' and CONFIG_SPL_BUILD"Tom Rini
Simon Glass <sjg@chromium.org> says: When the SPL build-phase was first created it was designed to solve a particular problem (the need to init SDRAM so that U-Boot proper could be loaded). It has since expanded to become an important part of U-Boot, with three phases now present: TPL, VPL and SPL Due to this history, the term 'SPL' is used to mean both a particular phase (the one before U-Boot proper) and all the non-proper phases. This has become confusing. For a similar reason CONFIG_SPL_BUILD is set to 'y' for all 'SPL' phases, not just SPL. So code which can only be compiled for actual SPL, for example, must use something like this: #if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD) In Makefiles we have similar issues. SPL_ has been used as a variable which expands to either SPL_ or nothing, to chose between options like CONFIG_BLK and CONFIG_SPL_BLK. When TPL appeared, a new SPL_TPL variable was created which expanded to 'SPL_', 'TPL_' or nothing. Later it was updated to support 'VPL_' as well. This series starts a change in terminology and usage to resolve the above issues: - The word 'xPL' is used instead of 'SPL' to mean a non-proper build - A new CONFIG_XPL_BUILD define indicates that the current build is an 'xPL' build - The existing CONFIG_SPL_BUILD is changed to mean SPL; it is not now defined for TPL and VPL phases - The existing SPL_ Makefile variable is renamed to SPL_ - The existing SPL_TPL Makefile variable is renamed to PHASE_ It should be noted that xpl_phase() can generally be used instead of the above CONFIGs without a code-space or run-time penalty. This series does not attempt to convert all of U-Boot to use this new terminology but it makes a start. In particular, renaming spl.h and common/spl seems like a bridge too far at this point. The series is fully bisectable. It has also been checked to ensure there are no code-size changes on any commit.
2024-10-11global: Rename SPL_TPL_ to PHASE_Simon Glass
Use PHASE_ as the symbol to select a particular XPL build. This means that SPL_TPL_ is no-longer set. Update the comment in bootstage to refer to this symbol, instead of SPL_ Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11global: Rename SPL_ to XPL_Simon Glass
Use XPL_ as the symbol to indicate an SPL build. This means that SPL_ is no-longer set. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11arch: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILDSimon Glass
Use the new symbol to refer to any 'SPL' build, including TPL and VPL Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-03Merge patch series "vbe: Series part D"Tom Rini
Simon Glass <sjg@chromium.org> says: This includes various patches towards implementing the VBE abrec bootmeth in U-Boot.
2024-10-03armv8: Support not having separate BSSSimon Glass
Separate BSS is current mandatory on armv8 but this is not useful for early boot phases. Add support for the combined BSS. Use an #ifdef to avoid using CONFIG_SPL_BSS_START_ADDR which is not valid in this case. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-09-06armv8: mmu: add a way to map additional regionsCaleb Connolly
In some cases we might want to map some memory region after enabling caches. Introduce a new helper for this. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-08-26global_data: Convert have_console into a flagSimon Glass
We don't need a full word for this boolean value. Convert it into a flag to save space in global_data. Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com> Signed-off-by: Simon Glass <sjg@chromium.org>