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2025-05-03imx9: scmi: add i.MX95 SoC and clock related codePeng Fan
This patch adds i.MX95 SoC and clock related code. Because they are based on SCMI, put them in the scmi subfolder. Signed-off-by: Alice Guo <alice.guo@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Ji Luo <ji.luo@nxp.com> Signed-off-by: Jindong Yue <jindong.yue@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com>
2024-12-07imx: Add iMX91 supportPeng Fan
iMX91 is reduced part from iMX93 with part number: i.MX9131/11/01 It removed A55_1, M33, MIPI DSI, LVDS, etc. i.MX9131: - Support 2.4GT/s DDR and HWFFC at 1.2GT/s i.MX9121: - A55 at 800Mhz and DDR at 1600MTS, with low drive mode. i.MX9111: - Support 1.6GT/s DDR and HWFFC at 800MT/s i.MX9101: - Support 800Mhz ARM clock - Support 1.6GT/s DDR and HWFFC at 800MT/s - No parallel display, eQOS, flexcan Updated Clock/Container/CPU and etc for i.MX91 Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19imx: Generalize fixup_thermal_tripsPeng Fan
i.MX8M and i.MX9 have duplicated fixup_thermal_trips, so move it to arch/arm/mach-imx/fdt.c to avoid duplicated code. The critial temperature point for i.MX9 set to "maxc - 5" back to give some margin. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19imx93: Add Low performance parts 9302/9301 supportYe Li
Add support for iMX93 low performance parts 9302 and 9301 which restrict to low drive voltage only. The parts run A55 max speed at 900Mhz and M33 at 133Mhz, have NPU and A55 core1 (9301) disabled. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19imx: Generalize disable_cpu_nodesPeng Fan
disable_cpu_nodes could be reused by i.MX9, so move disable_cpu_nodes out from mach-imx/imx8m/soc.c to mach-imx/fdt.c and update disable_cpu_nodes to make it easy to support different socs. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13imx: imx8: bootaux: Add i.MX8 M4 boot supportYe Li
1. Implement bootaux for the M4 boot on i.MX8QM and QXP. Users need to download M4 image to any DDR address first. Then use the "bootaux <M4 download DDR address> [M4 core id]" to boot CM4_0 or CM4_1, the default core id is 0 for CM4_0. Since current M4 only supports running in TCM. The bootaux will copy the M4 image from DDR to its TCML. 2. Implment bootaux for HIFI on QXP command: bootaux 0x81000000 1 Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: add i.MX93 variants supportPeng Fan
According to datasheet, iMX93 has fused parts with CORE1 or NPU or both disabled. So update code to support it, the kernel device tree runtime update will be added in future patches. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-03-30imx: spl_imx_romapi: Get and print boot stageYe Li
Get and print boot stage through ROM API in SPL Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-01-30ARM: imx: bootaux: Fix LTO -Wlto-type-mismatchMarek Vasut
Commit 56c2dbdabab5 ("imx: bootaux: cleanup code") introduces the following LTO related warning: " arch/arm/mach-imx/imx_bootaux.c:24:31: warning: type of ‘hostmap’ does not match original declaration [-Wlto-type-mismatch] 24 | const __weak struct rproc_att hostmap[] = { }; | ^ arch/arm/mach-imx/imx8m/soc.c:1590:24: note: array types have different bounds 1590 | const struct rproc_att hostmap[] = { | ^ arch/arm/mach-imx/imx8m/soc.c:1590:24: note: ‘hostmap’ was previously declared here ../aarch64-linux-gnu/bin/ld: warning: u-boot has a LOAD segment with RWX permissions " This is because the weak empty array of structures "hostmap" is eventually replaced by non-empty array of structures with different number of elements. Fix this by avoiding weak variable size array, instead use a weak function which returns single pointer to the array. Fixes: 56c2dbdabab5 ("imx: bootaux: cleanup code") Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-07-26imx: imx9: support romapiPeng Fan
i.MX9 shares same ROM API with i.MX8ULP, so make the i.MX8ULP the function prototype common and usable by i.MX9. Also include mmc env functions that use ROM API. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26imx: add basic i.MX9 supportPeng Fan
Add i.MX9 Kconfig and basic files for the new SoC Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26imx: move get_boot_device to common headerPeng Fan
Most i.MX implements get_boot_device, move it to common header to simplify code Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26imx: simplify dependency with SPL_BOOTROM_SUPPORTPeng Fan
For SoCs support ROM API, CONFIG_SPL_BOOTROM_SUPPORT is needed, so use this macro to guard the code to avoid extend the list. And drop the guard with structure definition, there is no need. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-25imx8: add rom api wrappersRasmus Villemoes
The ROM API is thoroughly undocumented, but apparently passing the xor of the real arguments as an extra argument is required [1]. Also, we need to do the "save gd/restore gd" dance. These are both error-prone, and lead to a lot of code duplication. Since both imx8m[np] and imx8ulp SOCs have this, add a separate translation unit which is included precisely when the new CONFIG_IMX8_ROMAPI symbol is set, which provide convenience wrappers that take care of computing the xor value as well as doing the gd dance, and that thus have a more intuitive API. Subsequent patches will make use of these to reduce boilerplate. [1] One wonders, for example, if the check is only applied to the lower 32 bits, or if we're implicitly relying on all 64-bit pointer values we're passing effectively have 0 in the upper 32 bits. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2022-07-25imx8: sys_proto.h: change guard logic around ROM APIRasmus Villemoes
This exposes the struct rom_api, the g_rom_api variable declaration and the associated #defines to slightly fewer boards: namely, those IMX8M which are not IMX8MN or IMX8MP. But the latter two are the only IMX8M* ones where the g_rom_api variable is defined (in imx8m/soc.c), so that should be fine. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2022-04-12imx: imx8mp: Add iMX8MP UltraLite Part cpu typePeng Fan
Add i.MX8MP UltraLite Part CPU type Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12imx: dynamic setting mmcdev and mmcrootPeng Fan
Dynamic setting mmcdev and mmcroot. Then when boot linux, we can have correct "root=/dev/mmcblk[x]p2" Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12ARM: imx: Decode ECSPI env location from i.MX8M ROMAPI tablesMarek Vasut
Decode ECSPI boot device in env_get_location() from i.MX8M ROMAPI tables. This is necessary to correctly identify env is in SPI NOR when the system boots from SPI NOR attached to ECSPI. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-02-18imx: spl: Fix typo BMODE_EMI -> BMODE_EIMHarald Seiler
The interface for NOR/OneNAND is called "EIM" not "EMI". Fix this. Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-02-05imx: Enable ACTLR.SMP in SPL for i.MX6/7Sven Schwermer
Similar to what has been done before with c5437e5b for u-boot proper, we enable the SMP bit for SPL as well. This is necessary when SDP booting straight into Linux, i.e. falcon boot. When SDP boot mode is active, the ROM code does not set this bit which makes the caches not work once activated in Linux. On an i.MX6ULL (528MHz), this reduces a minimal kernel's boot time into an initramfs shell from ~6.1s down to ~1.2s. Signed-off-by: Sven Schwermer <sven@svenschwermer.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-08-09arm: imx8ulp: add container supportYe Li
i.MX8ULP support using ROM API to load container image, it use same ROM API as i.MX8MN/MP, and use same container format as i.MX8QM/QXP. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09arm: imx: sys_proto: move boot mode define to common headerPeng Fan
These defines could be reused by i.MX8ULP, so move them to common header. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09arm: imx: add i.MX8ULP cpu type and helperPeng Fan
Add i.MX8ULP cpu type and helpers. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-06-09ARM: IMXRT: introduce is_imxrt*() macros and get_cpu_rev()Giulio Benetti
We need those macros to instruct drivers on how to behave for SoC specific quirks, so let's add it as done for other i.MX SoCs. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-04-08imx8mn: Add support for 11x11 UltraLite part numberYe Li
There are 3 part numbers for 11x11 i.MX8MNano with different core number configuration: UltraLite Quad/Dual/Solo Comparing with i.MX8MN Lite parts, they have MIPI DSI disabled. So checking the MIPI DSI disable fuse to recognize these parts. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-12-06imx8: allow overriding memory layoutMarcel Ziswiler
Introduce weak function board_mem_get_layout() which allows overriding the memory layout from board code in runtime, useful for handling different SKU versions. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-09-17imx8mp: Remove parts MIMX8ML7 and MIMX8ML5 supportPeng Fan
Latest datasheet revE has removed MIMX8ML7D/5D/7C/5C parts, so update u-boot to remove decoding and support for those parts. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-08-17ARM: imx: Add support for switching primary/secondary boot mode to bmodeMarek Vasut
The i.MX6/i.MX7 is capable of booting a secondary "redundant" system image in case the primary one is corrupted. The user can force this boot mode as well by explicitly setting SRC GPR10 bit 30. This can be potentially useful when upgrading the bootloader itself. Expose this functionality to the user. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
2020-08-17ARM: imx: Add bmode support for iMX7Marek Vasut
Add the basic differentiation between i.MX6 and i.MX7 into the bmode command, the mechanism really works almost the same on both platforms. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2020-07-14imx8mp: Add fused parts supportYe Li
iMX8MP has 6 fused parts in each qualification tier, with core, VPU, ISP, NPU or DSP fused respectively. The configuration tables for enabled modules: MIMX8ML8DVNLZAA Quad Core, VPU, NPU, ISP, DSP MIMX8ML7DVNLZAA Quad Core, NPU, ISP MIMX8ML6DVNLZAA Quad Core, VPU, ISP MIMX8ML5DVNLZAA Quad Core, VPU MIMX8ML4DVNLZAA Quad Lite MIMX8ML3DVNLZAA Dual Core, VPU, NPU, ISP, DSP Add the support in U-Boot Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-18arm: Don't include common.h in header filesSimon Glass
It is bad practice to include common.h in other header files since it can bring in any number of superfluous definitions. It implies that some C files don't include it and thus may be missing CONFIG options that are set up by that file. The C files should include these themselves. Update some header files in arch/arm to drop this. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-10fec: Move imx_get_mac_from_fuse declare to imx fileYe Li
imx_get_mac_from_fuse is used to load MAC address from fuse. On imx8mp, we have two different ENET controllers and both need to call this function. So decouple its declare from fec driver. Reviewed-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10imx: add module fuse supportPeng Fan
There are different parts from one SoC. Take i.MX6ULL for example, some part might not have ENET, some might have; some might not have USB, some might have. The information could be got from OCOTP, to make one image support the different parts, we need runtime disable linux kernel dts node and uboot driver probe if the corresponding module not exists in the part. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01imx: update is_imx6ull to include i.MX6ULZPeng Fan
Update is_imx6ull helper to include i.MX6ULZ SoC. i.MX6ULZ could share same macro, then we no need to add is_imx6ulz in various drivers. Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01imx: imx8m: add i.MX8MN variants supportPeng Fan
Add i.MX8MN variants support Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01imx: imx8m: add i.MX8MQ Dual and QuadLite supportPeng Fan
Add i.MX8MQ Dual and QuadLite variants. Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01imx: fix cpu_type helperPeng Fan
i.MX8MP use 0x182 as its ID, so 0xff is not valid to get the cpu type, extend it to 0x1ff. Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08imx: get cpu id/type of i.MX8MPPeng Fan
Support get i.MX8MP cpu id and cpu type Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-07mach-imx: bootaux: elf firmware supportIgor Opaniuk
Currently imx-specific bootaux command doesn't support ELF format firmware for Cortex-M4 core. This patches introduces a PoC implementation of handling elf firmware (load_elf_image_phdr() was copy-pasted from elf.c just for PoC). ELF64 binaries isn't supported yet. This has the advantage that the user does not need to know to which address the binary has been linked to. However, in order to handle and load the elf sections to the right address, we need to translate the Cortex-M4 core memory addresses to primary/host CPU memory addresses (Cortex A7/A9 cores). This allows to boot firmwares from any location with just using bootaux, e.g.: > tftp ${loadaddr} hello_world.elf && bootaux ${loadaddr} Similar translation table can be found in the Linux remoteproc driver [1]. [1] https://elixir.bootlin.com/linux/latest/source/drivers/remoteproc/imx_rproc.c Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-12-06board: colibri_imx7: reserve DDR memory for Cortex-M4Igor Opaniuk
i.MX 7's Cortex-M4 core can run from DDR and uses DDR memory for the rpmsg communication. Both use cases need a fixed location of memory reserved. For the rpmsg use case the reserved area needs to be in sync with the kernel's hardcoded vring descriptor location. Use the linux,usable-memory property to carve out 1MB of memory in case the M4 core is running. Also make sure that the i.MX 7 specific rpmsg driver does not get loaded in case we do not carve out memory. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-11-05imx: add rom api supportPeng Fan
i.MX8MN support loading images with rom api, so we implement reuse board_return_to_bootrom to let ROM loading images. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05imx8mn: support get_cpu_revPeng Fan
Add a dummy cpu type and support get_cpu_rev for i.MX8MN Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03mach-imx: Adding new argument for SIP call interfaceYe Li
Need to pass total 5 arguments for SIP HAB call on i.MX8MQ, so update the interface to add new argument. Signed-off-by: Ye Li <ye.li@nxp.com> [agust: fixed imx8m-power-domain build] Signed-off-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Patrick Wildt <patrick@blueri.se> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-11-03ARM: imx: Fix bmode detection from grp10Claudius Heine
imx6_is_bmode_from_gpr9 always returns false, because IMX6_SRC_GPR10_BMODE is 1<<28 and gets casted to u8 on return. This moves the function body into imx6_src_get_boot_mode, since that is the only one using it and it is on the same abstraction level (accessing registers directly). Signed-off-by: Claudius Heine <ch@denx.de>
2019-10-08imx: add i.MX8MM cpu typePeng Fan
Add i.MX8MM cpu type and related helper functions Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: sys_proto: add is_imx8qm helperPeng Fan
Add is_imx8qm helper which could be used by SoC and Driver code. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: add i.MX6ULZ cpu typePeng Fan
Add i.MX6ULZ cpu type and helper. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-04-25imx: sip: add call_imx_sip_ret2Peng Fan
This function will be used by i.MX8 fuse driver. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-28ARM: imx: fix: Provide correct enum values for ONENAND/NOR boot recognitionLukasz Majewski
According to "Table 5-1. Boot Device Select" (page 335, i.MX 6Dual/6Quad Applications Processor Reference Manual, Rev. 4, 09/2017) the BOOT_CFG1[3] have following values (regarding EIM booting): 0 - NOR flash and 1 - ONENAND This commit provides correct identification of the boot medium for IMX6Q boards booting from NOR memory (MCCMON6 is one of them). Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-01-01imx: rename mx8m,MX8M to imx8m,IMX8MPeng Fan
Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
generated by cgit v1.2.3 (git 2.0.4) at 2025-08-08 13:46:46 +0000