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3 daysarm: socfpga: agilex5: Refactor system manager driver initializationAlif Zakuan Yuslaimi
Refactor system manager initialization by searching for system manager alias in Agilex5 device tree instead of manually passing node name to the device model calling function Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
12 daysarch: arm: agilex5: Enable power manager for Agilex5Alif Zakuan Yuslaimi
Agilex5 FSBL is required to disable the power of unused peripheral SRAM blocks to reduce power consumption. Introducing a new power manager driver for Agilex5 which will be called as part of Agilex5 SPL initialization process. This driver will read the peripheral handoff data obtained from the bitstream and will power off the specified peripheral's SRAM from the handoff data values. Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2025-04-22arm: socfpga: spl: Notify SDM on FSBL executionAlif Zakuan Yuslaimi
Send out "HPS_STAGE_NOTIFY" mailbox command to the Secure Device Manager (SDM) in SPL to inform SDM on FSBL execution. This is necessary for the SDM to recognize that the FSBL stage has begun its execution and should be made as early as possible in the FSBL process. Therefore, the mailbox will initialize and send out the notification right after the completion of timer initialization. Signed-off-by: Mahesh Rao <mahesh.rao@altera.com> Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2025-02-25arm: armv8: Improve SPL data save and restore implementationAlif Zakuan Yuslaimi
Introduce a new symbol in the beginning of .data section in the common ARMv8 linker script and use that as a reference for data save and restore. Previously, the code would rely on calculating the start of the .data section address via data size, however, we observed that the data size does not really reflect the SPL mapped addresses. In our case, the binman_sym section size was not included in the data size, which will result in a wrong address for the .data start section, which prevents us from properly saving and restoring SPL data. This approach skips the calculation for the starting address of the .data section, and instead just defines the beginning address of the .data section and calling the symbol as needed, in which we think as a simpler and much more robust method. Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2025-02-25arm: socfpga: agilex5: Add SPL for Agilex5 SoCFPGATien Fong Chee
Add SPL support for Agilex5 SoCFPGA. Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>