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Update the firmware driver UFS APIs zynqmp_pm_ufs_* to directly
read/write to the pmc_iou_slcr and efuse_cache registers. Replace
these raw reads/writes with the xilinx_pm_request() API with the
correct arguments once the PM related changes are done.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ee2d1ad2e07e96f1948ab6ffe8f3c50a3b8f9be9.1742462001.git.michal.simek@amd.com
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Add the UFS boot mode support and update the boot_targets with
ufs mode. If the UFS device is not accessible from APU and
running this is detected as a warning, as the device is not
accessible.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20250225032806.1842581-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
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ES1 silicon is 0x10 (16) and production is 0x20 (32) but correct number to
see are v1.0 or v2.0 instead of v16 or v32.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20095339334fe07f373ffae3bdbfec51f5a00dc7.1739882585.git.michal.simek@amd.com
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Add support for AMD Versal Gen 2. SoC is based on Cortex-a78ae 4 cluster/2
cpu core each. A lot of IPs are shared with previous families. There are
couple of new IP blocks where the most interesting from user point of view
is UFS.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/bc2b70831ce1031bd0fac32357bff84936e1310f.1716994063.git.michal.simek@amd.com
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