| Age | Commit message (Collapse) | Author |
|---|
|
The common portable header for CPU related functions such as cache
flushing and invalidation is <cpu_func.h> so add that to these drivers.
Signed-off-by: Tom Rini <trini@konsulko.com>
|
|
With commit cc4e8af2c552, fsl_enetc register accessors have been split to
handle different register offsets on different SoCs. However, for
internal MDIO register calculation, only ENETC_PM_IMDIO_BASE was fixed
without adding the SoC specific MAC register offset.
As a result, the network support for the Kontron SMARC-sAL28 and
probably other boards based on the LS1028A CPU is broken.
Add the SoC specific MAC register offset to calculation of imdio.priv to
fix this.
Fixes: cc4e8af2c552 ("net: fsl_enetc: Split register accessors")
Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com>
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com> # LS1028A
Tested-by: Tim Harvey <tharvey@gateworks.com> # imx95_19x19_evk
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Alice Guo <alice.guo@nxp.com>
|
|
The ENETCv4 port DT nodes on i.MX95 may contain optional clock phandle
to IMX95_CLK_ENETREF "ref" clock. These "ref" clock must be enabled for
the ethernet to work. These "ref" clock are enabled after cold boot, but
when the system booted Linux and rebooted, those "ref" clock might have
been disabled in the process, which would make ethernet inoperable after
reboot. Make sure those "ref" clock are always correctly enabled.
Signed-off-by: Marek Vasut <marex@denx.de>
|
|
i.MX95 uses enetc version 4.1 controller. Update the enetc for i.MX95.
Add ARM-specific cache handling and i.MX95 specific register layout
handling.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Marek Vasut <marex@denx.de> # Clean up
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
|
|
Pass struct udevice * into the register accessors, so the accessors can reach
driver data, which contain device specific register offsets.
Signed-off-by: Marek Vasut <marex@denx.de>
|
|
Introduce driver data for each PCI device. The driver data carry
offsets of registers which differ between different SoCs.
Signed-off-by: Marek Vasut <marex@denx.de>
|
|
Split register accessors to the port base/station interface/port/mac
registers as those are at different offsets on different SoCs. This
is a preparatory patch which will allow addition of adjusted offsets
for new SoCs easily.
Signed-off-by: Marek Vasut <marex@denx.de>
|
|
Move register accessors from header files and turn them into proper
inline functions, so typechecking can be done on them. Drop no longer
enetc_port_regs() and unused enetc_read() and enetc_bdr_read().
Signed-off-by: Marek Vasut <marex@denx.de>
|
|
Introduce mapping function enetc_dev_id(), which converts PCIe BDF of
the ENETC into linear incrementing index usable e.g. as interface index.
This replaces the current ad-hoc calculation used in the code with a
dedicated function. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
|
|
Rename the current driver structure and matching ops and PCI IDs
and add _ls suffix to indicate this content is LS specific. This
is done in preparation for addition of i.MX95 ENETCv4 which will
require slightly different structure content.
Signed-off-by: Marek Vasut <marex@denx.de>
|
|
Pass udevice pointer into enetc_enable_si_port() so tests like
enetc_is_ls1028a() an be used in the function. No functional
change.
Signed-off-by: Marek Vasut <marex@denx.de>
|
|
The entire content of the loop can be folded into enetc_set_ierb_primary_mac(),
do it. This changes the behavior slightly such that the DT is only updated in
case of a LS1028A, which is the only SoC with ethernet MAC path in DT matching
"/soc/pcie@1f0000000/ethernet@%x,%x" anyway, so this slight change should have
no impact.
Signed-off-by: Marek Vasut <marex@denx.de>
|
|
Use enetc_is_ls1028() instead of ifdef around enetc_set_ierb_primary_mac()
and clean up the function. No functional change intended.
Signed-off-by: Marek Vasut <marex@denx.de>
|
|
Introduce accurate test for LS1028A compatibility based both on
IS_ENABLED(CONFIG_ARCH_LS1028A) and PCI vendor ID. This is done
in preparation for adding ENETCv4 support, which has a different
PCI vendor ID.
Signed-off-by: Marek Vasut <marex@denx.de>
|
|
As part of bringing the master branch back in to next, we need to allow
for all of these changes to exist here.
Reported-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Tom Rini <trini@konsulko.com>
|
|
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay
Ethernet"' I failed to notice that b4 noticed it was based on next and
so took that as the base commit and merged that part of next to master.
This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing
changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35.
Reported-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Tom Rini <trini@konsulko.com>
|
|
Remove <common.h> from this driver directory and when needed
add missing include files directly.
Signed-off-by: Tom Rini <trini@konsulko.com>
|
|
This function is also available as ofnode_is_enabled(), so use that
instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
|
Use the word 'uclass' instead of 'if_type' to complete the conversion.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
|
If ethernet connected to SFP, like this:
&enetc_port0 {
phy-connection-type = "sgmii";
sfp = <&sfp0>;
managed = "in-band-status";
status = "okay";
};
Then enetc_config_phy returns -ENODEV and the memory containing the mdio interface is freed.
It's better to unregister and free mdio resources.
Signed-off-by: Siarhei Yasinski <siarhei.yasinski@sintecs.eu>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
|
If the device fails to probe - for example, when there is no
ethaddr set - then the private data is automatically freed
but the mdiobus remains registered.
Fixes: 1e354cb39314 ("drivers: net: fsl_enetc: register internal MDIO bus")
Signed-off-by: Michael Walle <michael@walle.cc>
|
|
Add a mask parameter to control the lookup of the PCI region from which
the mapping can be made.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
|
Evolve dm_pci_map_bar() to include an offset and length parameter. These
allow a portion of the memory to be mapped and range checks to be
applied.
Passing both the offset and length as zero results in the previous
behaviour and this is used to migrate the previous callers.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
|
Rename constant PHY_INTERFACE_MODE_NONE to PHY_INTERFACE_MODE_NA to make
it compatible with Linux' naming.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
|
|
Add helpers ofnode_read_phy_mode() and dev_read_phy_mode() to parse the
"phy-mode" / "phy-connection-type" property. Add corresponding UT test.
Use them treewide.
This allows us to inline the phy_get_interface_by_name() into
ofnode_read_phy_mode(), since the former is not used anymore.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
|
|
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
|
|
The enetc driver runs only on NXP LS1028A, which most definitely does
not support the parallel 10G interface, just USXGMII, and that only up
to 2.5Gbps (toned down from 10 Gbps via symbol replication).
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
|
|
After the discussion here:
https://lore.kernel.org/netdev/20210603143453.if7hgifupx5k433b@pali/
which resulted in this patch:
https://patchwork.kernel.org/project/netdevbpf/patch/20210704134325.24842-1-pali@kernel.org/
and many other discussions before it, notably:
https://patchwork.kernel.org/project/linux-arm-kernel/patch/1512016235-15909-1-git-send-email-Bhaskar.Upadhaya@nxp.com/
it became apparent that nobody really knows what "SGMII 2500" is.
Certainly, Freescale/NXP hardware engineers name this protocol
"SGMII 2500" in the reference manuals, but the PCS devices do not
support any "SGMII" specific features when operating at the speed of
2500 Mbps, no in-band autoneg and no speed change via symbol replication
. So that leaves a fixed speed of 2500 Mbps using a coding of 8b/10b
with a SERDES lane frequency of 3.125 GHz. In fact, "SGMII 2500 without
in-band autoneg and at a fixed speed" is indistinguishable from
"2500base-x without in-band autoneg", which is precisely what these NXP
devices support.
So it just appears that "SGMII 2500" is an unclear name with no clear
definition that stuck.
As such, in the Linux kernel, the drivers which use this SERDES protocol
use the 2500base-x phy-mode.
This patch converts U-Boot to use 2500base-x too, or at least, as much
as it can.
Note that I would have really liked to delete PHY_INTERFACE_MODE_SGMII_2500
completely, but the mvpp2 driver seems to even distinguish between SGMII
2500 and 2500base-X. Namely, it enables in-band autoneg for one but not
the other, and forces flow control for one but not the other. This goes
back to the idea that maybe 2500base-X is a fiber protocol and SGMII-2500
is an MII protocol (connects a MAC to a PHY such as Aquantia), but the
two are practically indistinguishable through everything except use case.
NXP devices can support both use cases through an identical configuration,
for example RX flow control can be unconditionally enabled in order to
support rate adaptation performed by an Aquantia PHY. At least I can
find no indication in online documents published by Cisco which would
point towards "SGMII-2500" being an actual standard with an actual
definition, so I cannot say "yes, NXP devices support it".
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
|
|
As part of the effort of making U-Boot work with the same device tree as
Linux, there is an issue with the "xfi" phy-mode. To be precise, in
Linux there was a discussion (for those who have time to read:
https://lore.kernel.org/netdev/1576768881-24971-2-git-send-email-madalin.bucur@oss.nxp.com/)
which led to a patch:
https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next.git/commit/?id=c114574ebfdf42f826776f717c8056a00fa94881
TL;DR: "xfi" was standardized in Linux as "10gbase-r".
This patch changes the relevant occurrences in U-Boot to use "10gbase-r"
instead of "xfi" wherever applicable.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
|
|
Make sure that errors in the PHY driver .startup() method, such as no
link, are propagated and not ignored.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
|
|
The RGMII spec supports optional in-band status reporting for the speed
and duplex negotiated on the copper side, and the ENETC driver enables
this feature by default.
However, this does not work when the PHY does not implement the in-band
reporting, or when there is a MAC-to-MAC connection described using a
fixed-link. In that case, it would be better to disable the feature in
the ENETC MAC and always force the speed and duplex to the values that
were negotiated and retrieved over MDIO once the autoneg is finished.
Since this works always, we just do it unconditionally and drop the
in-band code.
Note that because we need to wait for the autoneg to complete, we need
to move enetc_setup_mac_iface() after phy_startup() returns, and then
pass the phydev pointer all the way to enetc_init_rgmii().
The same considerations have led to a similar Linux driver patch as well:
https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next.git/commit/?id=c76a97218dcbb2cb7cec1404ace43ef96c87d874
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
|
|
Given that even a fixed-link has an associated phy_device, there is no
reason to operate in a mode when dm_eth_phy_connect fails.
Remove the driver checks for a NULL priv->phy and just return -ENODEV
when that happens.
Copyright updated according to corporate requirements.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
|
|
At present ofnode is present in the device even if it is never used. With
of-platdata this field is not used, so can be removed. In preparation for
this, change the access to go through inline functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
|
Try to maintain some consistency between these variables by using _plat as
a suffix for them.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
|
Rename this to be consistent with the change from 'platdata'.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
|
We use 'priv' for private data but often use 'platdata' for platform data.
We can't really use 'pdata' since that is ambiguous (it could mean private
or platform data).
Rename some of the latter variables to end with 'plat' for consistency.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
|
This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.
Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
|
Move this uncommon header out of the common header.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
|
Move this uncommon header out of the common header.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
|
Move this uncommon header out of the common header.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
|
Move this header out of the common header. Network support is used in
quite a few places but it still does not warrant blanket inclusion.
Note that this net.h header itself has quite a lot in it. It could be
split into the driver-mode support, functions, structures, checksumming,
etc.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
|
At present dm/device.h includes the linux-compatible features. This
requires including linux/compat.h which in turn includes a lot of headers.
One of these is malloc.h which we thus end up including in every file in
U-Boot. Apart from the inefficiency of this, it is problematic for sandbox
which needs to use the system malloc() in some files.
Move the compatibility features into a separate header file.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
|
Separate MAC and serdes configuration, MAC configuration must be applied
at each enetc_start() as FLR clears it.
This restores traffic for ENETC interfaces in USXGMII mode.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
|
|
The LS1028A SoC is special in the handling of the MAC addresses. We need
to write to the IERB version of the PSIPMAR0/1 register. This value will
be sampled into the corresponding port PSIPMAR0/1 register if the PCI
memory access is enabled.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
|
|
Intead of setting the MAC address in enetc_start() use the proper
write_hwaddr(). U-Boot takes care of the random MAC address, too.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
|
|
Passes on the primary address used by u-boot to Linux. The code does a DT
fix-up for ENETC PFs and sets the primary MAC address in IERB. The address
in IERB is restored on ENETC PCI functions at FLR.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
|
|
This bus is used to access internal SoC PHYs. These PHYs are configured
by the ENETC driver directly, but it's useful to have command line access
to this MDIO to debug the system especially when using new external PHYs.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
|
|
This reduces the time needed to establish a link as we don't reset the link
each time the interface is used. Our Link capabilities do not change at
run-time so there is no need to re-apply PHY configuration each time.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
|
|
The original code enabled link speeds up to 1Gbps, but the interface can
go up to 2.5G, enable that speed to in PHY AN mask.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
|
|
Uses the new dm_eth_phy_connect helper to connect to the PHY to simplify
the code.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
|
