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path: root/drivers/net/rswitch.c
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3 daysnet: rswitch: Fix error detectionAndrew Goodbody
In rswitch_probe the error detection after the call to devm_clk_get is very wrong. It checks the value of ret which is uninitialised at that point. Instead it should be using the macros for including errors into pointers. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-12-29net: rswitch: Implement C22 to C45 accessMarek Vasut
Add support for mapping C22 register access to C45-only PHYs. This is mainly useful for 'mii info' command, which performs C22 only access to determine PHY ID and link state and does not work well with this driver so far. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-12-29net: rswitch: Add PHY C22 access supportMarek Vasut
Implement C22 PHY access support in addition to C45 PHY access support which is already present. This is used for PHYs which do not support C45 access or which are C22 only. The C22 access can be recognized when devad is set to -1 or 0xffffffff hex, which also matches MDIO_DEVAD_NONE macro. Test for this special devad value and if it is set this way, perform C22 access, otherwise perform C45 access. Based on work by LUU HOAI <hoai.luu.ub@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-12-29net: rswitch: Fold MPSM C45 setting into rswitch_mii_access_c45()Marek Vasut
The Set Station Management Mode : Clause 45 setting of MFF bit in MPSM register can be done in rswitch_mii_access_c45() once, instead of this being done before each rswitch_mii_access_c45() call. Deduplicate the bit setting into rswitch_mii_access_c45(). No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-12-29net: rswitch: Simplify code using clrsetbits_le32()Marek Vasut
Use clrsetbits_le32() to make this complicated construct simpler. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-12-29net: rswitch: Fix up macro indentMarek Vasut
Update the macro indent, replace multiple spaces with tabs proper. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-12-29net: rswitch: Replace enum rswitch_reg with plain macrosMarek Vasut
Replace enum rswitch_reg with plain #define REGISTER OFFSET macros. The enum rswitch_reg was not referenced anywhere, so there was no benefit of keeping it around. Include register block labels. Turn all register offsets into lowercase hex values. No functional change. Rename EATDQDC to EATDQDCR, GWTRC to GWTRCR, GWDCC to GWDCCR, FWPC0 to FWPC, FWPBFC to FWPBFCR, FWPBFCSDC to FWPBFCSDCR because there are both register names which used to be part of this enum and also macros with the same name, each used for slightly different purpose. Make sure there is no collission. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-12-22net: rswitch: Do not register disabled ports as ethernet devicesMarek Vasut
In case an rswitch port is described as disabled in DT, do not register it as ethernet device in U-Boot. This way, such ports cannot be accessed from U-Boot command line. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-12-20net: rswitch: Add missing cache invalidate of TX descriptorMarek Vasut
TFTP transfers of large files, for example 128 MiB, can sporadically get stuck and the transfer slows down considerably. This happens because the TX DMA descriptor in DRAM becomes out of sync with the view of the TX DMA descriptor content from the CPU side, which is viewed through the CPU caches. In order to guarantee these two views are consistent, the cache over TX DMA descriptor that has possibly been written by the rswitch hardware must first be invalidated, only then can the descriptor be cleared and updated by the CPU, and finally the cache over that area must be flushed back into DRAM to make sure the rswitch hardware has consistent view of the updated descriptor content. The very first invalidation operation was missing, which led to sporadic corruption of the TX DMA descriptor. Fix it, add the missing invalidation operation. Reported-by: Enric Balletbo i Serra <eballetb@redhat.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Tested-by: Enric Balletbo i Serra <eballetb@redhat.com>
2024-05-20Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"Tom Rini
As part of bringing the master branch back in to next, we need to allow for all of these changes to exist here. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-19Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""Tom Rini
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-07net: Remove <common.h> and add needed includesTom Rini
Remove <common.h> from this driver directory and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com>
2023-04-16net: rswitch: Add Renesas Ethernet SwitchPhong Hoang
This patch adds Ethernet Switch support that found on R-Car S4 (r8a779f0) SoC. This is extracted from multiple patches from downstream BSP, with additional rework of the network device registration. Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Phong Hoang <phong.hoang.wz@renesas.com> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> [Marek: Rework the driver to support all ports via subdrivers. Split the driver up, add generic PHY framework support. Generic code clean ups.] Reviewed-by: Ramon Fried <rfried.dev@gmail.com>